TW528912B - Liquid crystal display device and process for producing the same - Google Patents
Liquid crystal display device and process for producing the same Download PDFInfo
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- TW528912B TW528912B TW089118169A TW89118169A TW528912B TW 528912 B TW528912 B TW 528912B TW 089118169 A TW089118169 A TW 089118169A TW 89118169 A TW89118169 A TW 89118169A TW 528912 B TW528912 B TW 528912B
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- 239000004973 liquid crystal related substance Substances 0.000 title claims abstract description 67
- 238000000034 method Methods 0.000 title claims abstract description 22
- 239000010408 film Substances 0.000 claims abstract description 278
- 229910045601 alloy Inorganic materials 0.000 claims abstract description 139
- 239000000956 alloy Substances 0.000 claims abstract description 139
- 239000000758 substrate Substances 0.000 claims abstract description 72
- 229910052751 metal Inorganic materials 0.000 claims abstract description 19
- 239000002184 metal Substances 0.000 claims abstract description 19
- 239000010409 thin film Substances 0.000 claims abstract description 18
- 239000000654 additive Substances 0.000 claims abstract description 5
- 230000000996 additive effect Effects 0.000 claims abstract description 5
- 230000002079 cooperative effect Effects 0.000 claims description 16
- 230000001681 protective effect Effects 0.000 claims description 16
- 229910021417 amorphous silicon Inorganic materials 0.000 claims description 14
- 239000007787 solid Substances 0.000 claims description 12
- 238000001312 dry etching Methods 0.000 claims description 11
- 238000004519 manufacturing process Methods 0.000 claims description 11
- 239000004065 semiconductor Substances 0.000 claims description 11
- 239000000203 mixture Substances 0.000 claims description 9
- 238000009413 insulation Methods 0.000 claims description 8
- 238000001556 precipitation Methods 0.000 claims description 8
- 229910000838 Al alloy Inorganic materials 0.000 claims description 6
- 229910052684 Cerium Inorganic materials 0.000 claims description 5
- 229910052692 Dysprosium Inorganic materials 0.000 claims description 5
- 229910052691 Erbium Inorganic materials 0.000 claims description 5
- 229910052693 Europium Inorganic materials 0.000 claims description 5
- 229910052688 Gadolinium Inorganic materials 0.000 claims description 5
- 229910052689 Holmium Inorganic materials 0.000 claims description 5
- 229910052777 Praseodymium Inorganic materials 0.000 claims description 5
- 229910052772 Samarium Inorganic materials 0.000 claims description 5
- 229910052771 Terbium Inorganic materials 0.000 claims description 5
- 229910052775 Thulium Inorganic materials 0.000 claims description 5
- 229910052746 lanthanum Inorganic materials 0.000 claims description 5
- 229910052727 yttrium Inorganic materials 0.000 claims description 5
- 229910052779 Neodymium Inorganic materials 0.000 claims description 4
- 238000000151 deposition Methods 0.000 claims description 3
- 239000002244 precipitate Substances 0.000 claims 3
- 239000004744 fabric Substances 0.000 claims 1
- 238000000059 patterning Methods 0.000 claims 1
- 230000015572 biosynthetic process Effects 0.000 abstract description 9
- 239000010410 layer Substances 0.000 description 109
- QTBSBXVTEAMEQO-UHFFFAOYSA-N Acetic acid Chemical compound CC(O)=O QTBSBXVTEAMEQO-UHFFFAOYSA-N 0.000 description 12
- 239000011521 glass Substances 0.000 description 9
- 230000003647 oxidation Effects 0.000 description 9
- 238000007254 oxidation reaction Methods 0.000 description 9
- NBIIXXVUZAFLBC-UHFFFAOYSA-N Phosphoric acid Chemical compound OP(O)(O)=O NBIIXXVUZAFLBC-UHFFFAOYSA-N 0.000 description 8
- 238000000206 photolithography Methods 0.000 description 8
- 238000004544 sputter deposition Methods 0.000 description 7
- 239000000463 material Substances 0.000 description 6
- 229910001182 Mo alloy Inorganic materials 0.000 description 5
- 230000000694 effects Effects 0.000 description 5
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 5
- GRYLNZFGIOXLOG-UHFFFAOYSA-N Nitric acid Chemical compound O[N+]([O-])=O GRYLNZFGIOXLOG-UHFFFAOYSA-N 0.000 description 4
- 229910052769 Ytterbium Inorganic materials 0.000 description 4
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 4
- 229910000147 aluminium phosphate Inorganic materials 0.000 description 4
- 238000005530 etching Methods 0.000 description 4
- 238000009434 installation Methods 0.000 description 4
- 229910017604 nitric acid Inorganic materials 0.000 description 4
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 3
- 230000000875 corresponding effect Effects 0.000 description 3
- 230000008018 melting Effects 0.000 description 3
- 238000002844 melting Methods 0.000 description 3
- 239000011259 mixed solution Substances 0.000 description 3
- 229910052760 oxygen Inorganic materials 0.000 description 3
- 239000001301 oxygen Substances 0.000 description 3
- 238000005268 plasma chemical vapour deposition Methods 0.000 description 3
- 239000002356 single layer Substances 0.000 description 3
- 229910052765 Lutetium Inorganic materials 0.000 description 2
- 229910052770 Uranium Inorganic materials 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 2
- 230000003078 antioxidant effect Effects 0.000 description 2
- 230000005540 biological transmission Effects 0.000 description 2
- 238000004364 calculation method Methods 0.000 description 2
- 239000000470 constituent Substances 0.000 description 2
- 238000009826 distribution Methods 0.000 description 2
- 238000000921 elemental analysis Methods 0.000 description 2
- 239000007789 gas Substances 0.000 description 2
- 150000002739 metals Chemical class 0.000 description 2
- 229910052715 tantalum Inorganic materials 0.000 description 2
- 229910052721 tungsten Inorganic materials 0.000 description 2
- JFALSRSLKYAFGM-UHFFFAOYSA-N uranium(0) Chemical compound [U] JFALSRSLKYAFGM-UHFFFAOYSA-N 0.000 description 2
- UGFAIRIUMAVXCW-UHFFFAOYSA-N Carbon monoxide Chemical compound [O+]#[C-] UGFAIRIUMAVXCW-UHFFFAOYSA-N 0.000 description 1
- 229910000713 I alloy Inorganic materials 0.000 description 1
- 238000004458 analytical method Methods 0.000 description 1
- 230000003064 anti-oxidating effect Effects 0.000 description 1
- 230000004888 barrier function Effects 0.000 description 1
- 229910052799 carbon Inorganic materials 0.000 description 1
- 238000005253 cladding Methods 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 238000001941 electron spectroscopy Methods 0.000 description 1
- 238000002265 electronic spectrum Methods 0.000 description 1
- 238000002149 energy-dispersive X-ray emission spectroscopy Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 229910052735 hafnium Inorganic materials 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 229910003437 indium oxide Inorganic materials 0.000 description 1
- PJXISJQVUVHSOJ-UHFFFAOYSA-N indium(iii) oxide Chemical compound [O-2].[O-2].[O-2].[In+3].[In+3] PJXISJQVUVHSOJ-UHFFFAOYSA-N 0.000 description 1
- 239000004615 ingredient Substances 0.000 description 1
- 238000007689 inspection Methods 0.000 description 1
- 238000003475 lamination Methods 0.000 description 1
- 239000011159 matrix material Substances 0.000 description 1
- 229910052750 molybdenum Inorganic materials 0.000 description 1
- 229910052758 niobium Inorganic materials 0.000 description 1
- 229910052757 nitrogen Inorganic materials 0.000 description 1
- 229910052698 phosphorus Inorganic materials 0.000 description 1
- 229920006395 saturated elastomer Polymers 0.000 description 1
- 238000000682 scanning probe acoustic microscopy Methods 0.000 description 1
- 229910052720 vanadium Inorganic materials 0.000 description 1
- 238000001039 wet etching Methods 0.000 description 1
- 229910052726 zirconium Inorganic materials 0.000 description 1
Classifications
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136286—Wiring, e.g. gate line, drain line
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1343—Electrodes
- G02F1/13439—Electrodes characterised by their electrical, optical, physical properties; materials therefor; method of making
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
Landscapes
- Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Optics & Photonics (AREA)
- Crystallography & Structural Chemistry (AREA)
- Chemical & Material Sciences (AREA)
- Mathematical Physics (AREA)
- Power Engineering (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Computer Hardware Design (AREA)
- Liquid Crystal (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Thin Film Transistor (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
Abstract
Description
528912 A7 B7 五、發明説明（1 ) 發明背景 (請先閱讀背面之注意事項再填寫本買) 本發明係關於一種以薄膜電晶體（T F T )所驅動的 主動矩陣式液晶顯示裝置。 相較於習知的陰極射線管，薄膜電晶體所驅動的液晶 顯示系統（T F T - L C D )正逐漸擴大其佔有市場而成 爲一種新型的影像顯示裝置，此種裝置能夠同時具有輕薄 的小型設計以及提昇的影像精細度。T F T - L C D包含 一玻璃基底，及形成於其上的一閘極佈線、一閘極絕緣 膜、資料佈線、被放置在接近該閘極佈線與資料佈線的交 叉點上之薄膜電晶體、連接到該薄膜電晶體的透明電極之 一絕緣保護膜、一正對基底（opposite substrate )，及一夾 在該玻璃基底與正對基底之間的液晶層。 經濟部智慧財產局員工消費合作社印製 近年來，隨著TFT - L CD朝向更大尺寸以及更高 精細度的增加趨勢，所以對於佈線材質的性能與品質之要 求，諸如低電阻、低應力及良好的可使用性等，要求得越 來越強烈。爲了符合這樣的需要，所以已經提出並且廣泛 使用一種具有低電阻與低應力之鋁基佈線材質。然而，鋁 的材質會產生一些問題，就是當由於低熱阻的原因致使溫 度上升時，容易在其表面上形成小丘（hillock)且不適合 與透明導電層（例如氧化銦（I T 0 )層）作電氣式的接 觸。 爲了解決這些問題，已經提出許多方法，例如將可與 透明導電層具有良好電氣式接觸的Mo堆疊在A 1膜上’ 以Μ 〇的壓縮應力而抵銷A 1的張力應力，藉此抑制小丘 本紙張尺度適用中.國國家標準（CNS )八4規格（210X297公釐） 經濟部智慧財產局員工消費合作社印製 528912 A7 _____ Β7 五、發明説明（2) 的形成（日本專利案No ·ΐΐ — 〇74537);以能 夠提供與透明導電層有良好電氣接觸的高熔點材質覆蓋在 A 1佈線表面上，以形成一敷蓋（cladding )結構（日本專 利案N 〇 · 6 - 1 2 0 5 0 3 ):將A 1製成合金以增加 A1本身的熱阻（日本專利案No · 7 - 045555) 以及疊層一具有與透明導電層良好電氣接觸的Μ 〇層以作 爲一上層（日本專利案No _4 — 020930)。 在使用A 1佈線時，不僅需要抑制A 1形成小丘，且 與透明導電層的電氣接觸須保持在一很小程度，還要使佈 線的剖面端形狀成爲錐形，用以確保絕緣層的覆蓋且提高 產量’且要簡化過程而又要確保處理的效果。 然而在將A1應用到TFT — LCD上時，上述習知 方法，其本身具有一些問題。 例如，根據此方法，其中與透明導電層有良好電氣式 接觸配置的Μ 〇是被疊層在A 1膜上以Μ 〇的壓縮應力而 抵銷A 1的張力應力，藉此抑制小丘的形成，必需使Μ 〇 具有足夠的厚度來抑制A 1的張力應力。然而，增加上層 厚度會引起整個佈線厚度的對應增加，且亦會使其難以將 佈線的上Μ 〇層之剖面形狀變成錐狀。如此導致絕緣膜的 不完全佈線覆蓋以及伴隨而來增加佈線短路的頻率且降低 產量。 在其中敷蓋結構是藉由提供與透明導電層有良好電氣 式接觸的一高熔點金屬而覆蓋A 1佈線表面而形成之方法 的情形中，上述這樣的處理相當複雜致使降低產量，由於 本紙張尺度適用中國國家標準（CNS ) A4規格（210X 297公釐) ~528912 A7 B7 V. Description of the invention (1) Background of the invention (Please read the precautions on the back before filling in this purchase) The present invention relates to an active matrix liquid crystal display device driven by a thin film transistor (T F T). Compared with the conventional cathode ray tube, a liquid crystal display system (TFT-LCD) driven by a thin film transistor is gradually expanding its market share and becoming a new type of image display device. Such a device can have a thin and light design as well as Improved image fineness. The TFT-LCD includes a glass substrate, and a gate wiring, a gate insulating film, a data wiring formed thereon, a thin film transistor placed near the intersection of the gate wiring and the data wiring, and connected to One of the transparent electrodes of the thin film transistor is an insulating protection film, an opposite substrate, and a liquid crystal layer sandwiched between the glass substrate and the opposite substrate. Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs in recent years, with the increasing trend of TFT-L CD towards larger size and higher fineness, the performance and quality requirements of wiring materials such as low resistance, low stress and Good usability, etc., is increasingly demanded. To meet such needs, an aluminum-based wiring material having low resistance and low stress has been proposed and widely used. However, the aluminum material has some problems. When the temperature rises due to low thermal resistance, it is easy to form hillocks on the surface and it is not suitable for use with transparent conductive layers (such as indium oxide (IT 0) layers). Electrical contact. In order to solve these problems, many methods have been proposed, such as stacking Mo on the A 1 film, which can have good electrical contact with the transparent conductive layer, to offset the tensile stress of A 1 with a compressive stress of M 0, thereby suppressing small Yakimoto paper standards are applicable. National National Standard (CNS) 8 4 specifications (210X297 mm) Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 528912 A7 _____ B7 5. Formation of the invention description (2) (Japanese Patent No. · ΐΐ — 〇74537); covering the surface of A 1 wiring with a high melting point material capable of providing good electrical contact with the transparent conductive layer to form a cladding structure (Japanese Patent No. 0.6-1 2 0 5 0 3): A1 is alloyed to increase the thermal resistance of A1 itself (Japanese Patent No. 7-045555) and a layer of MO with good electrical contact with a transparent conductive layer is laminated as an upper layer (Japan Patent No. 4 — 020930). When using A 1 wiring, not only must A 1 be prevented from forming hillocks, but the electrical contact with the transparent conductive layer must be kept to a small extent, and the shape of the cross-sectional end of the wiring must be tapered to ensure the insulation layer. Cover and increase yield 'while simplifying the process while ensuring the effectiveness of the process. However, when A1 is applied to a TFT-LCD, the above-mentioned conventional method has some problems in itself. For example, according to this method, M 0, which has a good electrical contact configuration with the transparent conductive layer, is laminated on the A 1 film to offset the tensile stress of A 1 with a compressive stress of M 0, thereby suppressing the hillock's To form, it is necessary to make MO sufficiently thick to suppress the tensile stress of A 1. However, increasing the thickness of the upper layer causes a corresponding increase in the thickness of the entire wiring, and it also makes it difficult to make the cross-sectional shape of the upper layer of the wiring into a tapered shape. This results in incomplete wiring coverage of the insulating film and concomitantly increases the frequency of wiring short circuits and reduces yield. In the case where the covering structure is formed by providing a high-melting-point metal that has good electrical contact with the transparent conductive layer to cover the surface of the A1 wiring, the above-mentioned processing is quite complicated, resulting in a reduction in yield. Standards are applicable to China National Standard (CNS) A4 specifications (210X 297 mm) ~
Ur--—----批衣----Ί--II------^ (請先閲讀背面之注意事項再填寫本頁) 528912 A7 _B7 五、發明説明（3 ) 在已經形成一 A 1佈線圖樣之後，照相平版印刷法的外周 (extra round )必需被導電用以形成一高熔點金屬作爲上 層。 (請先閱讀背面之注意事項再填寫本頁) 根據其中A 1被製成合金用以增強a 1本身的熱阻 性，且具有與透明導電層有良好電氣接觸的一 Μ 〇層被堆 疊作爲一上層之方法中，必需提供乾蝕刻電阻到上層Μ 〇 合金，由於接觸孔（形成在絕緣膜中用以電氣式連接佈線 及/或在其他層中的電極的孔）是被藉由乾蝕刻而形成在 覆蓋佈線的絕緣膜中，且這樣的乾蝕刻電阻必需藉由添加 C r到上層Μ 〇合金或增加上層厚度而獲得。然而，添加 C r到上層Mo合金會引起Mo合金蝕刻速率的下降，如 此會變得難以控制佈線剖面以得到想要的錐形形狀。即使 可以發現能獲得想要的錐形之最佳條件，但是其處理邊界 仍舊很窄，且難以維持具有大尺寸基底之一致的共平面結 構，導致佈線短路的頻率增加以及產量的減少。層厚度的 增加亦因上述原因而導致產量減少。 發明槪述 經濟部智慧財產局員工消費合作社印製 本發明的一目的是要提供··一種液晶顯示裝置，使用 A 1佈線而能抑制小丘的形成，提供與透明導電層有良好 電氣式接觸，且可以使佈線的剖面端形狀如願地形成錐 狀，且此液晶裝置在製造程序上亦相當簡單且產量很高； 及一種用於製造這樣的液晶顯示裝置之處理。 本發明提供一液晶裝置，包含一對基底，其中至少一 本紙張尺度適用中國國家標準（CNS ) A4規格（210X297公楚） -6- 528912 A7 _____B7 五、發明説明（4 ) (請先閱讀背面之注意事項再填寫本頁) 個是透明的、一液晶層被夾在該對基底之間，及一組電極 被放置在至少一個該對基底上，其中在該液晶層中的液晶 是被藉由該電極組而移動以控制顯示，其特徵爲： 該電極組是被放置在至少一個該對基底上面，包含至 少多數閘極佈線及被配置以跨接該多數閘極佈線的多數資 料佈線； 薄膜電晶體是被放置以相應於該多數閘極佈線與該多 數資料佈線的個別交叉點； 該多數閘極佈線與多數資料佈線之至少一個係包含具 有一 A 1合金膜形成於其上的疊層佈線、及除了 a 1以外 的金屬之上層膜； 該A 1合金膜是被經由一形成在覆蓋該疊層佈線的絕 緣膜中之接觸孔而連接到透明導電層；且 在該A 1合金膜中所添加的元素之濃度在表面是高於 在A 1合金膜的內層； 及一*用於製造追樣的液晶顯7K裝置之方法。 經濟部智慧財產局員工消費合作社印製 本發明進一步提供一液晶顯示裝置，包含一對基底， 其中至少一個是透明的、一液晶層被夾在該對基底之間， 及一組電極被放置在至少一個該對基底上，其中在該液晶 層中的液晶是被藉由該電極組而移動以控制顯示，其特徵 爲： 該電極組是被放置在至少一個該對基底上面，包含至 少多數閘極佈線及被配置以跨接該多數閘極佈線的多數資 料佈線； 本紙張尺度適用中國國家標準（CNS ) A4規格（210X297公釐） ~ " ' 528912 經濟部智慧財產局員工消費合作社印製 A7 _B7_五、發明説明（5 ) 一半導體層是以一放置在中間的絕緣膜而形成在該閘 極佈線上面， 該資料佈線、汲極電極與源極電極各包含具有一 A 1 合金膜形成於其上的疊層佈線、及除了 A 1以外的金屬之 上層膜； 該A 1合金膜是被經由一形成在覆蓋該疊層佈線的絕 緣膜中之接觸孔而連接到透明導電層；且 在該A 1合金膜中所添加的元素之濃度在表面是高於 在A 1合金膜的內層； 及一用於製造這樣的液晶顯示裝置之方法。 簡易圖示說明 圖1是根據本發明的液晶顯示裝置之槪略平面圖。 圖2 A及2 B分別是在根據本發明的液晶顯示裝置 中，一薄膜電晶體及其周圍與一閘極終端及其周圍的剖面 圖。 圖3 A及3 B是圖形，顯示在接觸孔2 0的深度方向 之部位上所作的元素分析結果，在其中A 1合金膜4 0 1 及透明導電層9在圖2A的裝置中是彼此直接接觸之處， 以及顯不在接觸孔的涂度方向之部位上所作的兀素分析結 果，在其中A 1膜與透明導電層是彼此直接接觸在一液晶 顯示裝置中，此裝置是以如圖2 A的裝置之相同方法利用 疊層佈線的純A 1而製造的。 圖4是圖2 A的剖面a之槪略放大圖形，顯示觀察的 本紙張尺度適用中國國家標準（CNS ) A4規格（210X 297公釐） (請先閱讀背面之注意事項再填寫本頁)Ur ------- batch clothes ---- Ί--II ------ ^ (Please read the precautions on the back before filling this page) 528912 A7 _B7 V. Description of the invention (3) After forming an A1 wiring pattern, the extra round of the photolithography process must be electrically conductive to form a high melting point metal as an upper layer. (Please read the precautions on the back before filling this page) According to which A 1 is made of alloy to enhance the thermal resistance of a 1 itself, and a 〇 〇 layer with good electrical contact with the transparent conductive layer is stacked as In an upper layer method, it is necessary to provide dry etching resistance to the upper MO alloy, because the contact holes (holes formed in the insulating film to electrically connect wiring and / or electrodes in other layers) are dry-etched. It is formed in the insulating film covering the wiring, and such a dry etching resistance must be obtained by adding C r to the upper MO alloy or increasing the thickness of the upper layer. However, the addition of C r to the upper layer of the Mo alloy causes a decrease in the etching rate of the Mo alloy, and thus it becomes difficult to control the wiring profile to obtain a desired tapered shape. Even though the best conditions for obtaining the desired taper can be found, the processing boundary is still very narrow, and it is difficult to maintain a consistent coplanar structure with a large-sized substrate, resulting in an increase in the frequency of wiring shorts and a reduction in yield. The increase in layer thickness also leads to a decrease in yield due to the above reasons. Description of the invention: Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economics. One purpose of the present invention is to provide a liquid crystal display device that uses A 1 wiring to suppress the formation of hillocks and provide good electrical contact with the transparent conductive layer. And, the cross-sectional end shape of the wiring can be formed into a cone shape as desired, and the manufacturing process of this liquid crystal device is also quite simple and high in yield; and a process for manufacturing such a liquid crystal display device. The present invention provides a liquid crystal device including a pair of substrates, at least one of which has a paper size that conforms to the Chinese National Standard (CNS) A4 specification (210X297 Gongchu) -6- 528912 A7 _____B7 V. Description of the invention (4) (Please read the back first Note that you need to fill in this page again) are transparent, a liquid crystal layer is sandwiched between the pair of substrates, and a set of electrodes are placed on at least one of the pair of substrates, where the liquid crystal in the liquid crystal layer is borrowed The electrode group moves to control the display, and is characterized in that: the electrode group is placed on at least one of the pair of substrates and includes at least a majority of gate wirings and a majority of data wirings configured to bridge the majority of gate wirings; Thin film transistors are placed to correspond to individual intersections of the majority gate wiring and the majority data wiring; at least one of the majority gate wiring and the majority data wiring includes a stack having an A 1 alloy film formed thereon. Layer wiring, and a film over metal other than a 1; the A 1 alloy film is connected to the transparent via a contact hole formed in an insulating film covering the laminated wiring The conductive layer; and the concentration of element A 1 of the added alloy film on the surface of the inner layer is higher than A 1 alloy film; and a method for manufacturing a catch * 7K kind of liquid crystal display device. Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economics The present invention further provides a liquid crystal display device including a pair of substrates, at least one of which is transparent, a liquid crystal layer is sandwiched between the pair of substrates, and a set of electrodes is placed on The at least one pair of substrates, in which the liquid crystal in the liquid crystal layer is moved by the electrode group to control the display, is characterized in that the electrode group is placed on at least one of the pair of substrates and contains at least a majority of gates. Pole wiring and most data wiring configured to bridge the majority of the gate wiring; This paper size applies to China National Standard (CNS) A4 specification (210X297 mm) ~ " '528912 Printed by the Employees ’Cooperative of Intellectual Property Bureau of the Ministry of Economic Affairs A7 _B7_ V. Description of the invention (5) A semiconductor layer is formed on the gate wiring by an insulating film placed in the middle. The data wiring, the drain electrode, and the source electrode each include an A 1 alloy film. A laminated wiring formed thereon, and a metal upper layer film other than A 1; the A 1 alloy film is formed to cover the laminated wiring via a The contact hole in the insulating film is connected to the transparent conductive layer; and the concentration of the element added in the A 1 alloy film is higher on the surface than the inner layer of the A 1 alloy film; and a method for manufacturing such a liquid crystal display Method of installation. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a schematic plan view of a liquid crystal display device according to the present invention. 2A and 2B are cross-sectional views of a thin film transistor and its surroundings and a gate terminal and its surroundings, respectively, in a liquid crystal display device according to the present invention. Figures 3A and 3B are graphs showing the results of elemental analysis on the depth-direction portion of the contact hole 20, in which the A 1 alloy film 4 0 1 and the transparent conductive layer 9 are directly connected to each other in the device of FIG. 2A The result of the element analysis on the contact area and the part showing the coating direction of the contact hole, in which the A 1 film and the transparent conductive layer are in direct contact with each other in a liquid crystal display device, the device is as shown in FIG. 2 The same method of the device of A is manufactured using pure A 1 of laminated wiring. Figure 4 is a slightly enlarged figure of section a of Figure 2 A, showing the observed paper size applicable to the Chinese National Standard (CNS) A4 specification (210X 297 mm) (Please read the precautions on the back before filling this page)
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、1T 線 528912 經濟部智慧財產局員工消費合作社印製 A7 B7 五、發明説明（6) 結果。 圖5是用以硏究範例3中的電氣接觸之一佈線圖樣的 槪略平面圖。 圖6 A及6 B是沿著圖5的線A 一 A，所作的槪略剖面 圖。 圖7 A及7 B是在範例5中的佈線之槪略剖面圖。 主 要元件對照表 1 閘極佈線 2 資料佈線 3 汲極電極 4 源極電極 5 閘極絕緣膜 6 半導體膜 7 η +半導體層 8 保護膜 9 透明導電層 1 〇 玻璃基底 2 〇 接觸孔 2 1 接觸孔 3 〇 圖素 3 1 閘極佈線終端組 3 2 資料佈線終端組 3 3 表面部位 本紙張尺度適用中國國家標準（CNS ) A4規格（210X 297公釐） ------V-----裝----Ί--訂------線 (請先閲讀背面之注意事項再填寫本頁) -9- 528912 經濟部智慧財產局員工消費合作社印製 A7 B7五、發明説明（7 ) 41 玻璃基底 4 2 A 1合金膜 4 3 上層膜 4 4 A 1合金佈線 4 5 角 5 0 A 1合金佈線 5 1 絕緣膜 5 2 透明導電層 5 3 電極墊 5 4 接觸孔 55 玻璃基底 10 1 A 1合金膜 102 上層膜 3 0 1 A 1合金膜 302 上層膜 303 下層膜 4 0 1 A 1合金膜 402 上層膜 403 下層膜 5〇1 A 1合金膜 502 上層膜 較佳實施例之詳細說明 根據本發明，設有一種液晶顯示裝置作爲其第一實施 (請先閲讀背面之注意事項再填寫本頁) .裝· 、-口 線 本紙張尺度適用中國國家標準（CNS ) A4規格（210 X 297公釐） -10- 528912 A7 B7 五、發明説明（8) 例，包含一對基底，其中至少一個是透明的、一液晶層被 放置在該對基底之間，及一組電極被放置在至少一個該對 基底上，該組電極包含至少多數閘極佈線及被配置以跨接 該閘極佈線之多數資料佈線，其中薄膜電晶體是被放置相 應於該多數閘極佈線及多數資料佈線的個別交叉點上，至 少該閘極佈線與資料佈線之一係包含具有一 A 1合金膜形 成於其上的疊層佈線，以及除了 A 1之外的金屬之上層 膜；該A 1合金膜是被經由形成在絕緣層中覆蓋此疊層層 的一接觸孔而連接到透明導電層；且在該A 1合金膜中添 加元素的濃度分布是在表面的濃度係高於在A 1合金膜的 內層。 根據此實施例，當A 1合金被用作爲佈線材質時，可 以抑制小丘的形成且防止A 1合金膜的表面區域氧化，而 可以使液晶顯示裝置能夠在A 1佈線與透明導電層之間提 供良好電氣接觸。 而且，藉由調整添加到A 1合金膜中的元素濃度，最 好是使元素的濃度被添加到至少固體溶解度極限（solid solubility limit)，最好是是使濃度成爲至少2 0倍的固體 溶解度極限，它可以進一步增加在A 1合金膜表面中所添 加的元素之濃度。如此具有防止在A 1合金膜表面的氧 化，以改善在A 1合金膜與透明導電層之間的電氣接觸。 在A1合金膜中，最好至少γ，La，Ce ，Pr ， Nd，Sm，Eu，Gd，Tb，Dy，Ho，Er ，Line 1T 528912 Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs A7 B7 V. Description of Invention (6) Results. FIG. 5 is a schematic plan view for studying a wiring pattern of one of the electrical contacts in Example 3. FIG. 6A and 6B are schematic cross-sectional views taken along line A-A of FIG. 5. 7A and 7B are schematic cross-sectional views of wirings in Example 5. Main component comparison table 1 Gate wiring 2 Data wiring 3 Drain electrode 4 Source electrode 5 Gate insulating film 6 Semiconductor film 7 η + Semiconductor layer 8 Protective film 9 Transparent conductive layer 1 〇Glass substrate 2 〇Contact hole 2 1 Contact Hole 3 〇Pixel 3 1 Gate wiring terminal group 3 2 Data wiring terminal group 3 3 Surface parts This paper size is applicable to China National Standard (CNS) A4 specification (210X 297 mm) ------ V --- --Install ---- Ί--order ------ line (please read the notes on the back before filling this page) -9- 528912 Printed by A7 B7, Consumer Cooperative of Intellectual Property Bureau, Ministry of Economic Affairs Explanation (7) 41 glass substrate 4 2 A 1 alloy film 4 3 upper film 4 4 A 1 alloy wiring 4 5 corner 5 0 A 1 alloy wiring 5 1 insulating film 5 2 transparent conductive layer 5 3 electrode pad 5 4 contact hole 55 Glass substrate 10 1 A 1 alloy film 102 upper film 3 0 1 A 1 alloy film 302 upper film 303 lower film 4 0 1 A 1 alloy film 402 upper film 403 lower film 50 1 A 1 alloy film 502 upper film DETAILED DESCRIPTION OF EXAMPLES According to the present invention, a liquid crystal display device is provided as its One implementation (please read the precautions on the back before filling this page). The size of the paper is applicable to the Chinese National Standard (CNS) A4 specification (210 X 297 mm) -10- 528912 A7 B7 V. Invention Explanation (8) Example, including a pair of substrates, at least one of which is transparent, a liquid crystal layer is placed between the pair of substrates, and a set of electrodes is placed on at least one of the pair of substrates, the set of electrodes including at least a majority Gate wiring and most data wirings configured to bridge the gate wiring, where thin film transistors are placed at individual intersections corresponding to the majority of gate wirings and most data wirings, at least the gate wiring and data wiring One system includes a laminated wiring having an A 1 alloy film formed thereon, and a metal upper layer film other than A 1; the A 1 alloy film is formed by covering the laminated layer in an insulating layer. A contact hole is connected to the transparent conductive layer; and the concentration distribution of the added element in the A 1 alloy film is higher than that in the inner layer of the A 1 alloy film. According to this embodiment, when the A 1 alloy is used as a wiring material, the formation of hillocks can be suppressed and the surface area of the A 1 alloy film can be prevented from being oxidized, so that the liquid crystal display device can be between the A 1 wiring and the transparent conductive layer. Provide good electrical contact. Furthermore, by adjusting the element concentration added to the A 1 alloy film, it is preferable that the element concentration is added to at least the solid solubility limit, and it is preferable that the concentration be at least 20 times the solid solubility. Limit, it can further increase the concentration of elements added to the surface of the A 1 alloy film. This has the effect of preventing oxidation on the surface of the Al alloy film to improve the electrical contact between the Al alloy film and the transparent conductive layer. In the A1 alloy film, it is preferable that at least γ, La, Ce, Pr, Nd, Sm, Eu, Gd, Tb, Dy, Ho, Er,
Tm，Yb及Lu之一種元素是被包含在具有至少 本紙張尺度適用中國國家標準（CNS ) Α4規格（210Χ297公釐） ------‘-----裝-- (請先閱讀背面之注意事項再填寫本頁)One element of Tm, Yb and Lu is included in a paper with at least this paper size applicable to China National Standard (CNS) A4 specification (210 × 297 mm) ------'----- install-(Please read first (Notes on the back then fill out this page)
、1T 線 經濟部智慧財產局員工消費合作社印製 -11 - 528912 A7 ___ B7 五、發明説明（9) 0 . 2，最好是0 . 8或更多的原子百分比之總量中。 (請先閱讀背面之注意事項再填寫本頁) 而且，藉由將疊層佈線的上層膜之厚度界定在至多 5 0 nm，最好是2 0到5 0 nm，且藉由使a 1合金膜 的剖面端形狀成爲錐狀而遠離基底側，如此可以確保覆蓋 在疊層佈線上的絕緣層’且縮小電線的短路。 而且，在本發明的實施例中，上層膜是由Mo或主要 成分爲Mo的一合金。例如，含有Mo作爲主要元素的合 金之範例，在雙成分合金的情形中爲：Μ 〇 - Z r (1. Line 1T Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs -11-528912 A7 ___ B7 V. Description of the invention (9) 0.2, preferably 0.8 or more of the total atomic percentage. (Please read the precautions on the back before filling this page.) Also, by limiting the thickness of the upper film of the laminated wiring to at most 50 nm, preferably 20 to 50 nm, and by making a 1 alloy The shape of the cross-sectional end of the film is tapered and away from the substrate side, so that the insulation layer covering the laminated wiring can be ensured and the short circuit of the electric wire can be reduced. Moreover, in the embodiment of the present invention, the upper film is made of Mo or an alloy whose main component is Mo. For example, an example of an alloy containing Mo as a main element is, in the case of a two-component alloy, Μ0-Z r (
Zr :大約42 %原子百分比或更少）；Mo—Hf (H f :大約至少4 0 %原子百分比或更少）；Μ 〇 - W ( W : 大約2 8 %原子百分比或更少）；Μ 〇 - T i ( T i :大約 2 2 %原子百分比或更少）；Μ 〇 — N b ( N b :大約1 4 %原子百分比或更少）；Μ 〇 - C r ( C r :大約1 2 %原 子百分比或更少）；Μ 〇 - T a ( 丁 a :大約1 1 %原子百 分比或更少）；Μ 〇 — V ( V :隨意量）。如此可一次增 進A 1合金膜與上層膜的蝕刻，且進一步簡化製程。 經濟部智慧財產局員工消費合作社印製 根據本發明第二實施例，設有一種液晶顯示裝置：包 含一對基底，其中至少一個是透明的，一液晶層被夾在該 對基底之間，且一組電極是被放置在該對基底之一上面， 其中在液晶層中的液晶是藉由該組電極而移動以控制顯 示，其中··被放置在該對基底之一上的此組電極包含至少 多數閘極佈線與被配置以跨接該閘極佈線的多數資料佈 線；薄膜電晶體是被放置以相應於該閘極佈線與資料佈線 的個別交叉點鐘；一半導體層是以一絕緣層放置於中間而 -12- 本紙張尺度適用中國國家標準（CNS ) A4規格（210X297公釐） 528912 A7 B7 經濟部智慧財產局員工消費合作社印製 五、 發明説明（10) 1 I 形 成 在 閘 極佈線上面；該資料佈線、汲極電極 與 源 極 電 極 1 1 均 包 含 具 有一 A 1合金膜且形成於其上的疊層 佈 線 5 及 除 1 了 A 1 之 外的金屬之上層膜；該A 1合金膜是 經 由 形 成 在 /—S 1 ( 絕 緣 膜 中 覆蓋疊層佈線的一接觸孔而連接到 一 透 明 導 電 請 先 閲 1 I 層 且 在 A 1合金膜中所添接元素的濃度分布 是 在 表 面 的 讀 背 面 1 1 濃 度 是 局 於在A 1合金膜的內層中之濃度。 之 注 音 Γ 在 此 實施例中，如同上一個，可以獲得相 同 的 效 果 > 事 項 1 藉 由 合 倂 相同的機構，例如：將添加到A 1合 金 膜 的 元 素 丹 婆 舄 本 1 裝 濃 度 界 定 在固體溶解度極限上面；將用於A 1 的 添 加 元 素 頁 1 I 之 固 體 溶 解度極限設定在0 · 1 %原子百分比或 更 低 ； 以 至 1 1 I 少 〇 學 2 %原子百分比的量添加例如Y的元素到 A 1 合金 膜 1 中 使 疊 層佈線的上層膜厚度成爲5 0 n m或 更 少 ； 以 一 1 訂 Μ 〇 基 合 金構成上層膜；將A 1合金膜的剖 面. 端 製 成 錐 1 1 狀 > 及 使 疊層佈線具有一 A 1合金膜及一除了 A 1 之 外 的 1 I 金 屬 所 製 成的下層。 1 1 I 而 且 ，該資料佈線是由疊層佈線所組成， 該 疊 層 佈 線 1 線 包 含 — 個 除了 A 1之外的金屬之下層膜，例如 T i 5 V 1 1 C r > Ζ r ，Nb ，M〇，Hf ，Ta ，W 或 這 元 素 的 ! 1 合 金 3 在 A 1合金膜下面。如此的配置能夠導 電 且 進 一 步 1 I 改 善 在 A 1合金佈線（或該資料佈線）與半導 體 層 之 間 的 1 1 I · 電 氣 接 觸 〇 I 例 如 ，可以下列方式製造本發明第一實施 例 的 液 晶 顯 1 1 示 裝 置 〇 1 ! 首 先 ，構成閘極佈線與閘極電極的一 A 1 合 金 膜 與 其 1 1 1 本紙張尺度適用中國國家標準（CNS ) A4規格（210X297公釐） 528912 經濟部智慈財產局員工消費合作社印製 A7 ___ B7_五、發明説明（11) 上層膜是被連續沉澱在一基底上而沒有破壞真空，且閘極 佈線與閘極電極被產生圖樣。然後一閘極絕緣膜是被沉澱 以2 0 0 °C或更尚的基底溫度，接著是一內部非晶形s i 膜與一摻入的非晶形S i膜沉澱於其上，以及將這些膜製 成圖樣。然後沉澱構成資料佈線、源極電極與汲極電極的 金屬膜’接著將資料佈線、源極電極與汲極電極製成圖 樣，以及將位在源極電極與汲極電極之間的間隙的摻入非 結晶S i膜移除。然後沉澱一保護絕緣膜，且在閘極佈線 端上的閘極絕緣膜與保護絕緣膜以及在資料佈線端上的保 護絶緣膜以及源極電極是被藉由乾蝕刻而移除以形成接觸 孔。然後一透明導電層被沉澱且一透明電極膜被製成圖 樣。藉由上述步驟完成一薄膜電晶體基底。接著，此薄膜 電晶體基底被裝附到另一個以濾色器等所安裝的基底，而 以一特定間隔在中間，且液晶是被密封在此間隔中。然後 一液晶驅動電路被連接到閘極佈線與資料佈線的終端以製 造液晶顯不裝置。 例如’可以下列步驟製造根據本發明第二實施例的液 晶顯示裝置。 首先，構成閘極佈線與閘極電極的金屬膜是被沉源在 一基底上’且閘極佈線與聞極電極被製成圖樣。然後沉澱 一閘極絕緣膜，接著進一步將一內部非結晶s i膜及一摻 入非結晶S i膜沉澱於其上，且將這些膜製成圖樣。然後 構成貪料佈線、源極電極與汲極電極的一下層膜、一 A 1 合金膜與一上層膜是被連續沉源而沒有破壞真空，接著將 本紙張尺度適用中國國家標準（CNS ) A4規格（210X297公釐） — ----- -14 - (請先閱讀背面之注意事項再填寫本頁) * ΙΊ IJI · •裝·Zr: about 42% atomic percent or less); Mo—Hf (Hf: about at least 40% atomic percent or less); M0-W (W: about 28% atomic percent or less); M 〇- T i (T i: about 22% atomic percent or less); 〇— N b (Nb: about 14% atomic percent or less); 〇- C r (Cr: about 1 2% atomic percent or less); Mo-T a (but a: about 11% atomic percent or less); Mo-V (V: arbitrary amount). In this way, the etching of the A 1 alloy film and the upper film can be increased at one time, and the manufacturing process is further simplified. Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs, according to a second embodiment of the present invention, a liquid crystal display device is provided, including a pair of substrates, at least one of which is transparent, and a liquid crystal layer is sandwiched between the pair of substrates, A set of electrodes is placed on one of the pair of substrates, where the liquid crystal in the liquid crystal layer is moved by the set of electrodes to control the display, where the set of electrodes placed on one of the pair of substrates contains At least most of the gate wirings and most of the data wirings configured to bridge the gate wirings; thin film transistors are placed at individual crossing points corresponding to the gate and data wirings; a semiconductor layer is an insulating layer Placed in the middle and -12- This paper size applies Chinese National Standard (CNS) A4 specification (210X297 mm) 528912 A7 B7 Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 5. Description of the invention (10) 1 I formed at the gate Above the wiring; the data wiring, the drain electrode, and the source electrode 1 1 each include a laminated wiring 5 having an A 1 alloy film formed thereon, and Except for 1 A1, a metal upper layer film; the A1 alloy film is connected to a transparent conductive layer through a contact hole formed in / —S1 (the insulating film covering the laminated wiring. Please read the 1I layer first And the concentration distribution of the added elements in the A 1 alloy film is on the read surface of the surface. The 1 1 concentration is local to the concentration in the inner layer of the A 1 alloy film. Note in this embodiment, as in the previous one , The same effect can be obtained> Matter 1 By combining the same mechanism, for example: the concentration of the element danpoxuan added to the A 1 alloy film is defined above the solid solubility limit; it will be used for the addition of A 1 Element page 1 The solid solubility limit of I is set at 0 · 1% atomic percent or lower; adding 1 element such as Y to A 1 alloy film 1 in an amount of 1 1 I less 0% 2 atomic percent to make the laminated wiring The thickness of the upper layer film is 50 nm or less; the upper layer film is formed by a 1 M 〇 based alloy; the cross section of the A 1 alloy film is made into a cone 1 1 Shape> and make the laminated wiring have an A 1 alloy film and a lower layer made of 1 I metal other than A 1. 1 1 I Furthermore, the data wiring is composed of a laminated wiring, the laminate Wiring 1 The wire contains a film under metal other than A 1, such as Ti 5 V 1 1 C r > Zr, Nb, Mo, Hf, Ta, W or this element! 1 Alloy 3 in A 1 alloy film underneath. Such a configuration can conduct electricity and further improve the 1 1 I electrical contact between the A 1 alloy wiring (or the data wiring) and the semiconductor layer. For example, the liquid crystal display of the first embodiment of the present invention can be manufactured in the following manner. 1 1 Display device 〇1! First, an A 1 alloy film and its 1 1 1 constituting the gate wiring and the gate electrode are applicable to the Chinese National Standard (CNS) A4 specification (210X297 mm) 528912 Intellectual Property of the Ministry of Economic Affairs Printed by the Bureau ’s Consumer Cooperatives A7 ___ B7_ V. Description of the invention (11) The upper film is continuously deposited on a substrate without breaking the vacuum, and the gate wiring and gate electrodes are patterned. Then a gate insulating film is deposited at a substrate temperature of 200 ° C or higher, followed by an internal amorphous si film and an incorporated amorphous Si film deposited thereon, and these films are formed Into a pattern. Then deposit the metal film forming the data wiring, the source electrode and the drain electrode, and then pattern the data wiring, the source electrode and the drain electrode, and dope the gap between the source electrode and the drain electrode. Remove the amorphous Si film. A protective insulating film is then precipitated, and the gate insulating film and the protective insulating film on the gate wiring end, and the protective insulating film and the source electrode on the data wiring end are removed by dry etching to form a contact hole. . A transparent conductive layer is then precipitated and a transparent electrode film is patterned. A thin film transistor substrate is completed by the above steps. Then, the thin film transistor substrate is attached to another substrate mounted with a color filter or the like, with a specific interval in the middle, and the liquid crystal is sealed in this interval. A liquid crystal driving circuit is then connected to the gate and data wiring terminals to make a liquid crystal display device. For example, 'the liquid crystal display device according to the second embodiment of the present invention can be manufactured in the following steps. First, the metal film constituting the gate wiring and the gate electrode is sunk on a substrate 'and the gate wiring and the electrode are patterned. Then, a gate insulating film is precipitated, and then an internal amorphous Si film and a doped amorphous Si film are further deposited thereon, and these films are patterned. Then, the bottom layer film, an A 1 alloy film and an upper layer film of the source wiring, the source electrode and the drain electrode are continuously sinked without breaking the vacuum, and then the paper size is applied to the Chinese National Standard (CNS) A4 Specifications (210X297mm) — ----- -14-(Please read the precautions on the back before filling out this page) * ΙΊ IJI · • equipment ·
、1T 線 528912 A7 B7 五、發明説明（12) (請先閱讀背面之注意事項再填寫本頁) 資料佈線、源極電極與汲極電極製成圖樣，以及將在源極 電極與汲極電極之間的間隙之摻入非結晶s i膜移除。然 後一保護絕緣膜是被以2 0 0 ° C或更高的基底溫度而沉 澱，且在閘極佈線端上的閘極絕緣膜與保護絕緣膜以及在 資料佈線端上的保護絕緣膜以及源極電極是被藉由乾蝕刻 而移除以形成接觸孔。然後一透明導電層被沉澱且一透明 電極膜被製成圖樣。藉由上述步驟完成一薄膜電晶體基 底。接著，此薄膜電晶體基底被裝附到另一個以濾色器等 所安裝的基底，以一特定間隔在中間，且液晶是被密封在 此間隔中。然後一液晶驅動電路被連接到閘極佈線與資料 佈線的終端以製造液晶顯示裝置。 在以下的範例中，可以更加詳細地說明本發明，但是 要了解的是本發明的範圍並不被侷限在這些範例中。 範例1 經濟部智慧財產局員工消費合作社印製 此範例係關於其中使用包含一 A 1合金膜及一上層膜 的兩層疊層膜作爲液晶顯示裝置的閘極佈線，而使用含有 一 A 1合金膜、一上層膜及一下層膜的三層疊層膜作爲資 料佈線以透明導電層以及在閘極佈線與資料佈線之間的絕 緣而計算閘極佈線與資料佈線的電氣接觸之情形。 圖1是此範例液晶顯示裝置的槪略平面圖。連接到閘 極佈線1的一閘極佈線終端組3 1及連接到資料佈線2的 貪料佈線終端組3 2是被如圖中所示相對於圖素3 〇而放 置。在圖1中的參考數字1 〇標示一玻璃基底。 本紙張尺度適用中國國家標準（CNS ) A4規格（aox：297公麓） -15 - 528912 Α7 Β7 經濟部智慧財產局員工消費合作社印製 五、發明説明（13) 圖2 A是一薄膜電晶體的剖面圖，被放置在接近閘極 佈線1與資料佈線2的交叉點，且圖2 B是一閘極佈線終 端的剖面圖。以下顯示用於製造此薄膜電晶體（T F T ) 的方法。 在一玻璃基底1 0上，含2 %原子百分比N d的A 1被 放置以形成一 A 1合金膜1 〇 1 ，而Mo被藉由DC濺射 以相繼形成一上層膜1 0 2。基底溫度被設定在1 2 0 °C。然後藉由照相石版印刷而在疊層膜上形成一阻抗圖樣 (resist pattern)，且A 1合金膜1 〇 1與上層膜1 〇 2是 被藉由磷酸、硝酸、乙酸及純水的混合溶液蝕刻以形成閘 極佈線與閘極電極1。 然後，使用電漿C V D，將S i N、非結晶S i與P 摻入型非結晶S i以在3 0 0 ° C的基底溫度連續沉澱而分 別形成一閘極絕緣膜4、半導體層6及一 η +半導體層。然 後藉由照相石版印刷而形成一阻抗圖樣，且半導體層6與 η 半導體層7是被乾蝕刻成一孤島結構。 其次，Μ 〇、含2 %原子百分比N d的A 1與Μ 〇被連 續以此順序藉由D C濺射而沉澱以分別形成下層膜 3〇3 ，4〇3 ，A1合金膜301 ，401及上層膜 302 ’ 402。基底溫度是被設置在120〇C。藉由照 相石版印刷而在疊層膜上形成一阻抗圖樣，且下層膜 303 ’ 403、A1合金膜301，401及上層膜 3 〇 2 ’ 4 0 2是被藉由磷酸、硝酸、乙酸及純水的混合 溶液鈾刻以形成資料佈線與汲極電極3與源極電極4。η + (請先閱讀背面之注意事項再填寫本頁) •裝· 、1Τ 本紙張尺度適用中國國家榡準（CNS ) Α4規格（210X297公釐） -16- 528912 A7 B7 五、發明説明（ 半導體層7亦被乾蝕刻。 而且，藉由電漿CVD以2 0 0°C或更高的基底溫 度，最好是2 5 0 °C，沉澱S i N以形成一保護膜8。藉 由照相石版印刷而形成一阻抗圖樣，且在閘極佈線終端部 位接觸孔2 1中的閘極絕緣膜5、保護膜8與上層膜 1 0 2是被濕蝕刻且在薄膜電晶體部位接觸孔2 0中的保 護膜8與上層膜3 0 2，4 0 2是亦被乾蝕刻，接著以充 分的純水淸洗。 之後，藉由D C濺射在2 1 5 t的基底溫度沉澱用於 形成透明導電層9的I T〇。藉由照相石版印刷而形成一 阻抗圖樣，且I T〇被蝕刻以形成一透明導電層9。經由 上述過程，製造用於液晶顯示裝置的T F T。 表1顯示出是否在A 1合金膜與閘極佈線及資料佈線 的透明導電層之間已經建立電氣接觸，以及在閘極佈線與 資料佈線之間的絕緣之檢查結果，以閘極佈線上層膜厚度 作爲參數所製成的液晶顯示面板作比較。 l—i--.-----裝-- (請先閱讀背面之注意事項再填寫本頁) 訂 線 經濟部智慧財產局員工消費合作社印製 本紙張尺度適用中國國家標準（CNS ) A4規格（210 X 297公釐） -17- 528912 Α7 Β7 五、發明説明（3 表1 上層膜的厚度 (nm) 是否已經實行 電氣接觸 製造的液晶顯 示裝置之數目 具有短路問題 的液晶顯不裝 置之數目 0 未實行 10 4 20 實行 10 0 50 實行 10 1 100 實行 10 5 200 實行 10 8 300 實行 10 10 ------：-----批衣|應 (請先閱讀背面之注意事項再填寫本頁)、 1T line 528912 A7 B7 V. Description of the invention (12) (Please read the precautions on the back before filling out this page) Data wiring, source electrode and drain electrode are made into patterns, and the source and drain electrodes The gap between the doped amorphous Si film was removed. Then a protective insulating film is precipitated at a substrate temperature of 200 ° C or higher, and the gate insulating film and the protective insulating film on the gate wiring end and the protective insulating film and the source on the data wiring end The electrode is removed by dry etching to form a contact hole. A transparent conductive layer is then precipitated and a transparent electrode film is patterned. A thin film transistor substrate is completed by the above steps. Then, the thin film transistor substrate is attached to another substrate mounted with a color filter or the like, with a specific interval in the middle, and the liquid crystal is sealed in this interval. A liquid crystal driving circuit is then connected to the terminals of the gate wiring and the data wiring to manufacture a liquid crystal display device. In the following examples, the present invention can be explained in more detail, but it should be understood that the scope of the present invention is not limited to these examples. Example 1 Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs This example is about using two laminated layer films including an A 1 alloy film and an upper film as the gate wiring of a liquid crystal display device, and using an A 1 alloy film A three-layered film of an upper film and a lower film is used as the data wiring to calculate the electrical contact between the gate wiring and the data wiring with a transparent conductive layer and insulation between the gate wiring and the data wiring. FIG. 1 is a schematic plan view of the exemplary liquid crystal display device. A gate wiring terminal group 31 connected to the gate wiring 1 and a material wiring terminal group 32 connected to the data wiring 2 are placed relative to the pixel 30 as shown in the figure. Reference numeral 10 in FIG. 1 indicates a glass substrate. This paper size is in accordance with Chinese National Standard (CNS) A4 specification (aox: 297 feet) -15-528912 Α7 Β7 Printed by the Consumer Cooperative of Intellectual Property Bureau of the Ministry of Economic Affairs 5. Description of the invention (13) Figure 2 A is a thin film transistor The cross-sectional view of is placed near the intersection of gate wiring 1 and data wiring 2, and FIG. 2B is a cross-sectional view of a gate wiring terminal. A method for manufacturing this thin film transistor (T F T) is shown below. On a glass substrate 10, A1 containing 2% atomic percent Nd was placed to form an A1 alloy film 101, and Mo was successively formed with an upper film 102 by DC sputtering. The substrate temperature was set at 120 ° C. A resist pattern is then formed on the laminated film by photolithography, and the A 1 alloy film 1 〇1 and the upper film 1 〇 2 are mixed solutions of phosphoric acid, nitric acid, acetic acid, and pure water. Etching to form the gate wiring and the gate electrode 1. Then, using plasma CVD, Si N, amorphous Si, and P doped amorphous Si are continuously precipitated at a substrate temperature of 300 ° C to form a gate insulating film 4, and a semiconductor layer 6, respectively. And an n + semiconductor layer. Then, an impedance pattern is formed by photolithography, and the semiconductor layer 6 and the η semiconductor layer 7 are dry-etched into an island structure. Secondly, M 0, A 1 and M 0 containing 2% atomic percent N d were successively precipitated by DC sputtering in this order to form lower layer films 3 0, 4 3, A1 alloy films 301, 401, and Upper film 302'402. The substrate temperature was set at 120 ° C. An impedance pattern is formed on the laminated film by photolithography, and the lower film 303 ′ 403, A1 alloy film 301, 401, and the upper film 3 002 ′ 4 02 are used by phosphoric acid, nitric acid, acetic acid, and pure The mixed solution of water is engraved to form the data wiring and the drain electrode 3 and the source electrode 4. η + (Please read the precautions on the back before filling this page) • Installation · 1T This paper size is applicable to China National Standard (CNS) A4 specification (210X297 mm) -16- 528912 A7 B7 V. Description of the invention (Semiconductor Layer 7 is also dry-etched. Furthermore, Si N is deposited by plasma CVD at a substrate temperature of 200 ° C or higher, preferably 250 ° C, to form a protective film 8. By photographing Lithographic printing forms an impedance pattern, and the gate insulating film 5, the protective film 8 and the upper film 1 in the gate wiring terminal contact hole 21 are wet-etched and contact the hole 2 in the thin film transistor portion. The protective film 8 and the upper film 3 2 2 and 4 2 were also dry-etched and then rinsed with sufficient pure water. After that, the substrate was deposited at a substrate temperature of 2 1 5 t by DC sputtering to form a transparent layer. IT0 of the conductive layer 9. An impedance pattern is formed by photolithography, and IT0 is etched to form a transparent conductive layer 9. Through the above process, a TFT for a liquid crystal display device is manufactured. A 1 alloy film has been built between the transparent conductive layer of gate wiring and data wiring. The results of inspection of the electrical contact and insulation between the gate wiring and the data wiring are compared with the liquid crystal display panel made with the film thickness of the upper layer of the gate wiring as a parameter. Packing-(Please read the precautions on the back before filling out this page) Printed by the Intellectual Property Bureau of the Ministry of Economic Affairs, printed by the Consumer Cooperative of this paper, the paper size is applicable to China National Standard (CNS) A4 (210 X 297 mm) -17- 528912 Α7 Β7 V. Description of the invention (3 Table 1 Thickness of the upper film (nm) Whether the number of liquid crystal display devices manufactured by electrical contact has been implemented Number of liquid crystal display devices with short circuit problems 0 Not implemented 10 4 20 Implemented 10 0 50 Implement 10 1 100 Implement 10 5 200 Implement 10 8 300 Implement 10 10 ------: ----- Approve clothes | Yes (Please read the precautions on the back before filling this page)
IT 在A 1合金膜與透明導電層之間的電氣接觸是固定地 ΐ 一低程度而不管膜的厚度。至於膜厚度，要注意的是在 t層膜厚度大於1 〇 〇 n m的情形中，具有短路問題的面 反數目會很大，且閘極絕緣膜的覆蓋形成很差。上層膜厚 實應該爲5 0 n m或更少，最好是2 0 n m。沒有上層 丨莫，則不可能在A 1合金膜與透明導電層之間建立電氣接 雖然在此範例中使用Μ ◦作爲上層膜，但是使用其他 Ϊ熔點的金屬，例如T i ，V，C r，Z r，N b， i f ，T a ，W o或這些元素的合金亦會獲得相同的結 本紙張尺度適用中國國家標準（CNS ) Α4規格（210 Χ297公釐） 線 經濟部智慧財產局員工消費合作社印製 528912 經濟部智慧財產局員工消費合作社印製 A7 B7 五、發明説明（16) 在本範例中，A 1合金膜是由含2 %原子百分比N d的 A 1所製成。N d是一種元素其對於A 1的固體溶解度極 限很低只有0 . 0 1 %原子百分比。當使用含有對於A 1的 固體溶解度很低的元素例如Y，L a，C e，P r ， Sm，Eu，Gd，Tb，Dy，Ho，Er ，Tm， Y b或L u之A 1合金膜時，可以獲得類似於此範例之結 果。 在此範例中，在圖2的接觸孔2 0中，其中A 1合金 膜（含2 %原子百分比N d的A 1 )是與範例1所製的液晶 顯示裝置的透明導電層（I T〇）具有電氣接觸之處，其 中A 1合金膜4 0 1與透明導電層9是彼此直接接觸之部 位是被藉由歐頁電子光譜（Auger electron spectroscopy)在 深度方向上分析其組成，結果顯示在圖3 A。而且，在使 用純A 1作爲疊層佈線而问樣製造的液晶顯不裝置之接觸 孔中，其中A 1膜與透明導電層彼此直接接觸的部位是被 以歐頁電子光譜而分析其成分，所獲得的結果係顯示在圖 3 B中。 在圖3 A的情形中，透明導電層的組成元素I 1Ί及〇 在A 1合金膜的介面中是相當低的，且偵測取代a I合金 膜的組成元素A 1及N d ，以一高濃度區域存在於表面 中。用於上層膜的Μ 〇並未被偵測’可能是因爲在形成接 觸孔的乾蝕刻期間，其本身的移除。在圖3 Β的情形中， 在圖形中破折線之間的區域中之氧的濃度上升，致使顯示 出靠近A 1膜的A 1氧化膜（氧化鋁）之形成。根據上面 本紙張尺度適用中國國家標準（CNS ) Μ規格（210><297公楚） —ι-ll 批衣 „ 訂 線 (請先閱讀背面之注意事項再填寫本頁) -19- 經濟部智慧財產局員工消費合作社印製 528912 A7 ___ _B7_ 五、發明説明（17) 的情形，導引出以下的計算。 首先，在稍後說明的圖6 A之結構中，到A 1合金膜 的氧濃度相當低，且A 1合金膜在其中A 1合金膜的添加 元素N d之濃度相當高的表面部位中與I T 0直接接觸。 在圖6 B的結構中，具有高電抗性的A 1氧化膜（氧化 鋁）出現在A 1合金膜與I T〇的接觸面上。 據估計A 1合金膜與透明導電層的電氣連接是可能 的，因爲具有高N d濃度的表面部位防止在圖6 A的結構 中A 1合金膜之氧化。亦假設在圖6 B中A 1氧化膜（氧 化鋁）是被形成作爲一天然氧化膜，當在接觸孔2 1形成 之後，A 1膜從乾蝕刻裝置被放置到大氣中，或者當爲一 氧化物的I T〇被疊層在A 1膜上時，I T ◦的氧擴散到 A 1膜側。在任何一種情形中，A 1膜與透明導電層的電 氣接觸被認爲是不可能的，因爲缺少了 一層能夠防止A 1 表面的氧化。 而且，在範例1中所製造的A 1合金佈線之剖面被藉 由一透射電子顯微鏡（transmission electron microscope)而 觀測，且分析其在A 1合金膜與上層膜之間的介面組成。 圖4是一槪略圖形，顯示出圖2 A的區域A以透射電子顯 微鏡所得到的觀察結果，在此以放大顯示。圖形中圓圈中 的圖樣與黑點表示觀察點以及在能量分散型X光分析中的 點數目。元素分析的結果係顯示在表2中。 本紙張尺度適用中國國家標準（CNS ) A4規格（210X297公釐） -------L--^--裝----^---訂------線 (請先閲讀背面之注意事項再填寫本頁) -20- 528912 A7 B7 五、發明説明（18) 表2 觀察點數目 組成（原子百分比） AI Nd 1 0 0 2 96.5 3.5 3 98.5 5 4 96.8 3.2 5 94.9 5.1 ---------裝-- (請先閱讀背面之注意事項再填寫本頁) 此項結果係藉由圖3之歐頁電子光譜的發現而獲得， 其中N d元素添加超過固體溶解度極限的A 1合’金膜在其 內層之N d濃度是低的，但是在表面部位3 3中卻具有一 高濃度區域。 範例3 在此範例中，在A 1合金膜與透明導電層之間的電氣 接觸是以在沉澱用以覆蓋A 1合金膜的絕緣膜期間之基底 溫度作爲參數而檢查的。 圖5是一用於檢查在A 1合金佈線5 0與透明導電層 5 2之間的電氣接觸之佈線圖樣的槪略平面圖。藉由使用 四個電極墊5 3的四終端法而計算出在接觸孔5 4的區域 中之電氣接觸。 本紙張尺度適用中國國家標準（CNS ) A4規格（210X 297公釐） 訂 線 經濟部智慧財產局員工消費合作社印製 -21 - 528912 A7 B7 五、發明説明（19) (請先閲讀背面之注意事項再填寫本頁} 圖6 A及6 B是沿著圖5的線A — A，所作的接觸孔 5 4及其周圍之槪略剖面圖。圖6A表示其中A 1合金佈 線包含一上層膜與一 A 1合金膜的疊層之情形’且圖6 B 顯示其中A 1合金佈線包含一單層的A 1合金之情形。以 下將說明製造此結構的方法。 經濟部智慧財產局員工消費合作社印製 含2 %原子百分比N d的A 1藉由D C濺射被沉澱在一 玻璃基底5 5上而形成一 A 1合金膜5 0 1。在疊層膜的 情形中，Μ 〇被進一步連續沉澱以形成一上層膜5 0 2。 基底溫度被設定在1 2 0 ° C。然後一阻抗圖樣被藉由照相 石版印刷法而形成在此疊層膜上，且A 1合金膜5 0 1被 藉由磷酸、硝酸、乙酸與純水的混合物鈾刻以形成A 1合 金佈線5 0。在疊層膜的情形中，上層膜5 0 2亦被蝕 刻。然後藉由電漿C V D沉澱S i N以形成一絕緣膜5 1 並以絕緣膜沉澱基底溫度作爲參數。而且，然後藉由照相 石版印刷法而形成一阻抗圖樣，且此絕緣膜5 1被乾蝕刻 以形成一接觸孔5 4。在疊層佈線的情形中，絕緣膜5 1 與上層膜5 0 2兩個均被乾蝕刻。之後，用於形成透明導 電層5 2的I T ◦被藉由D C濺射以2 1 5 ° C的基底溫度 沉澱。然後藉由照相石版印刷法而形成一阻抗圖樣，且 I T ◦被鈾刻以形成一透明導電層5 2。在圖6中，數字 5 3表不一電極墊、5 4表不一接觸孔，及1 〇 1表示一 A 1合金膜（閘極佈線）。 表3顯示電氣接觸的計算結果。在此表中，X表示 差’〇代表好，以及◎代表優。 本紙張尺度適用中國國家標準（CNS ) A4規格（210X297公釐） -22- 528912 A7 B7 五、發明説明（20) 表3 絕緣膜被沉澱所在 的基底溫度[°c ] 電氣接觸 單層 疊層 200 X 〇 220 X 〇 230 X 〇 240 X 〇 250 X ◎ 260 X ◎ 280 X ◎ 300 X ◎ I I ： 訂 (請先閲讀背面之注意事項再填寫本頁) 經濟部智慧財產局員工消費合作社印製 在A 1合金佈線是屬於單層結構的情形中，不可能在 用於沉澱絕緣膜的任何基底溫度建立與透明導電層的接 觸。此現象可以如範例2中所提到的，藉由一絕緣細微 A 1氧化膜（氧化鋁）被形成在A 1膜表面上而說明，當 A 1合金膜在沉澱此膜之後從D C濺射裝置被放置到大氣 時。此結果亦在範例1的結果中獲得證實。 在A 1合金佈線是屬於疊層結構的情形中，可以藉由 在沉澱絕緣膜期間將基底溫度設定爲至少2 0 0 °C，最好 是至少2 5 0 °C以建立在A 1合金膜與透明導電層之間的 電氣接觸。這樣的結果被認爲可歸因於由於連續沉澱上層 本紙張尺度適用中國國家標準（CNS ) A4規格（210X297公釐） -23- 528912 經濟部智慧財產局員工消費合作社印製 A7 _B7_五、發明説明（21) 膜的存在而維持未氧化的A 1合金膜之表面中，估計在 A 1合金膜中所添加的元素之濃度在表面區域中上升，在 沉澱絕緣膜期間加熱基底時，且這樣的一 A 1合金表面係 作爲一抗氧化的障蔽，即使上層在接觸孔形成期間被移 除。亦假設由於高溫使得在A 1合金膜中的添加元素更加 容易移動到表面區域，添加元素的濃度在表面區域中進一 步上升，致使更難氧化。 在本範例中，Μ 〇被用於上層膜，但是當使用其他非 Μ 〇的金屬於上層膜時，在A 1合金膜中的添加元素之濃 度亦在表面區域中上升以產生相同的抗氧化效果，且在 A 1合金膜與透明導電層之間的電氣接觸是可能的。 而且，在此範例中，A 1合金膜是由含2 %原子百分比 Nd的A 1所製成，而Nd是一種元素其對於A1的固體 溶解度極限相當低，低到0 · 0 1 %原子百分比。而且，當 A 1合金膜被藉由添加其他具有A 1固體溶解度極限很低 的元素，如 Y，La ，Ce ，Pr ，Sm，Eu，Gd， Tb，Dy，Ho ，Er ，Tm，Yb 及 Lu 而製成時， 且使用這樣的A 1合金膜，在A 1合金膜中的添加元素之 濃度在表面區域中增加以產生如本範例中的相同抗氧化效 果，且在A 1合金膜與透明導電層之間的電氣接觸是可能 的。 在單層結構的情形中，藉由集中在A 1合金表面中的 添加元素且在一可還原氣體或超高真空氣體中產生熱處 理，亦可能防止A 1合金表面的氧化，而不會使A 1合金 (請先閱讀背面之注意事項再填寫本頁) 裝·The electrical contact of IT between the A 1 alloy film and the transparent conductive layer is fixed ΐ to a low degree regardless of the thickness of the film. As for the film thickness, it should be noted that in the case where the thickness of the t-layer film is greater than 1000 nm, the number of faces having a short-circuit problem may be large, and the formation of the coverage of the gate insulating film is poor. The thickness of the upper layer should be 50 nm or less, preferably 20 nm. Without the upper layer, it is impossible to establish an electrical connection between the A 1 alloy film and the transparent conductive layer. Although M is used as the upper layer film in this example, other metals with melting points such as T i, V, and C r are used. , Z r, N b, if, Ta, Wo or alloys of these elements will also get the same paper size. Applicable to China National Standard (CNS) A4 specification (210 × 297 mm). Employees of the Intellectual Property Bureau of the Ministry of Economic Affairs Printed by the consumer cooperative 528912 Printed by the consumer property cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs A7 B7 V. Description of the invention (16) In this example, the A 1 alloy film is made of A 1 containing 2% atomic percentage N d. N d is an element with a very low solid solubility limit for A 1 of only 0.01% atomic percent. When using an A 1 alloy containing elements with low solubility for solids such as Y, La, Ce, Pr, Sm, Eu, Gd, Tb, Dy, Ho, Er, Tm, Yb, or Lu When filming, you can get results similar to this example. In this example, in the contact hole 20 of FIG. 2, the A 1 alloy film (A 1 containing 2% atomic percentage N d) is the transparent conductive layer (IT) of the liquid crystal display device manufactured in Example 1. Where there is electrical contact, where the A 1 alloy film 401 and the transparent conductive layer 9 are in direct contact with each other, their composition is analyzed in the depth direction by Auger electron spectroscopy, and the results are shown in the figure 3 A. Moreover, in the contact holes of a liquid crystal display device manufactured using pure A 1 as a laminated wiring, the parts in which the A 1 film and the transparent conductive layer are in direct contact with each other are analyzed for their composition by Euro-electron spectroscopy. The results obtained are shown in Figure 3B. In the case of FIG. 3A, the constituent elements I 1Ί and 0 of the transparent conductive layer are relatively low in the interface of the A 1 alloy film, and the constituent elements A 1 and N d that replace the a I alloy film are detected, and High-concentration areas exist in the surface. M0 for the upper film was not detected 'may be due to the removal of itself during the dry etching for forming the contact hole. In the case of FIG. 3B, the oxygen concentration in the region between the dashed lines in the figure rises, so that the formation of the A1 oxide film (alumina) near the A1 film is shown. According to the above paper standards, the Chinese National Standard (CNS) M specifications (210 > < 297 Gongchu) are applied. Ι-ll batch of clothes „Thread (please read the precautions on the back before filling this page) -19- Ministry of Economy Printed by the Intellectual Property Bureau's Consumer Cooperatives 528912 A7 ___ _B7_ 5. In the case of the description of invention (17), the following calculations are led. First, in the structure of Fig. 6 explained later, the oxygen to the A 1 alloy film The concentration is relatively low, and the A 1 alloy film is in direct contact with IT 0 in a surface portion where the concentration of the additive element N d of the A 1 alloy film is relatively high. In the structure of FIG. 6 B, the A 1 oxidation having high resistance The film (alumina) appears on the contact surface between the A 1 alloy film and IT0. It is estimated that the electrical connection between the A 1 alloy film and the transparent conductive layer is possible because the surface portion with a high N d concentration is prevented in FIG. 6 A The oxidation of the A 1 alloy film in the structure. It is also assumed that the A 1 oxide film (alumina) is formed as a natural oxide film in FIG. 6B. After the contact hole 21 is formed, the A 1 film is removed from the dry etching device. Placed in the atmosphere, or as a monoxide When IT〇 is laminated on the A 1 film, the oxygen of IT ◦ diffuses to the side of the A 1 film. In either case, the electrical contact between the A 1 film and the transparent conductive layer is considered impossible because of the lack of One layer can prevent the oxidation of the surface of A 1. Furthermore, the cross section of the A 1 alloy wiring manufactured in Example 1 was observed by a transmission electron microscope, and the A 1 alloy film and the upper film were analyzed. The composition of the interface between them. Fig. 4 is a schematic diagram showing the observation result obtained by the transmission electron microscope in area A of Fig. 2 and is shown in an enlarged scale. The pattern in the circle and the black dots in the graph represent the observation points. And the number of points in the energy-dispersive X-ray analysis. The results of the elemental analysis are shown in Table 2. This paper size applies the Chinese National Standard (CNS) A4 specification (210X297 mm) ------- L- -^-Installation ---- ^ --- order ------ line (please read the precautions on the back before filling this page) -20- 528912 A7 B7 V. Description of the invention (18) Table 2 Observation Number of points (atomic percentage) AI Nd 1 0 0 2 96.5 3.5 3 98.5 5 4 96.8 3.2 5 94.9 5.1 --------- install-(Please read the precautions on the back before filling in this page) This result is obtained by the discovery of the electronic spectrum of the European page in Figure 3, where N d The elemental addition of the Al-A1 ′ gold film over the solid solubility limit has a low N d concentration in its inner layer, but has a high-concentration region in the surface portion 33. Example 3 In this example, the electrical contact between the A1 alloy film and the transparent conductive layer was examined using the substrate temperature during precipitation of the insulating film to cover the A1 alloy film as a parameter. FIG. 5 is a schematic plan view of a wiring pattern for checking electrical contact between the A1 alloy wiring 50 and the transparent conductive layer 52. The electrical contact in the area of the contact hole 54 is calculated by a four-terminal method using four electrode pads 53. This paper size applies to China National Standard (CNS) A4 (210X 297 mm). Printed by the Intellectual Property Bureau of the Ministry of Economic Affairs. Printed by the Consumer Cooperative. -21-528912 A7 B7. 5. Description of the invention (19) (Please read the note on the back first) Please fill in this page again for details} Figures 6 A and 6 B are schematic cross-sectional views of contact holes 5 4 and its surroundings taken along line A-A in Figure 5. Figure 6A shows that A 1 alloy wiring includes an upper film Case of lamination with an A1 alloy film 'and FIG. 6B shows a case where A1 alloy wiring includes a single layer of A1 alloy. The method of manufacturing this structure will be explained below. Employees ’Cooperatives, Bureau of Intellectual Property, Ministry of Economic Affairs A 1 containing 2% atomic percent N d was printed by DC sputtering to deposit an A 1 alloy film 51 on a glass substrate 55. In the case of a laminated film, M 0 was further continuous Precipitation to form an upper layer film 50 2. The substrate temperature was set at 120 ° C. Then an impedance pattern was formed on the laminated film by a photolithography method, and A 1 alloy film 5 0 1 was It is formed by uranium etching of a mixture of phosphoric acid, nitric acid, acetic acid and pure water. A 1 alloy wiring 50. In the case of a laminated film, the upper film 50 2 is also etched. Then Si N is deposited by plasma CVD to form an insulating film 5 1 and the substrate temperature of the insulating film is used as a parameter Moreover, an impedance pattern is then formed by a photolithographic method, and the insulating film 51 is dry-etched to form a contact hole 54. In the case of a laminated wiring, the insulating film 5 1 and the upper film 5 0 Both two are dry-etched. After that, the IT used to form the transparent conductive layer 5 2 is precipitated by DC sputtering at a substrate temperature of 2 1 5 ° C. Then an impedance pattern is formed by photolithography. And IT ◦ is engraved with uranium to form a transparent conductive layer 52. In FIG. 6, numeral 53 indicates an electrode pad, 54 indicates a contact hole, and 101 indicates an A 1 alloy film (gate Pole wiring). Table 3 shows the calculation results of electrical contact. In this table, X indicates poor '〇 for good, and ◎ for excellent. This paper size applies Chinese National Standard (CNS) A4 specification (210X297 mm) -22 -528912 A7 B7 V. Description of the invention (20) Table 3 Where the insulation film is deposited Bottom temperature [° c] Electrical contact single laminated layer 200 X 〇220 X 〇230 X 〇240 X 〇250 X ◎ 260 X ◎ 280 X ◎ 300 X ◎ II: Order (Please read the precautions on the back before filling this page ) Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs. In the case where the A 1 alloy wiring is a single layer structure, it is impossible to establish contact with the transparent conductive layer at any substrate temperature used to deposit the insulating film. This phenomenon can be explained by referring to Example 2 by forming an insulating fine A 1 oxide film (alumina) on the surface of the A 1 film. When the A 1 alloy film is sputtered from DC after depositing the film When the device is placed in the atmosphere. This result was also confirmed in the result of Example 1. In the case where the A 1 alloy wiring is a laminated structure, the substrate temperature can be set to at least 200 ° C, preferably at least 250 ° C, during the deposition of the insulating film to establish the A 1 alloy film. Electrical contact with the transparent conductive layer. This result is believed to be attributable to the continuous precipitation of the upper layer of the paper. The application of the Chinese National Standard (CNS) A4 specification (210X297 mm) -23- 528912 printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs A7 _B7_ Description of the invention (21) In the surface of the A 1 alloy film which is maintained without oxidation by the presence of the film, it is estimated that the concentration of the element added in the A 1 alloy film increases in the surface region, and when the substrate is heated during the precipitation of the insulating film, and Such an A 1 alloy surface acts as a barrier against oxidation, even if the upper layer is removed during the formation of the contact hole. It is also assumed that due to the high temperature, the added element in the A 1 alloy film is more easily moved to the surface area, and the concentration of the added element further increases in the surface area, making it more difficult to oxidize. In this example, M 0 is used for the upper film, but when other non-M 0 metals are used for the upper film, the concentration of the added element in the A 1 alloy film also rises in the surface area to produce the same oxidation resistance. Effect, and electrical contact between the Al alloy film and the transparent conductive layer is possible. Moreover, in this example, the A 1 alloy film is made of A 1 containing 2% atomic percent Nd, and Nd is an element whose solid solubility limit for A1 is quite low, as low as 0 · 0 1% atomic percent . Moreover, when the A 1 alloy film is added with other elements having a very low solid solubility limit, such as Y, La, Ce, Pr, Sm, Eu, Gd, Tb, Dy, Ho, Er, Tm, Yb and When it is made of Lu, and using such an A 1 alloy film, the concentration of the additive element in the A 1 alloy film is increased in the surface area to produce the same antioxidant effect as in this example, and the A 1 alloy film and Electrical contact between the transparent conductive layers is possible. In the case of a single-layer structure, it is also possible to prevent the oxidation of the surface of the A 1 alloy without causing the A 1 alloy by concentrating the additive elements in the surface of the A 1 alloy and generating heat treatment in a reducible gas or ultra-high vacuum gas. 1 alloy (please read the precautions on the back before filling this page)
*1T 線 本紙張尺度適用中國國家標準（CNS ) Α4規格（210Χ 297公釐） -24- 528912 Β7 五、發明説明（22) 膜在其沉澱之後曝露到空氣，且與透明導電層的電氣接觸 是可能的。 範例4 在此範例中，在A 1合金膜與透明導電層之間的電氣 接觸是被以添加到A 1合金膜中的元素量作爲參數而檢查 的。 如圖5所示的佈線圖樣是被以範例3相同的方式而形 成，且A 1合金佈線5 0是由A 1合金膜5 0 1與一上層 膜5 0 2藉由以D C濺射在1 2 0 ° C的基底溫度下連續沉 澱M〇而製成。在A 1合金中的Nd成分是一參數。在絕 緣膜的沉澱期間之基底溫度被設定在3 0 0 ° C。使用此合 金佈線及四電極墊5 3，在接觸孔5 4的區域中之電氣接 觸是以一習知四終端法而計算。結果顯示在表4中，其中 X表示差、〇表示好，而◎表示優。 -iLr. S · i = ml ml 1 - ii— ftali 1 11 ϋ (請先閱讀背面之注意事項再填寫本頁) 、11 線 經濟部智慧財產局員工消費合作社印製 表4 Nd成分[原子百分比] 電氣接觸 0 X 0.2 〇 0.6 〇 0.8 ◎ 1 ◎ 2 ◎ 本紙張尺度適用中國國家標準（CNS ) Α4規格（210Χ297公釐） -25- 經濟部智慧財產局員工消費合作社印製 528912 Μ _Β7_ 五、發明説明（23) 當N d成分在Ο . 2 %原子百分比以上時，可以獲得良 好的電氣接觸。當N d成分增加到0 _ 8 %原子百分比或更 高時，電氣接觸甚至會更好。 此現象可以被解釋如下：由於在A 1合金膜的表面區 域中之添加元素N d的濃度增加係端視N d成分而定，所 以改善抗氧化效果，致使進一步增進了在A 1合金膜與透 明導電層之間的電氣接觸。亦必需知道的是沒有添加 N d，亦即以純A 1則電氣接觸是不可能的。這是被認爲 因爲當A 1合金膜在形成接觸孔之後曝露在空氣中，或當 接觸到I T ◦時，A 1合金膜的表面被氧化所造成的。 Μ 〇在此範例中被用作上層膜，但是當非Μ 〇的金屬 被用於上層膜時，在A 1合金膜中的添加元素在表面區域 中亦上升以產生類似的抗氧化效果，且可以在A 1合金膜 與透明導電層之間產生電氣接觸。 在本範例中，使用固體溶解度極限相當低，低到 〇.Ο 1 %原子百分比的N d作爲到A 1合金膜的添加元 素，但是當使用其他對於A 1具有低固體溶解度極限的元 素，如 Y，La ，Ce ，Pr ，Sm，Eu，Gd，* 1T paper size is applicable to Chinese National Standard (CNS) A4 specification (210 × 297 mm) -24-528912 Β7 V. Description of the invention (22) The film is exposed to the air after its precipitation, and it is in electrical contact with the transparent conductive layer It is possible. Example 4 In this example, the electrical contact between the A 1 alloy film and the transparent conductive layer was examined using the amount of elements added to the A 1 alloy film as a parameter. The wiring pattern shown in FIG. 5 is formed in the same manner as in Example 3, and A 1 alloy wiring 5 0 is composed of A 1 alloy film 5 0 1 and an upper film 5 0 2 by DC sputtering at 1 Mo was continuously precipitated at a substrate temperature of 20 ° C. The Nd component in the A 1 alloy is a parameter. The substrate temperature during the precipitation of the insulating film was set at 300 ° C. Using this alloy wiring and the four-electrode pads 53, the electrical contact in the area of the contact holes 54 is calculated by a conventional four-terminal method. The results are shown in Table 4, where X indicates poor, 0 indicates good, and ◎ indicates excellent. -iLr. S · i = ml ml 1-ii— ftali 1 11 ϋ (Please read the precautions on the back before filling this page), 11 Printed by the Intellectual Property Bureau Staff Consumer Cooperatives of the Ministry of Economic Affairs 4 Nd ingredients [atomic percentage ] Electrical contact 0 X 0.2 〇0.6 〇0.8 ◎ 1 ◎ 2 ◎ This paper size applies to China National Standard (CNS) A4 specification (210 × 297 mm) -25- Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 528912 _Β7_ V. Description of the invention (23) When the N d component is more than 0.2% atomic percent, good electrical contact can be obtained. When the N d component is increased to 0-8% atomic percent or higher, electrical contact is even better. This phenomenon can be explained as follows: Since the increase in the concentration of the added element N d in the surface region of the A 1 alloy film depends on the N d component, the anti-oxidation effect is improved, so that the A 1 alloy film and the Electrical contact between transparent conductive layers. It is also necessary to know that without N d, that is, electrical contact is not possible with pure A 1. This is considered to be caused by the surface of the A 1 alloy film being oxidized when the A 1 alloy film is exposed to the air after the contact holes are formed, or when it is exposed to I T ◦. Μ〇 is used as the upper film in this example, but when a non-Mo metal is used for the upper film, the added element in the A 1 alloy film also rises in the surface region to produce a similar antioxidant effect, and Electrical contact can be made between the Al alloy film and the transparent conductive layer. In this example, the solid solubility limit is quite low, as low as 0.001% atomic percent N d as an additional element to the A 1 alloy film, but when using other elements with a low solid solubility limit for A 1, such as Y, La, Ce, Pr, Sm, Eu, Gd,
Tb ，Dy ，Ho ，Er ，Tm，Yb 及 Lu 作爲添加元 素時，在A 1合金膜中的添加元素之濃度在表面區域中上 升而產生一種類似的抗氧化效果，且在A 1合金膜與透明 導電層之間的電氣接觸是可能的。 範例5 本紙張尺度適用中國國家標準（CNS ) A4規格（210X297公釐）When Tb, Dy, Ho, Er, Tm, Yb, and Lu are added elements, the concentration of the added elements in the A 1 alloy film rises in the surface region to produce a similar oxidation effect, and in the A 1 alloy film and Electrical contact between the transparent conductive layers is possible. Example 5 This paper size is applicable to Chinese National Standard (CNS) A4 (210X297 mm)
Ji m 1 1— *1 ..... - I I..... ......I 士民 —·8*— !1 - ii : -I— I -I --m ------- ill (請先閲讀背面之注意事項再填寫本頁) -26- 528912 A7 B7 五、發明説明（24) 在此範例中，佈線的剖面形狀是被以A 1合金佈線的 上層膜之Μ 〇合金組成作爲參數而檢查的。 在一玻璃基底4 1上，含2 %原子百分N d的A 1被沉 殿到2 0 0 nm的厚度以形成一 A 1合金膜4 2 ，且藉由 D C濺射一 Mo合金被進一步沉澱到2 〇 nm的厚度而形 成一上層膜4 3。基底溫度被設定在1 20。C。然後藉由 照相石版印刷法而形成一阻抗圖樣在疊層膜上，且被藉由 磷酸、硝酸、乙酸及純水的混合溶液蝕刻以形成A 1合金 膜4 4，且以一電子顯微鏡檢查其剖面形狀。 圖7 A及7 B顯示A 1合金佈線的槪略剖面。並且觀 察錐形角（taper angle)與A 1合金膜的''簷（eaves) 〃之 存在與否。a錐形角〃是由A 1合金膜4 2的一角4 5所 形成的角度，且”簷〃指出從A 1合金膜4 2到上層膜 4 3的投影，如圖7 B所示。在此圖形中，參考數字4 1 表示一玻璃基底，43表示上層膜、以及44表示A 1合 金佈線。表5顯示所觀察到的結果。 本紙張尺度適用中國國家標準（CNS ) A4規格（210X 297公釐） 0¾ (請先閲讀背面之注意事項再填寫本頁) 經濟部智慧財產局員工消費合作社印製 、τJi m 1 1— * 1 .....-I I ..... ...... I Shimin— · 8 * —! 1-ii: -I— I -I --m --- ---- ill (Please read the precautions on the back before filling out this page) -26- 528912 A7 B7 V. Description of the Invention (24) In this example, the cross-sectional shape of the wiring is an upper film with A 1 alloy wiring The M0 alloy composition was examined as a parameter. On a glass substrate 41, A 1 containing 2% atomic percent N d was sunk to a thickness of 200 nm to form an A 1 alloy film 4 2, and a Mo alloy was further sputtered by DC sputtering. Precipitation was performed to a thickness of 20 nm to form an upper film 43. The substrate temperature was set at 1-20. C. Then, a resistive pattern is formed on the laminated film by photolithography, and is etched by a mixed solution of phosphoric acid, nitric acid, acetic acid, and pure water to form an A 1 alloy film 4 4, which is inspected with an electron microscope. Section shape. 7A and 7B are schematic cross-sections of an A1 alloy wiring. And observe the existence of taper angle and eaves of A 1 alloy film. A taper angle 〃 is an angle formed by a corner 45 of A 1 alloy film 4 2, and the “eave 〃” indicates the projection from A 1 alloy film 42 to the upper film 43, as shown in FIG. 7B. In this figure, the reference numeral 4 1 indicates a glass substrate, 43 indicates the upper film, and 44 indicates the A 1 alloy wiring. Table 5 shows the observed results. This paper size applies the Chinese National Standard (CNS) A4 specification (210X 297) Mm) 0¾ (Please read the notes on the back before filling out this page) Printed by the Consumer Cooperatives of Intellectual Property Bureau of the Ministry of Economic Affairs, τ
528912 A7 B7 五、發明説明（2S) LC 寿528912 A7 B7 V. Description of Invention (2S) LC Life
上層膜之組成 A1合金膜的錐形角[〇] 簷存在與否 乾蝕刻阻抗性 Mo 25 不存在 X MoO.4重量百分比Cr 30 不存在 X Mo-3重量百分比Cr 70 存在 〇 Mo-10重量百分比W 30 不存在 X Mo-35重量百分比W 35 不存在 X Mo-10重重百分比Nb 35 不存在 X Mo-35重量百分比Nb 40 不存在 X Mo-10重量百分比Ta 70 存在 X (請先閲讀背面之注意事項再填寫本頁) 經濟部智慧財產局員工消費合作社印製 爲了提供乾蝕刻阻抗性到Μ 〇合金，必需添加一定量 的C I* (大約3重量百分比或更多）到Μ 〇。然而，在以 具有含3重量百分比C r的Μ 〇之A 1合金膜疊層佈線的 情形中，簷被形成以減少覆蓋疊層佈線的絕緣膜之覆蓋。 形成簷的原因就是濕蝕刻率的下降，這是導因於C r的添 力口量到達一足以產生乾蝕刻阻抗性的量。假如Μ 〇合金的 乾飽刻阻抗性不是一個必要的條件的話，則可以藉由添力口 適當量的C r ’ W，N b，T a等，控制錐形形狀而不會 導致簷的形成。 根據上述本發明的實施例，可以克服在習知技術中應 用A 1佈線時所遭遇到的問題，例如小丘的形成、與透明 本紙張尺度適用中國國家標準（CNS )八4規格（2l〇X29?公釐） -28- 528912 A7 B7 五、發明説明（2弓 導電層的不良電氣接觸’以及難以控制疊層佈線的剖面形 狀，且如此一來，可以使得配合流程的佈線形狀之設計更 爲自由。 因此，加強了加工裕度，且佈線形狀亦可以一穩定的 方式而控制，消除了在電極之間短路的憂慮而可以提高_ 量，使得能以低成本製造出具有高品質的液晶顯示裝置。 如上所述，根據本發明，可以提供一種具有高產量的 液晶顯示裝置。 [--：-----装----N--訂------線 (请先閱讀背面之泣意事項存填寫本買) 經濟部智慧財產局員工消资合作社印製 -29- 本紙張尺度適用中國國家標準（CNS ) A4規格（210X297公釐）Composition of the upper film Taper angle of the A1 alloy film [〇] Eaves presence or absence of dry etching resistance Mo 25 X MoO. 4 weight percent Cr 30 absence X Mo-3 weight percent Cr 70 〇Mo-10 weight Percent W 30 is absent X Mo-35 weight percentage W 35 is absent X Mo-10 weight percentage Nb 35 is absent X Mo-35 weight percentage Nb 40 is absent X Mo-10 weight percentage Ta 70 is present X (please read the back first Note: Please fill in this page again.) Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs. To provide dry etching resistance to M0 alloy, a certain amount of CI * (approximately 3% by weight or more) must be added to M0. However, in the case of laminated wiring with an Al alloy film having M0 containing 3 wt% of Cr, eaves are formed to reduce the coverage of the insulating film covering the laminated wiring. The reason for the formation of the eaves is the decrease in the wet etching rate, which is due to the increase in the amount of C r to an amount sufficient to produce dry etching resistance. If the dry-saturated resistance of the M o alloy is not a necessary condition, it is possible to control the conical shape without adding eaves by adding a suitable amount of C r 'W, N b, Ta, etc. . According to the embodiments of the present invention described above, the problems encountered when applying A 1 wiring in the conventional technology can be overcome, such as the formation of hillocks, and transparency. The paper standard applies the Chinese National Standard (CNS) 8-4 specification (2l0). X29? Mm) -28- 528912 A7 B7 V. Description of the invention (poor electrical contact of the 2 bow conductive layer 'and difficult to control the cross-sectional shape of the laminated wiring, and in this way, the design of the wiring shape to match the process can be more Therefore, the processing margin is strengthened, and the shape of the wiring can be controlled in a stable manner, eliminating the worry of short-circuiting between the electrodes and increasing the amount of _, making it possible to manufacture high-quality liquid crystals at low cost. Display device. As described above, according to the present invention, it is possible to provide a liquid crystal display device with high output. [-: ----- installation ---- N--order ------ line (please first Read the Weeping Matters on the back and fill in this purchase) Printed by the Consumers' Cooperatives of the Intellectual Property Bureau of the Ministry of Economics-29- This paper size applies to China National Standard (CNS) A4 specification (210X297 mm)
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Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2000174190A JP2001350159A (en) | 2000-06-06 | 2000-06-06 | Liquid crystal display device and its manufacturing method |
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| Publication Number | Publication Date |
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| TW528912B true TW528912B (en) | 2003-04-21 |
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| TW089118169A TW528912B (en) | 2000-06-06 | 2000-09-05 | Liquid crystal display device and process for producing the same |
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| JP (1) | JP2001350159A (en) |
| KR (1) | KR20010112030A (en) |
| CN (1) | CN1327168A (en) |
| TW (1) | TW528912B (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7599037B2 (en) | 2001-08-20 | 2009-10-06 | Samsung Electronics Co., Ltd. | Thin film transistor array panel for liquid crystal display and method for manufacturing the same |
| TWI396015B (en) * | 2005-11-30 | 2013-05-11 | Showa Denko Kk | Light guide member, planar light source device provided with the light guide member, and display apparatus using the planar light source device |
Families Citing this family (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3837344B2 (en) | 2002-03-11 | 2006-10-25 | 三洋電機株式会社 | Optical element and manufacturing method thereof |
| JP3940385B2 (en) | 2002-12-19 | 2007-07-04 | 株式会社神戸製鋼所 | Display device and manufacturing method thereof |
| JP4886285B2 (en) * | 2002-12-19 | 2012-02-29 | 株式会社神戸製鋼所 | Display device |
| US7166921B2 (en) | 2003-11-20 | 2007-01-23 | Hitachi Metals, Ltd. | Aluminum alloy film for wiring and sputter target material for forming the film |
| JP2005303003A (en) * | 2004-04-12 | 2005-10-27 | Kobe Steel Ltd | Display device and its manufacturing method |
| CN1309036C (en) * | 2004-12-13 | 2007-04-04 | 友达光电股份有限公司 | Method for manufacturing thin-film transistor element |
| US8149346B2 (en) | 2005-10-14 | 2012-04-03 | Semiconductor Energy Laboratory Co., Ltd. | Display device and manufacturing method thereof |
| JP4117002B2 (en) | 2005-12-02 | 2008-07-09 | 株式会社神戸製鋼所 | Thin film transistor substrate and display device |
| JP2008098611A (en) * | 2006-09-15 | 2008-04-24 | Kobe Steel Ltd | Display device |
| JP2009008770A (en) | 2007-06-26 | 2009-01-15 | Kobe Steel Ltd | Laminated structure and method for manufacturing the same |
| JP5662689B2 (en) | 2010-02-17 | 2015-02-04 | 株式会社ジャパンディスプレイ | Display device and manufacturing method thereof |
-
2000
- 2000-06-06 JP JP2000174190A patent/JP2001350159A/en active Pending
- 2000-09-04 KR KR1020000052051A patent/KR20010112030A/en not_active Application Discontinuation
- 2000-09-05 CN CN00126331A patent/CN1327168A/en active Pending
- 2000-09-05 TW TW089118169A patent/TW528912B/en active
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7599037B2 (en) | 2001-08-20 | 2009-10-06 | Samsung Electronics Co., Ltd. | Thin film transistor array panel for liquid crystal display and method for manufacturing the same |
| TWI396015B (en) * | 2005-11-30 | 2013-05-11 | Showa Denko Kk | Light guide member, planar light source device provided with the light guide member, and display apparatus using the planar light source device |
Also Published As
| Publication number | Publication date |
|---|---|
| CN1327168A (en) | 2001-12-19 |
| KR20010112030A (en) | 2001-12-20 |
| JP2001350159A (en) | 2001-12-21 |
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