TW281727B - - Google Patents

Info

Publication number
TW281727B
TW281727B TW084108960A TW84108960A TW281727B TW 281727 B TW281727 B TW 281727B TW 084108960 A TW084108960 A TW 084108960A TW 84108960 A TW84108960 A TW 84108960A TW 281727 B TW281727 B TW 281727B
Authority
TW
Taiwan
Application number
TW084108960A
Other languages
Chinese (zh)
Original Assignee
Toshiba Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Co Ltd filed Critical Toshiba Co Ltd
Application granted granted Critical
Publication of TW281727B publication Critical patent/TW281727B/zh

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/50—Marginal testing, e.g. race, voltage or current testing
    • G11C29/50004—Marginal testing, e.g. race, voltage or current testing of threshold voltage
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
    • G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
    • G11C29/38—Response verification devices
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/50—Marginal testing, e.g. race, voltage or current testing
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
TW084108960A 1994-08-10 1995-08-28 TW281727B (en, 2012)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP18855894A JP3563452B2 (ja) 1994-08-10 1994-08-10 セル閾値分布検知回路およびセル閾値分布検知方法

Publications (1)

Publication Number Publication Date
TW281727B true TW281727B (en, 2012) 1996-07-21

Family

ID=16225797

Family Applications (1)

Application Number Title Priority Date Filing Date
TW084108960A TW281727B (en, 2012) 1994-08-10 1995-08-28

Country Status (4)

Country Link
US (1) US5761125A (en, 2012)
JP (1) JP3563452B2 (en, 2012)
KR (1) KR100226597B1 (en, 2012)
TW (1) TW281727B (en, 2012)

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US6222762B1 (en) * 1992-01-14 2001-04-24 Sandisk Corporation Multi-state memory
US5657332A (en) * 1992-05-20 1997-08-12 Sandisk Corporation Soft errors handling in EEPROM devices
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KR100323554B1 (ko) * 1997-05-14 2002-03-08 니시무로 타이죠 불휘발성반도체메모리장치
KR100251543B1 (ko) * 1997-07-28 2000-04-15 구본준 계조보정용 전압공급장치
US5909449A (en) * 1997-09-08 1999-06-01 Invox Technology Multibit-per-cell non-volatile memory with error detection and correction
US5943268A (en) * 1997-12-31 1999-08-24 Programmable Microelectronics Corporation Non-volatile latch having PMOS floating gate memory cells
US6128219A (en) * 1999-10-27 2000-10-03 Stmicroelectronics, S.R.L. Nonvolatile memory test structure and nonvolatile memory reliability test method
US6201737B1 (en) * 2000-01-28 2001-03-13 Advanced Micro Devices, Inc. Apparatus and method to characterize the threshold distribution in an NROM virtual ground array
US6396744B1 (en) 2000-04-25 2002-05-28 Multi Level Memory Technology Flash memory with dynamic refresh
US6856568B1 (en) 2000-04-25 2005-02-15 Multi Level Memory Technology Refresh operations that change address mappings in a non-volatile memory
US7079422B1 (en) 2000-04-25 2006-07-18 Samsung Electronics Co., Ltd. Periodic refresh operations for non-volatile multiple-bit-per-cell memory
JP2001312898A (ja) * 2000-04-28 2001-11-09 Mitsubishi Electric Corp しきい値解析システムおよびしきい値解析方法
JP2002074998A (ja) * 2000-08-23 2002-03-15 Matsushita Electric Ind Co Ltd 不揮発性半導体記憶装置の評価装置およびその評価方法、ならびに不揮発性半導体記憶装置およびその製造方法
JP4663094B2 (ja) 2000-10-13 2011-03-30 株式会社半導体エネルギー研究所 半導体装置
US6574158B1 (en) 2001-09-27 2003-06-03 Cypress Semiconductor Corp. Method and system for measuring threshold of EPROM cells
US7205593B2 (en) 2002-09-13 2007-04-17 Matsushita Electric Industrial Co., Ltd. MOS image pick-up device and camera incorporating the same
US7505321B2 (en) * 2002-12-31 2009-03-17 Sandisk 3D Llc Programmable memory array structure incorporating series-connected transistor strings and methods for fabrication and operation of same
US7173852B2 (en) * 2003-10-03 2007-02-06 Sandisk Corporation Corrected data storage and handling methods
US7012835B2 (en) * 2003-10-03 2006-03-14 Sandisk Corporation Flash memory data correction and scrub techniques
JP4346482B2 (ja) * 2004-03-25 2009-10-21 Ｎｅｃエレクトロニクス株式会社 不揮発性記憶装置及び不揮発性記憶装置の検証方法
US7315916B2 (en) * 2004-12-16 2008-01-01 Sandisk Corporation Scratch pad block
US7395404B2 (en) * 2004-12-16 2008-07-01 Sandisk Corporation Cluster auto-alignment for storing addressable data packets in a non-volatile memory array
WO2007032061A1 (ja) * 2005-09-13 2007-03-22 Advantest Corporation 製造システム、製造方法、管理装置、管理方法、およびプログラム
US7529131B2 (en) 2005-11-11 2009-05-05 Kabushiki Kaisha Toshiba Nonvolatile semiconductor memory, method for reading out thereof, and memory card
US7716538B2 (en) * 2006-09-27 2010-05-11 Sandisk Corporation Memory with cell population distribution assisted read margining
US7886204B2 (en) * 2006-09-27 2011-02-08 Sandisk Corporation Methods of cell population distribution assisted read margining
JP2008234780A (ja) 2007-03-22 2008-10-02 Toshiba Microelectronics Corp 半導体記憶装置
US7573773B2 (en) * 2007-03-28 2009-08-11 Sandisk Corporation Flash memory with data refresh triggered by controlled scrub data reads
US7477547B2 (en) * 2007-03-28 2009-01-13 Sandisk Corporation Flash memory refresh techniques triggered by controlled scrub data reads
US8073648B2 (en) * 2007-05-14 2011-12-06 Sandisk Il Ltd. Measuring threshold voltage distribution in memory using an aggregate characteristic
US7613045B2 (en) * 2007-11-26 2009-11-03 Sandisk Il, Ltd. Operation sequence and commands for measuring threshold voltage distribution in memory
JP2010027167A (ja) * 2008-07-23 2010-02-04 Toshiba Corp 半導体記憶装置
US8078440B2 (en) 2008-09-19 2011-12-13 Smith & Nephew, Inc. Operatively tuning implants for increased performance
US8460947B2 (en) * 2008-09-24 2013-06-11 Hewlett-Packard Development Company, L.P. Fluid ejection device and method
JP5268192B2 (ja) * 2009-02-26 2013-08-21 株式会社半導体エネルギー研究所 Ｏｔｐメモリの検査方法、ｏｔｐメモリの作製方法、および半導体装置の作製方法
JP2012119013A (ja) 2010-11-29 2012-06-21 Toshiba Corp 不揮発性半導体記憶装置
US8687421B2 (en) 2011-11-21 2014-04-01 Sandisk Technologies Inc. Scrub techniques for use with dynamic read
US9076545B2 (en) 2013-01-17 2015-07-07 Sandisk Tecnologies Inc. Dynamic adjustment of read voltage levels based on memory cell threshold voltage distribution
US9230689B2 (en) 2014-03-17 2016-01-05 Sandisk Technologies Inc. Finding read disturbs on non-volatile memories
US9552171B2 (en) 2014-10-29 2017-01-24 Sandisk Technologies Llc Read scrub with adaptive counter management
US9978456B2 (en) 2014-11-17 2018-05-22 Sandisk Technologies Llc Techniques for reducing read disturb in partially written blocks of non-volatile memory
US9349479B1 (en) 2014-11-18 2016-05-24 Sandisk Technologies Inc. Boundary word line operation in nonvolatile memory
US9449700B2 (en) 2015-02-13 2016-09-20 Sandisk Technologies Llc Boundary word line search and open block read methods with reduced read disturb
US9653154B2 (en) 2015-09-21 2017-05-16 Sandisk Technologies Llc Write abort detection for multi-state memories

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US5268870A (en) * 1988-06-08 1993-12-07 Eliyahou Harari Flash EEPROM system and intelligent programming and erasing methods therefor
JPH07105146B2 (ja) * 1988-07-29 1995-11-13 三菱電機株式会社 不揮発性記憶装置
US5293345A (en) * 1989-06-12 1994-03-08 Kabushiki Kaisha Toshiba Semiconductor memory device having a data detection circuit with two reference potentials
WO1990016069A1 (en) * 1989-06-12 1990-12-27 Kabushiki Kaisha Toshiba Semiconductor memory device
JP2616109B2 (ja) * 1990-03-12 1997-06-04 日本電気株式会社 半導体記憶装置
JPH04119597A (ja) * 1990-09-07 1992-04-21 Mitsubishi Electric Corp 不揮発性半導体記憶装置のセンスアンプ
US5331597A (en) * 1991-03-29 1994-07-19 Kabushiki Kaisha Toshiba Semiconductor nonvolatile memory apparatus including threshold voltage shift circuitry
JPH04321997A (ja) * 1991-04-19 1992-11-11 Nec Corp 半導体メモリ装置
JP3247402B2 (ja) * 1991-07-25 2002-01-15 株式会社東芝 半導体装置及び不揮発性半導体記憶装置
KR950000273B1 (ko) * 1992-02-21 1995-01-12 삼성전자 주식회사 불휘발성 반도체 메모리장치 및 그 최적화 기입방법
US5336936A (en) * 1992-05-06 1994-08-09 Synaptics, Incorporated One-transistor adaptable analog storage element and array
JP3522788B2 (ja) * 1992-10-29 2004-04-26 株式会社ルネサステクノロジ 半導体集積回路装置

Also Published As

Publication number Publication date
KR960008846A (ko) 1996-03-22
KR100226597B1 (ko) 1999-10-15
JP3563452B2 (ja) 2004-09-08
US5761125A (en) 1998-06-02
JPH0855488A (ja) 1996-02-27

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