TW275147B - Method for manufacturing a stacked capacitor - Google Patents

Abstract

A method for manufacturing a stacked capacitor by liquid phase deposition for use in manufacturing stacked capacitors on a substrate having MOS transistors already, comprising the steps of: sequentially forming an insulator layer, a first dielectric layer and a second dielectric layer covered on the surface of the substrate; sequentially etching the second dielectric layer, the first dielectric layer and the insulator layer to form contact windows exposed from part of the source/drain regions of the MOS transistors; forming a first conductive layer in the second dielectric layer and the contact windows, and contacting the exposed source/drain regions through the contact windows; forming a shield layer in the predetermined location of the first conductive layer; utilizing the shield layer as mask and etching the first conductive layer to define the range of the bottom electrode layer of the capacitor; utilizing the shield layer as mask and utilizing liquid phase selective deposition to selectively deposit oxide on the second dielectric layer in the shield layer to form a spacer with thickness larger than that of the first conductiive layer; removing the shield layer and allowing the spacers with sidewalls; forming a second conductive sidewall spacer at the sidewall and contacting the first conductive layer; removing the spacer and the second dielectric layer, and merging the second conductive sidewall spacer and the first conductive layer to form the bottom electrode layer of the capacitor; forming a third dielectric layer along the surface contour of the bottom electrode layer; and forming a third conductive layer on the third dielectric layer to form the upper conductive layer of the capacitor.