TW344115B - Process to integrate a double gate oxide, with a mixed-mode capacitor - Google Patents

Abstract

A process to integrate a double gate oxide, with a mixed-mode capacitor, which comprises the following steps: (a) forming a plurality of field oxides on a semiconductor substrate thereby segregating a first active region and a second active region; (b) forming a first gate oxide and a second gate oxide of equal thickness on the first active region and the second active region; (c) forming a first polysilicon layer on the surfaces of the field oxide and the first and second gate oxides; (d) selectively etching the first polysilicon layer thereby forming a first polysilicon block on the first active region, and forming the lower electrode of the capacitor, and exposing the second gate oxide; (e) removing the second gate oxide for exposing the semiconductor substrate of the second active region; (f) forming a third gate oxide with a thickness larger than that of the first gate oxide on the second active region, and forming a dielectric layer on the first polysilicon block and the surface of the lower electrode and sidewalls; (g) depositing a second polysilicon layer; (h) selectively etching the second polysilicon layer thereby forming a second polysilicon block on the surface of the third gate oxide, and forming an upper electrode above the surface formed with the lower electrode of the dielectric layer.