TW228628B - - Google Patents
Info
- Publication number
- TW228628B TW228628B TW082103125A TW82103125A TW228628B TW 228628 B TW228628 B TW 228628B TW 082103125 A TW082103125 A TW 082103125A TW 82103125 A TW82103125 A TW 82103125A TW 228628 B TW228628 B TW 228628B
- Authority
- TW
- Taiwan
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/68—Floating-gate IGFETs
- H10D30/681—Floating-gate IGFETs having only two programming levels
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
- G06N3/00—Computing arrangements based on biological models
- G06N3/02—Neural networks
- G06N3/06—Physical realisation, i.e. hardware implementation of neural networks, neurons or parts of neurons
- G06N3/063—Physical realisation, i.e. hardware implementation of neural networks, neurons or parts of neurons using electronic means
- G06N3/065—Analogue means
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
- H03K17/56—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
- H03K17/687—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors
- H03K17/6871—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors the output circuit comprising more than one controlled field-effect transistor
- H03K17/6872—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors the output circuit comprising more than one controlled field-effect transistor using complementary field-effect transistors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B69/00—Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K2217/00—Indexing scheme related to electronic switching or gating, i.e. not by contact-making or -breaking covered by H03K17/00
- H03K2217/0036—Means reducing energy consumption
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Health & Medical Sciences (AREA)
- Life Sciences & Earth Sciences (AREA)
- Biomedical Technology (AREA)
- Biophysics (AREA)
- Theoretical Computer Science (AREA)
- Evolutionary Computation (AREA)
- General Engineering & Computer Science (AREA)
- Data Mining & Analysis (AREA)
- Artificial Intelligence (AREA)
- General Health & Medical Sciences (AREA)
- Molecular Biology (AREA)
- Computing Systems (AREA)
- Computational Linguistics (AREA)
- General Physics & Mathematics (AREA)
- Mathematical Physics (AREA)
- Software Systems (AREA)
- Neurology (AREA)
- Semiconductor Memories (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Semiconductor Integrated Circuits (AREA)
- Non-Volatile Memory (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP03013780A JP3122756B2 (ja) | 1991-01-12 | 1991-01-12 | 半導体装置 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| TW228628B true TW228628B (enExample) | 1994-08-21 |
Family
ID=11842761
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| TW082103125A TW228628B (enExample) | 1991-01-12 | 1991-08-01 |
Country Status (4)
| Country | Link |
|---|---|
| EP (1) | EP0566739A4 (enExample) |
| JP (1) | JP3122756B2 (enExample) |
| TW (1) | TW228628B (enExample) |
| WO (1) | WO1992012498A1 (enExample) |
Families Citing this family (38)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| AU670241B2 (en) * | 1991-05-17 | 1996-07-11 | Theseus Logic, Inc. | Null convention speed independent logic |
| US5764081A (en) * | 1991-05-17 | 1998-06-09 | Theseus Logic, Inc. | Null convention interface circuits |
| US5656948A (en) * | 1991-05-17 | 1997-08-12 | Theseus Research, Inc. | Null convention threshold gate |
| US6020754A (en) * | 1991-05-17 | 2000-02-01 | Theseus Logic, Inc. | Look up table threshold gates |
| US5796962A (en) * | 1991-05-17 | 1998-08-18 | Theeus Logic | Null convention bus |
| US5664211A (en) * | 1993-06-08 | 1997-09-02 | Theseus Research, Inc. | Null convention threshold gate |
| US5930522A (en) * | 1992-02-14 | 1999-07-27 | Theseus Research, Inc. | Invocation architecture for generally concurrent process resolution |
| US5793662A (en) * | 1993-06-08 | 1998-08-11 | Theseus Research, Inc. | Null convention adder |
| US5652902A (en) * | 1993-06-08 | 1997-07-29 | Theseus Research, Inc. | Asynchronous register for null convention logic systems |
| JP3611041B2 (ja) * | 1994-02-14 | 2005-01-19 | 直 柴田 | 半導体演算回路 |
| US6327607B1 (en) | 1994-08-26 | 2001-12-04 | Theseus Research, Inc. | Invocation architecture for generally concurrent process resolution |
| JPH10224224A (ja) * | 1997-02-03 | 1998-08-21 | Sunao Shibata | 半導体演算装置 |
| JPH10283793A (ja) * | 1997-02-06 | 1998-10-23 | Sunao Shibata | 半導体回路 |
| JPH10257352A (ja) | 1997-03-15 | 1998-09-25 | Sunao Shibata | 半導体演算回路 |
| JPH10260817A (ja) | 1997-03-15 | 1998-09-29 | Sunao Shibata | 半導体演算回路及びデ−タ処理装置 |
| US5814856A (en) * | 1997-05-16 | 1998-09-29 | National Semiconductor Corporation | Variable and tunable VT MOSFET with poly and/or buried diffusion |
| US6150851A (en) * | 1997-06-06 | 2000-11-21 | Tadahiro Ohmi | Charge transfer amplifier circuit, voltage comparator, and sense amplifier |
| JPH1196276A (ja) | 1997-09-22 | 1999-04-09 | Sunao Shibata | 半導体演算回路 |
| US5907693A (en) * | 1997-09-24 | 1999-05-25 | Theseus Logic, Inc. | Autonomously cycling data processing architecture |
| US5986466A (en) | 1997-10-08 | 1999-11-16 | Theseus Logic, Inc. | Programmable gate array |
| US6031390A (en) * | 1997-12-16 | 2000-02-29 | Theseus Logic, Inc. | Asynchronous registers with embedded acknowledge collection |
| US6262593B1 (en) | 1998-01-08 | 2001-07-17 | Theseus Logic, Inc. | Semi-dynamic and dynamic threshold gates with modified pull-up structures |
| DE60133595T2 (de) * | 2000-01-07 | 2009-04-30 | Nippon Telegraph And Telephone Corp. | Funktionsrekonfigurierbare Halbleitervorrichtung und integrierte Schaltung zum Konfigurieren der Halbleitervorrichtung |
| KR20020093585A (ko) | 2001-06-06 | 2002-12-16 | 마츠시타 덴끼 산교 가부시키가이샤 | 반도체장치 |
| US6844582B2 (en) | 2002-05-10 | 2005-01-18 | Matsushita Electric Industrial Co., Ltd. | Semiconductor device and learning method thereof |
| JP5858020B2 (ja) * | 2013-10-03 | 2016-02-10 | 株式会社デンソー | 群情報記憶認識装置 |
| WO2017200883A1 (en) | 2016-05-17 | 2017-11-23 | Silicon Storage Technology, Inc. | Deep learning neural network classifier using non-volatile memory array |
| CN109196528B (zh) * | 2016-05-17 | 2022-03-18 | 硅存储技术公司 | 使用非易失性存储器阵列的深入学习神经网络分类器 |
| JP6602279B2 (ja) * | 2016-09-20 | 2019-11-06 | 株式会社東芝 | メムキャパシタ、ニューロ素子およびニューラルネットワーク装置 |
| US10748630B2 (en) | 2017-11-29 | 2020-08-18 | Silicon Storage Technology, Inc. | High precision and highly efficient tuning mechanisms and algorithms for analog neuromorphic memory in artificial neural networks |
| US11087207B2 (en) | 2018-03-14 | 2021-08-10 | Silicon Storage Technology, Inc. | Decoders for analog neural memory in deep learning artificial neural network |
| JP2021121876A (ja) * | 2018-03-30 | 2021-08-26 | ソニーセミコンダクタソリューションズ株式会社 | 積和演算装置及び積和演算方法 |
| FR3081073B1 (fr) * | 2018-05-14 | 2021-10-08 | Univ Lille | Synapse artificielle commutee |
| US11270763B2 (en) | 2019-01-18 | 2022-03-08 | Silicon Storage Technology, Inc. | Neural network classifier using array of three-gate non-volatile memory cells |
| US11500442B2 (en) | 2019-01-18 | 2022-11-15 | Silicon Storage Technology, Inc. | System for converting neuron current into neuron current-based time pulses in an analog neural memory in a deep learning artificial neural network |
| US11023559B2 (en) | 2019-01-25 | 2021-06-01 | Microsemi Soc Corp. | Apparatus and method for combining analog neural net with FPGA routing in a monolithic integrated circuit |
| US10720217B1 (en) | 2019-01-29 | 2020-07-21 | Silicon Storage Technology, Inc. | Memory device and method for varying program state separation based upon frequency of use |
| US11423979B2 (en) | 2019-04-29 | 2022-08-23 | Silicon Storage Technology, Inc. | Decoding system and physical layout for analog neural memory in deep learning artificial neural network |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5055897A (en) * | 1988-07-27 | 1991-10-08 | Intel Corporation | Semiconductor cell for neural network and the like |
-
1991
- 1991-01-12 JP JP03013780A patent/JP3122756B2/ja not_active Expired - Fee Related
- 1991-08-01 TW TW082103125A patent/TW228628B/zh active
-
1992
- 1992-01-10 EP EP92902751A patent/EP0566739A4/en not_active Withdrawn
- 1992-01-10 WO PCT/JP1992/000014 patent/WO1992012498A1/ja not_active Ceased
Also Published As
| Publication number | Publication date |
|---|---|
| EP0566739A4 (en) | 1996-01-10 |
| JPH05335506A (ja) | 1993-12-17 |
| WO1992012498A1 (fr) | 1992-07-23 |
| JP3122756B2 (ja) | 2001-01-09 |
| EP0566739A1 (en) | 1993-10-27 |