TW202349576A - 晶片之導流結構 - Google Patents
晶片之導流結構 Download PDFInfo
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- TW202349576A TW202349576A TW112129819A TW112129819A TW202349576A TW 202349576 A TW202349576 A TW 202349576A TW 112129819 A TW112129819 A TW 112129819A TW 112129819 A TW112129819 A TW 112129819A TW 202349576 A TW202349576 A TW 202349576A
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- Prior art keywords
- bumps
- flow guide
- chip
- flow
- connection
- Prior art date
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- 239000004020 conductor Substances 0.000 claims description 3
- 239000000615 nonconductor Substances 0.000 claims description 2
- 239000002245 particle Substances 0.000 abstract description 37
- 239000000945 filler Substances 0.000 description 12
- 238000005516 engineering process Methods 0.000 description 3
- 239000004642 Polyimide Substances 0.000 description 2
- UMIVXZPTRXBADB-UHFFFAOYSA-N benzocyclobutene Chemical compound C1=CC=C2CCC2=C1 UMIVXZPTRXBADB-UHFFFAOYSA-N 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 229920001721 polyimide Polymers 0.000 description 2
- 230000001154 acute effect Effects 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 239000011810 insulating material Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000000750 progressive effect Effects 0.000 description 1
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Abstract
本發明提供一種晶片之導流結構,其包含至少一導流件,該至少一導流件設置於一晶片之一表面,並相鄰設置於晶片之表面的複數個連接凸塊,當晶片設置於一板件時,該至少一導流件可導引位於晶片之表面的導電介質向該些個連接凸塊流動,驅使導電介質之複數個導電粒子往該些個連接凸塊移動,進而可增加位於該些個連接凸塊之表面之導電粒子的數量,又或者可減緩導電介質流動,而可避免導電粒子離開該些個連接凸塊之表面,可避免降低位於該些個連接凸塊之表面之導電粒子的數量。
Description
本發明是關於一種晶片之導流結構,尤其係指一種設置於晶片,並能引導導電介質之流向或者減緩導電介質之流動的結構。
隨著時代的演進,電子產品逐漸朝輕、薄小型化快速發展,各種電子產品幾乎都以顯示器作為展示資訊的元件,例如在攝錄放影機、筆記型電腦、智慧型手機或其他行動裝置等產品,顯示器已是電子產品中重要的元件。
顯示器之面板需搭配驅動晶片才能顯示影像,驅動晶片用於驅動面板運作,以顯示影像。一般而言,有多種技術可將驅動晶片設置於面板,而該些技術通常需要使用導電介質,例如異向性導電膜(Anisotropic Conductive Film, ACF),導電介質包含導電粒子,導電粒子可接觸驅動晶片之連接凸塊(Bump)與面板的電連接件,所以驅動晶片可電性連接面板,如此驅動晶片可傳遞驅動訊號至面板,而驅動面板顯示影像。
但習知技術中,設置驅動晶片於面板時,導電介質會任意流動於驅動晶片之表面,導致導電介質之導電粒子無法有效地分布於驅動晶片之連接凸塊的表面,如此即會影響驅動晶片傳輸訊號至面板的能力,而面板可能無法正常運作。此外,此問題並非僅存在於面板之驅動晶片,也存在於其他類型晶片,例如晶片設置於電路板,因此,產業界需要一種導流結構,其可以導引導電介質往晶片之連接凸塊流動,以增加導電粒子分佈於連接凸塊之表面的數量,又或者可以減緩導電介質流動,以避免降低位於連接凸塊之表面之導電粒子的數量。
本發明之一目的在於提供一種晶片之導流結構,其包含至少一導流件,導流件設置於晶片之表面,並相鄰於設置在晶片之表面之複數個連接凸塊,當晶片設置於板件時,導流件可導引導電介質向連接凸塊流動,驅使導電粒子往連接凸塊移動,如此可增加位於連接凸塊之表面之導電粒子的數量,又或者可減緩導電介質流動,而可避免導電粒子離開連接凸塊之表面,以可避免降低位於連接凸塊之表面之導電粒子的數量。
本發明之一目的在於提供一種晶片之導流結構,其包含複數個連接凸塊群組,其設置於晶片之表面,該些個連接凸塊群組各別包含複數個凸塊,當晶片設置於板件時,該些個凸塊可減緩導電介質流動,而可避免導電粒子離開凸塊之表面,如此可避免降低位於凸塊之表面之導電粒子的數量。
本發明提供一種晶片之導流結構,其包含複數個連接凸塊以及至少一導流件,該些個連接凸塊設置於一晶片之一表面,該至少一導流件亦設置於晶片之表面,並相鄰於該些個連接凸塊,利用導流件阻擋導電介質,迫使導電介質流向該些個連接凸塊,或者減緩導電介質流動,進而避免位於該些個連接凸塊之表面之導電粒子的數量過低。
本發明提供另一種晶片之導流結構,其包含複數個連接凸塊群組,該些個連接凸塊群組設置於一晶片之一表面,該些個連接凸塊群組各別包含複數個凸塊,同一連接凸塊群組之該些個凸塊互相相鄰,並對應同一電連接件,利用此結構阻擋導電介質,而減緩導電介質流動,進而避免位於該些個凸塊之表面之導電粒子的數量過低。
為使 貴審查委員對本發明之特徵及所達成之功效有更進一步之瞭解與認識,謹佐以實施例及配合說明,說明如後:
請參閱第1圖,其為本發明之導流結構之第一實施例之立體示意圖。如圖所示,本發明之導流結構1包含複數個連接凸塊10以及至少一導流件20。
再次參閱第1圖以及參閱第3圖,第3圖為本發明之導流結構之第一實施例之剖視示意圖。於本實施例中,該些個連接凸塊10設置於一晶片2之一表面3,該些個連接凸塊10之材料為導電材料,該至少一導流件20設置於晶片2之表面3,並相鄰於該些個連接凸塊10。該至少一導流件20具有一高度H1,該些個連接凸塊10具有一高度H2,高度H1小於或等於高度H2,該至少一導流件20不高於該些個連接凸塊10。
再次參閱第1、3圖以及參閱第2圖,第2圖為本發明之導流結構之第一實施例之俯視示意圖。如圖所示,本實施例之導流件20之數量為複數個,並以該些個導流件20為例進行說明,該些個導流件20可包含複數個導流凸塊22,該些個導流凸塊22相鄰於該些個連接凸塊10。該些個導流凸塊22之一第一側面221對應於該些個連接凸塊10之一第二側面101,且第一側面221之一面積可大於第二側面101之一面積。當晶片2設置於一板件30,板件30可為顯示面板或者電路板等,該些個導流凸塊22可有效阻擋一導電介質40,而減緩導電介質40之流動,且驅使其回流至該些個連接凸塊10,其相當於該些個導流凸塊22導引導電介質40流到該些個連接凸塊10。
如第2圖、第3圖所示,加入導電介質40於晶片2之表面3而欲將晶片2設置於板件30時,晶片2受力而導致導電介質40流動於晶片2之表面3。如第2圖所示,導電介質40會受該些個導流凸塊22阻擋而減緩流動,且導電介質40受到該些個導流凸塊22之阻擋後也會回流至該些個連接凸塊10。如第3圖所示,導電介質40包含之複數個導電粒子42也隨之向該些個連接凸塊10移動,而可位於該些個連接凸塊10之表面。複數個電連接件32設置於板件30,而該些個連接凸塊10各別對應該些個電連接件32。
當晶片2設置於板件30時,位於該些個連接凸塊10之表面的該些個導電粒子42會接觸該些個連接凸塊10與對應之該些個電連接件32,如此該些個連接凸塊10可各別電性連接對應之該些個電連接件32,即晶片2可電性連接板件30。該些個導流凸塊22阻擋導電介質40,而減緩導體介質40之流動,可避免該些個導電粒子42離開該些個連接凸塊10之表面。此外,導電介質40受到該些個導流凸塊22之阻擋而回流至該些個連接凸塊10時,該些個導電粒子42向該些個連接凸塊10移動,可增加該些個連接凸塊10與該些個電連接件32之間的該些導電粒子42之數量,而提升晶片2與板件30間之傳輸能力。於本發明之一實施例中,該些個導流凸塊22可不對應於該些個電連接件32,即該些個導流凸塊22可不電性連接於該些個電連接件32。
再次參閱第3圖,該些個導流件20之至少一側面相鄰該些個連接凸塊10,該些個導流件20之該至少一側面可為非斜面或者斜面。於本實施例中,該至少一導流件20以該些個導流凸塊22舉例,該些個導流凸塊22之該至少一側面可為一斜面202,也可為一非斜面。導電介質40流動時,斜面202可導引導電介質40及其包含之導電粒子42向該些個連接凸塊10移動,如此可增加位於該些個連接凸塊10與該些個電連接件32之間的該些導電粒子42的數量。斜面202與導流凸塊22之底面203間之夾角可為銳角,該些個導流凸塊22可為導體或者非導體,導電介質40可為異向性導電膜(Anisotropic Conductive Film, ACF),但本發明不在此限制。
請參閱第4圖,其為本發明之導流結構之第二實施例之俯視示意圖。如圖所示,本實施例中,在該些個連接凸塊10之其中之至少一之周圍可設置超過一個導流凸塊22,即相對於連接凸塊10之前側面、後側面、左側面或者右側面各設置一個導流凸塊22,也就是多個導流凸塊22相鄰於至少一連接凸塊10的複數側面,利用該些個導流凸塊22限制導電介質40之流動,進一步驅使該些個導電粒子42可集中於該些個連接凸塊10與該些個電連接件32之間。
請參閱第5圖,其為本發明之導流結構之第三實施例之立體示意圖。如圖所示,本實施例之導流結構1包含複數個連接凸塊群組50,該些個連接凸塊群組50設置於晶片2之表面3,該些個連接凸塊群組50各別包含複數個凸塊52,同一連接凸塊群組50之該些個凸塊52互相相鄰,並對應板件30之同一個電連接件32。本實施例相對於第一實施例,該些個連接凸塊10各別分割成該些個凸塊52,該些個凸塊52仍對應同一個電連接件32。
再次參閱第5圖以及參閱第6圖、第7圖,第6圖為本發明之導流結構之第三實施例之俯視示意圖;第7圖為本發明之導流結構之第三實施例之剖視示意圖。如圖所示,於本實施例中,加入導電介質40於晶片2之表面3而欲將晶片2設置於板件30時,晶片2受力而導致導電介質40於晶片2之表面3流動,導電介質40受該些個凸塊52阻擋,而減緩導電介質40之流動,使導電介質40可盡量保持於該些個凸塊52之周圍,以避免該些個導電粒子42離開該些個凸塊52之表面,且將該些個導電粒子42集中於該些個凸塊52與該些個電連接件32之間。
請參閱第8圖,其為本發明之導流結構之第四實施例之立體示意圖。如圖所示,本實施例之導流結構1包含複數個連接凸塊10以及至少一導流件20。於本實施例中,該至少一導流件20為至少一填充件24,該至少一填充件24填充於晶片2之一線路區域4,且相鄰該些個連接凸塊10。線路區域4為晶片2之線路的所在區域。於本實施例中,該至少一填充件24圍繞於該些個連接凸塊10。如第10圖所示,該至少一填充件24具有高度H1,該些個連接凸塊10具有高度H2,高度H1小於或等於高度H2。
再次參閱第8圖以及請參閱第9圖、第10圖,第9圖為本發明之導流結構之第四實施例之俯視示意圖,第10圖為本發明之導流結構之第四實施例之剖視示意圖。如圖所示,加入導電介質40於晶片2之表面3與該至少一填充件24之表面而欲將晶片2設置於板件30時,晶片2受力而導致導電介質40於晶片2之表面3與該至少一填充件24之表面流動。由於該至少一填充件24圍繞該些個連接凸塊10,所以位於晶片2之表面3的導電介質40會被該至少一填充件24阻擋,而被限制流動於該些個連接凸塊10之所在位置,相當於導引導電介質40流動至該些個連接凸塊10之表面,而集中導電粒子42於該些個連接凸塊10與該些個電連接件32之間。此外,當晶片2受力設置於板件30時,位於該至少一填充件24之表面之導電介質40受該至少一填充件24阻擋,驅使導電介質40流動至未被該至少一填充件24填充之晶片2之表面,也就是該些個連接凸塊10之所在位置。如第10圖所示,位於該至少一填充件24之表面的導電介質40包含之該些個導電粒子42也隨之向該些個連接凸塊10移動,而增加位於該些個連接凸塊10與該些個電連接件32之間的該些個導電粒子42之數量。
再次參閱第10圖,本實施例中,該至少一填充件24之至少一側面相鄰該些個連接凸塊10,該至少一填充件24之該至少一側面可為斜面204,但也可以為非斜面。該至少一填充件24之材料係絕緣材,例如聚醯亞胺(Polyimide,PI)、苯並環丁烯(Benzocyclobutene, BCB),但本實施例不在此限制。
請參閱第11圖,其為本發明之導流結構之第五實施例之俯視示意圖。如圖所示,本實施例之導流結構1可包含複數個填充件24,該些個填充件24之間具有一間隔242。加入導電介質40於晶片2之表面3與該些個填充件24之表面而欲將晶片2設置於板件30時,位於晶片2之表面3的導電介質40會被該些個填充件24阻擋,而減緩導電介質40之流動,且導電介質40向該些個連接凸塊10回流,相當於導引導電介質40流動至該些個連接凸塊10之表面。此外,如上述說明,位於該些個填充件40之表面的導電介質40流動至該些個連接凸塊10。本實施例中,該些個填充件24之至少一側面可為斜面。
請參閱第12圖,其為本發明之導流結構之第六實施例之立體示意圖。如圖所示,本實施例中填充件24更填充於該些個連接凸塊10間之複數個間隔12,使填充件24包覆該些個連接凸塊10之側面。於本實施例中,填充件24幾乎覆蓋晶片2之所有表面。於一實施例中,填充件24之高度可小於或者等於該些個連接凸塊10之高度。
再次參閱第12圖以及請參閱第13圖,第13圖為本發明之第六實施例之剖視示意圖。如圖所示,加入導電介質40於填充件24之表面而欲將晶片2設置於板件30時,如先前所述,位於填充件24之表面的導電介質40流動至該些個連接凸塊10。如第13圖所示,導電介質40包含之該些個導電粒子42也隨之向該些個連接凸塊10移動,增加位於該些個連接凸塊10與該些個電連接件32之間的該些個導電粒子42之數量。上述各實施例可相互結合應用,以提高效能。
綜上所述,本發明提供一種晶片之導流結構,其包含至少一導流件,導流件設置於晶片之表面,並相鄰設置在晶片之表面之複數個連接凸塊,導流件可阻擋導電介質,使導電介質向該些個連接凸塊流動,進而增加位於該些個連接凸塊之表面之導電粒子的數量,導流件亦可減緩導電介質之流動,而可避免導電粒子離開該些個連接凸塊之表面。此外,更可將該些個連接凸塊分為複數個凸塊,該些個凸塊可減緩導電介質之流動,讓導電介質保持於該些個凸塊之周圍,進而避免位於該些個凸塊之表面之導電粒子離開該些個凸塊之表面。
故本發明實為一具有新穎性、進步性及可供產業上利用者,應符合我國專利法專利申請要件無疑,爰依法提出發明專利申請,祈 鈞局早日賜准專利,至感為禱。
惟以上所述者,僅為本發明一實施例而已,並非用來限定本發明實施之範圍,故舉凡依本發明申請專利範圍所述之形狀、構造、特徵及精神所為之均等變化與修飾,均應包括於本發明之申請專利範圍內。
1:導流結構
2:晶片
3:表面
4:線路區域
10:連接凸塊
101:第二側面
12:間隔
20:導流件
202:斜面
203:底面
204:斜面
22:導流凸塊
221:第一側面
24:填充件
242:間隔
30:板件
32:電連接件
40:導電介質
42:導電粒子
50:連接凸塊群組
52:凸塊
H1:高度
H2:高度
第1圖:其為本發明之導流結構之第一實施例之立體示意圖;
第2圖:其為本發明之導流結構之第一實施例之俯視示意圖;
第3圖:其為本發明之導流結構之第一實施例之剖視示意圖;
第4圖:其為本發明之導流結構之第二實施例之俯視示意圖;
第5圖:其為本發明之導流結構之第三實施例之立體示意圖;
第6圖:其為本發明之導流結構之第三實施例之俯視示意圖;
第7圖:其為本發明之導流結構之第三實施例之剖視示意圖;
第8圖:其為本發明之導流結構之第四實施例之立體示意圖;
第9圖:其為本發明之導流結構之第四實施例之俯視示意圖;
第10圖:其為本發明之導流結構之第四實施例之剖視示意圖;
第11圖:其為本發明之導流結構之第五實施例之俯視示意圖;
第12圖:其為本發明之導流結構之第六實施例之立體示意圖;以及
第13圖:其為本發明之導流結構之第六實施例之剖視示意圖。
1:導流結構
2:晶片
3:表面
10:連接凸塊
101:第二側面
20:導流件
22:導流凸塊
221:第一側面
Claims (11)
- 一種晶片之導流結構,其包含: 複數個連接凸塊群組,其設置於一晶片之一表面,該些個連接凸塊群組各別包含複數個凸塊,同一連接凸塊群組之該些個凸塊互相相鄰,並對應同一電連接件。
- 如請求項1所述之晶片之導流結構,其中該電連接件設置於一板件。
- 一種晶片之導流結構,其包含: 複數個連接凸塊,其設置於一晶片之一表面,該些個連接凸塊分別具有一第二側面,該些個連接凸塊之該第二側面彼此不相對;以及 至少一導流件,其設置於該晶片之該表面,並相鄰於該些個連接凸塊,該至少一導流件具有一第一側面,並該第一側面相對於該些個連接凸塊之彼此不相對之該第二側面。
- 如請求項3所述之晶片之導流結構,其中該至少一導流件之一高度小於等於該些個連接凸塊之一高度。
- 如請求項3所述之晶片之導流結構,其中該至少一導流件之該第一側面相鄰該些個連接凸塊,該至少一導流件之該第一側面為一斜面。
- 如請求項3所述之晶片之導流結構,其中該至少一導流件包含複數個導流件,該些個導流件包含複數個導流凸塊,該些個導流凸塊相鄰於該些個連接凸塊。
- 如請求項6所述之晶片之導流結構,其中該些個導流凸塊之該第一側面對應於該些個連接凸塊之該第二側面,該第一側面之一面積大於該第二側面之一面積。
- 如請求項6所述之晶片之導流結構,其中該些個導流凸塊其中之多個導流凸塊相鄰於該些個連接凸塊其中之至少一連接凸塊的複數側面。
- 如請求項6所述之晶片之導流結構,其中該些個導流凸塊之該第一側面相鄰該些個連接凸塊,該些個導流凸塊之該第一側面為一斜面。
- 如請求項3所述之晶片之導流結構,其中該至少一導流件為導體或者非導體。
- 如請求項3所述之晶片之導流結構,其中該些個連接凸塊各別對應複數個電連接件,該些個電連接件設置於一板件。
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US6937047B2 (en) * | 2003-08-05 | 2005-08-30 | Freescale Semiconductor, Inc. | Integrated circuit with test pad structure and method of testing |
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