TW202343692A - 封裝方法及封裝結構 - Google Patents

封裝方法及封裝結構 Download PDF

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TW202343692A
TW202343692A TW111115358A TW111115358A TW202343692A TW 202343692 A TW202343692 A TW 202343692A TW 111115358 A TW111115358 A TW 111115358A TW 111115358 A TW111115358 A TW 111115358A TW 202343692 A TW202343692 A TW 202343692A
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bonding
wafers
metal
packaging
silver
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TW111115358A
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TWI799238B (zh
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梁晉睿
黃惠燕
汪秉龍
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宏齊科技股份有限公司
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Priority to TW111115358A priority Critical patent/TWI799238B/zh
Priority to US17/863,400 priority patent/US20230343666A1/en
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Publication of TWI799238B publication Critical patent/TWI799238B/zh
Publication of TW202343692A publication Critical patent/TW202343692A/zh

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Abstract

本發明公開一種封裝方法，是先將多個晶片佈置於一載板的一承載面上，以進行晶片重組。每一個晶片具有連接於承載面的一第一側及相對於第一側的一第二側，且於第二側形成有至少一晶片連接件。接著，提供一基礎構造，基礎構造的一鍵合面上具有多個預定區域以分別鍵合多個晶片，且在每一個預定區域內形成有至少一電連接結構。然後，在特定的熱壓條件下通過一包封材料將基礎構造、多個晶片與載板結合成一體。

Description

封裝方法及封裝結構
本發明屬於半導體製造領域，特別是涉及一種封裝方法及封裝結構。
隨著電子產業的蓬勃發展，現今電子產品的設計強調輕薄短小及功能性，為此業界開發出了不同的封裝技術。其中，面板級封裝（panel-level package）因為具有生產效率高、生產成本低與適合大規模生產等優勢而受到受到廣泛的關注，其應用市場也逐步多元。
面板級封裝是將晶圓切割分離出眾多晶粒，並將這些晶粒排布於載板上，然後在同一工藝流程中同時封裝。然而，面板級封裝的工藝步驟仍過於繁複且成本較高，故業界正在嘗試以一般製程能力便能夠達到的各種方式來簡化工藝步驟同時降低生產成本。
本發明所要解決的技術問題在於，針對現有技術的不足提供一種可以在同一製程步驟中完成半導體晶片的鍵合與包封的封裝方法，以及利用此封裝方法所製成的封裝結構。
為了解決上述的技術問題，本發明所採用的其中一技術方案是提供一種封裝方法，其包括：提供一載板，所述載板具有一承載面；將多個晶片佈置於所述載板的所述承載面上，其中每一所述晶片具有連接於所述承載面的一第一側以及相對於所述第一側的一第二側，且所述第二側具有至少一晶片連接件；以及提供一基礎構造，並在一熱壓條件下通過一包封材料將所述基礎構造、多個所述晶片與所述載板結合成一體。所述基礎構造具有一鍵合面，所述鍵合面上具有多個預定區域以分別鍵合多個所述晶片，且每一所述預定區域內具有至少一電連接結構。每一所述晶片的至少一所述晶片連接件與對應的所述預定區域內的至少一所述電連接結構之間具有在所述熱壓條件下形成的一金屬-金屬鍵合；所述包封材料也在所述熱壓條件下形成一包封層，所述包封層位於所述載板與所述基礎構造之間並將多個所述晶片與外界隔離。
為了解決上述的技術問題，本發明所採用的另外一技術方案是提供一種封裝結構，其包括一載板、多個晶片、一基礎構造以及一包封層。 所述載板具有一承載面，多個所述晶片佈置於所述載板的所述承載面上，其中每一所述晶片具有連接於所述承載面的一第一側以及相對於所述第一側的一第二側，且所述第二側具有至少一晶片連接件。所述基礎構造具有一鍵合面，所述鍵合面上具有多個預定區域以分別鍵合多個所述晶片，且每一所述預定區域內具有至少一電連接結構。所述包封層位於所述載板與所述基礎構造之間並將多個所述晶片與外界隔離。每一所述晶片的至少一所述晶片連接件與對應的所述預定區域內的至少一所述電連接結構之間具有一金屬-金屬鍵合，且所述金屬-金屬鍵合與所述包封層皆是在一熱壓條件下形成的。
在本發明的一實施例中，所述熱壓條件包括一真空度、一預設壓力、一預設溫度以及一預設時間，所述真空度為10 -5torr至10 -1torr，所述預設壓力為1 MPA至100 MPA，所述預設溫度為25 oC至280 oC，所述預設時間為1秒至600秒。
在本發明的一實施例中，所述金屬-金屬鍵合為一銅-銅直接鍵合、一銀-銀直接鍵合、一金-錫共晶鍵合、一金-銀共晶鍵合、一鈀-錫共晶鍵合、一鈀-銀共晶鍵合或一鈀-銅共晶鍵合。
在本發明的一實施例中，所述封裝方法還包括將所述載板移除，並在多個所述晶片上設置一功能層。
在本發明的一實施例中，所述功能層為一散熱層。
在本發明的一實施例中，在將多個所述晶片佈置於所述載板的所述承載面上的步驟中，多個所述晶片各自藉由一黏著材固定於所述載板的所述承載面上。
在本發明的一實施例中，每一所述晶片的所述第二側還具有多個晶片接墊以及形成於多個所述晶片接墊上的一重佈結構，至少一所述晶片連接件形成於所述重佈結構上，且與多個所述晶片接墊電性連接。
在本發明的一實施例中，所述基礎結構為一電路板、一導線架或一封裝基板。
本發明的其中一有益效果在於，本發明所提供的封裝方法，其能通過“提供一基礎構造，並在一熱壓條件下通過一包封材料將所述基礎構造、多個所述晶片與所述載板結合成一體”以及“每一所述晶片的至少一所述晶片連接件與對應的所述預定區域內的至少一所述電連接結構之間具有一金屬-金屬鍵合，且所述金屬-金屬鍵合與所述包封層皆是在一熱壓條件下形成的”的技術特徵，以達到減少製程步驟、縮短製程時間、製造薄型封裝、提高封裝良率和可靠性等有利功效，能符合高階產品和高性能的需求。
為使能更進一步瞭解本發明的特徵及技術內容，請參閱以下有關本發明的詳細說明與圖式，然而所提供的圖式僅用於提供參考與說明，並非用來對本發明加以限制。
以下是通過特定的具體實施例來說明本發明所公開有關“封裝方法及封裝結構”的實施方式，本領域技術人員可由本說明書所公開的內容瞭解本發明的優點與效果。本發明可通過其他不同的具體實施例加以施行或應用，本說明書中的各項細節也可基於不同觀點與應用，在不背離本發明的構思下進行各種修改與變更。另外，本發明的附圖僅為簡單示意說明，並非依實際尺寸的描繪，事先聲明。以下的實施方式將進一步詳細說明本發明的相關技術內容，但所公開的內容並非用以限制本發明的保護範圍。另外，本文中所使用的術語“或”，應視實際情況可能包括相關聯的列出項目中的任一個或者多個的組合。
在沒有另行定義的情況下，本文中所使用的術語具有與本領域技術人員的通常理解相同的含義。各實施例中所涉及的材料，如無特別說明則為市售或根據現有技術製得的材料。各實施例中所涉及的操作或儀器，如無特別說明則為本領域常規的操作或儀器。
應當理解，儘管在本文中是按照特定順序來描述方法流程圖中的多個步驟，但是這並非要求或者暗示必須按照該特定順序來執行這些步驟，或是必須執行所有的步驟才能實現期望的結果。選擇性地，可將多個步驟合併為一個步驟執行，或者將一個步驟分解為多個步驟執行。
[第一實施例]
參閱圖1所示，本發明第一實施例提供一種封裝方法，其至少包括下列幾個步驟：步驟S100，提供一載板；步驟S102，將多個晶片佈置於載板的一承載面上；以及步驟S104，提供一基礎構造，並在特定的熱壓條件下通過一包封材料將基礎構造、多個晶片與載板結合成一體。值得一提的是，本發明的封裝方法可用於實現面板級系統封裝，且相較於現有的封裝技術在減少製程步驟、縮短製程時間、製造薄型封裝、提高封裝良率和可靠性等方面更具優勢。以下將配合參閱圖2至圖6來分別描述各個步驟的具體實施細節。
步驟S100是步驟S102的準備步驟；如圖2所示，在步驟S100中，載板1可以是一剛性載板或一柔性載板，且較佳是剛性載板。載板1可具有任意所需的形狀（如矩形）和尺寸，其中載板1具有一承載面100，承載面100可以是一平面。需要說明的是，載板1的尺寸越大，可以佈置更多的晶片以進行封裝及整合，有利於降低封裝成本。作為本實施例所使用的載板1，可以不具有電氣功能，具體可以是BT（Bismaleimide Triazine）載板、ABF（Ajinomoto Build-up Film）載板、玻璃載板、塑膠載板或電路板，但本發明不以這些例子為限。然而，其他合適的材料也可以被使用，只要能提供所需的承載力並能承受後續製程的影響（確保後續製程的可操作性）即可。
步驟S102是晶片重組步驟；如圖2所示，在步驟S102中，多個晶片2是依照預定的位置和姿態在載板1的承載面100上重新排佈，其中每一個晶片2具有連接於承載面100的一第一側S1及相對於第一側S1的一第二側S2；第二側S2可以是晶片2的主動面所在的一側，且在第二側S2形成有至少一個晶片連接件24（如金屬凸塊），以將晶片2電性連接至其他元件。在本實施例中，多個晶片2可以是以晶圓為基礎而形成的半導體晶片，各式各樣的電路可形成於多個晶片2的本體上。多個晶片2可具有相同或不同的功能類型；作為本實施例所使用的多個晶片2，具體可以是處理晶片、邏輯晶片、儲存晶片及/或通訊晶片，但本發明不以這些例子為限。
實際應用時，如圖3所示，多個晶片2各自可藉由一黏著材5以固定於載板1的承載面100上，黏著材5可採用黏晶膜（die attach film, DAF），但本發明不限於此。在一些實施例中，為便於在封裝完成後將載板1與多個晶片2分離，黏著材5可採用熱解黏膠膜。
根據實際需要，如圖4所示，可進一步在每一個晶片2的第二側S2形成有一重佈結構23，且至少一個晶片連接件24通過重佈結構23與多個晶片接墊22電性連接。進一步地說，多個晶片接墊22形成於晶片本體21（如矽、鍺、砷化鎵等）上，且至少一個晶片連接件24形成於重佈結構23上。需要說明的是，重佈結構23中的導電路徑可以根據不同的設計需求而有不同的配置，本發明對此不加以限定。
步驟S104是晶片鍵合及封裝步驟；如圖5及圖6所示，在步驟S104中，是先將包封材料4’施加於載板1的承載面100上，施加方式包括但不限於塗佈及貼附，使得多個晶片2各自有至少一部分被包封於包封材料4’之中，然後將多個晶片2對準於基礎構造3的多個預定區域A（如晶片設置區域）並進行熱壓合。在特定的熱壓條件下，多個晶片2可分別鍵合於基礎構造3的多個預定區域A，且包封材料4’可以在載板1與基礎構造3之間形成一包封層4，以將多個晶片2與外界隔離，從而降低環境因素如水氣造成的負面影響，同時保護多個晶片2免受物理損傷。包封材料4’可採用模塑材料（molding compound）或乾膜，但本發明不以這些例子為限。作為本實施例所使用的基礎構造3，具體可以是電路板、導線架或封裝基板，但本發明不以這些例子為限。基礎構造3具有一鍵合面，在鍵合面300上具有多個預定區域A，且在每一個預定區域A內形成有至少一電連接結構31（如電連接墊或引腳）。
在一些實施例中，也可以先將包封材料4’施加於基礎構造3的鍵合面300上，再與附有多個晶片2的載板1進行熱壓合。
進一步地說，步驟S104所使用的熱壓條件可包括一真空度、一預設壓力、一預設溫度及一預設時間；真空度可以是10 -5torr至10 -1torr，且較佳是小於10 -3torr；預設壓力可以是1 MPA至100 MPA，且較佳是20 MPA至80 MPA；預設溫度可以是25 oC至280 oC，較佳是200 oC至250 oC；預設時間可以是1秒至600秒，較佳是1秒至300秒。
值得一提的是，在熱壓合的過程中，包封材料4’會先發生軟化以充分地填充於載板1、多個晶片2與基礎構造3之間的空隙中並覆蓋多個晶片2，再完全固化而形成包封層4；另外，每一個晶片2的至少一個晶片連接件24與對應的預定區域A內的至少一電連接結構31之間形成有一金屬-金屬鍵合B（metal to metal bonding）。金屬-金屬鍵合B較佳是一銅-銅直接鍵合、一銀-銀直接鍵合、一金-錫共晶鍵合、一金-銀共晶鍵合、一鈀-錫共晶鍵合、一鈀-銀共晶鍵合或一鈀-銅共晶鍵合，但本發明不以這些例子為限。然而，其他合適的金屬-金屬鍵合B也可以被形成，只要能提供所需的鍵合力並能建立良好的導電連接即可。
復參閱圖1，並配合圖7及圖8所示所示，本發明的封裝方法還可包括步驟S106，將載板移除，並在多個晶片上設置一功能層。實際應用時，被移除的載板1可以是1如ABF載板，功能層6可以是一散熱層，且覆蓋多個晶片2的第一側S1與包封層4。因此多個晶片2產生的熱可通過功能層6快速地向外逸散，以解決封裝結構的散熱問題，從而延長所應用的電子裝置的使用壽命。
[第二實施例]
參閱圖5及圖6所示，本發明第二實施例提供一種封裝結構，其是利用第一實施例所述的封裝方法製成。本發明的封裝結構包括一載板1、多個晶片2、一基礎構造3及一包封層4。載板1具有一承載面100，多個晶片2佈置於載板1的承載面100上，其中每一個晶片2具有連接於承載面100的一第一側S1及相對於第一側S1的一第二側S2，且在第二側S2形成有至少一個晶片連接件24。基礎構造3具有一鍵合面300，鍵合面300上具有多個預定區域A以分別鍵合多個晶片2，且在每一個預定區域A內形成有至少一電連接結構31。包封層4位於載板1與基礎構造3之間並將多個晶片2與外界隔離。每一個晶片2的至少一個晶片連接件24與對應的預定區域A內的至少一個電連接結構31之間具有一金屬-金屬鍵合B，且金屬-金屬鍵合B與包封層4皆是在特定的熱壓條件下形成的。
在本實施例中，熱壓條件可包括一真空度、一預設壓力、一預設溫度及一預設時間；真空度可以是10 -5torr至10 -1torr，且較佳是小於10 -3torr；預設壓力可以是1 MPA至100 MPA，且較佳是20 MPA至80 MPA；預設溫度可以是25 oC至280 oC，較佳是200 oC至250 oC；預設時間可以是1秒至600秒，較佳是1秒至300秒。
實際應用時，載板1可以不具有電氣功能，載板1可以是BT（Bismaleimide Triazine）載板、ABF（Ajinomoto Build-up Film）載板、玻璃載板、塑膠載板或電路板。多個晶片2可以是處理晶片、邏輯晶片、儲存晶片及/或通訊晶片，多個晶片2各自可藉由一黏著材5以固定於載板1的承載面100上，黏著材5可採用黏晶膜（die attach film, DAF）。基礎構造3可以是電路板、導線架或封裝基板。包封層4的材料可採用模塑材料（molding compound）或乾膜。然而，以上所述只是可行的實施方式，而非用以限制本發明。
在一些實施例中，如圖8所示，封裝結構的載板1可以被一功能層6所取代，功能層6可以是一散熱層，且覆蓋多個晶片2的第一側S1與包封層4，以解決封裝結構的散熱問題。
第一實施例中提到的相關技術細節在本實施例中依然有效，為了減少重複，這裡不再贅述。同樣地，本實施例中提到的相關技術細節也可以應用在第一實施例中。
[實施例的有益效果]
本發明的其中一有益效果在於，本發明所提供的封裝方法，其能通過“提供一基礎構造，並在一熱壓條件下通過一包封材料將所述基礎構造、多個所述晶片與所述載板結合成一體”以及“每一所述晶片的至少一所述晶片連接件與對應的所述預定區域內的至少一所述電連接結構之間具有一金屬-金屬鍵合，且所述金屬-金屬鍵合與所述包封層皆是在一熱壓條件下形成的”的技術特徵，以達到減少製程步驟、縮短製程時間、製造薄型封裝、提高封裝良率和可靠性等有利功效，能符合高階產品和高性能的需求。更進一步來說，本發明的封裝方法可以將封裝尺寸縮小到0.1 mm至0.35 mm。
本發明的封裝方法可實施於一卷對卷壓合設備上，以連續式地將附有多個晶片的載板透過一包封材料與一基礎構造熱壓合成一體，藉此提高生產效能。
以上所公開的內容僅為本發明的優選可行實施例，並非因此侷限本發明的申請專利範圍，所以凡是運用本發明說明書及圖式內容所做的等效技術變化，均包含於本發明的申請專利範圍內。
1:載板 100:承載面 2:晶片 S1:第一側 S2:第二側 21:晶片本體 22:晶片接墊 23:重佈結構 24:晶片連接件 3:基礎構造 300:鍵合面 31:電連接結構 A:預定區域 4’:包封材料 4:包封層 5:黏著材 6:功能層 B:金屬-金屬鍵合 S100、S102、S104、S106:封裝方法步驟
圖1為本發明第一實施例的封裝方法的流程圖。
圖2及圖3為對應本發明第一實施例的封裝方法的步驟S100及S102的製程示意圖。
圖4為本發明第一實施例的封裝方法所使用的晶片的結構示意圖。
圖5及圖6為對應本發明第一實施例的封裝方法的步驟S104的製程示意圖。
圖7為對應本發明第一實施例的封裝方法的步驟S106的製程示意圖。
圖8為對應本發明第一實施例的封裝方法的步驟S106之後的選擇性步驟的製程示意圖。
S100、S102、S104、S106:封裝方法步驟

Claims (10)

  1. 一種封裝方法，其包括： 提供一載板，所述載板具有一承載面； 將多個晶片佈置於所述載板的所述承載面上，其中每一所述晶片具有連接於所述承載面的一第一側以及相對於所述第一側的一第二側，且所述第二側具有至少一晶片連接件；以及 提供一基礎構造，並在一熱壓條件下通過一包封材料將所述基礎構造、多個所述晶片與所述載板結合成一體； 其中，所述基礎構造具有一鍵合面，所述鍵合面上具有多個預定區域以分別鍵合多個所述晶片，且每一所述預定區域內具有至少一電連接結構； 其中，每一所述晶片的至少一所述晶片連接件與對應的所述預定區域內的至少一所述電連接結構之間具有在所述熱壓條件下形成的一金屬-金屬鍵合；所述包封材料在所述熱壓條件下形成一包封層，所述包封層位於所述載板與所述基礎構造之間並將多個所述晶片與外界隔離。
  2. 如請求項1所述的封裝方法，其中，所述熱壓條件包括一真空度、一預設壓力、一預設溫度以及一預設時間，所述真空度為10 -5torr至10 -1torr，所述預設壓力為1 MPA至100 MPA，所述預設溫度為25 oC至280 oC，所述預設時間為1秒至600秒。
  3. 如請求項1所述的封裝方法，其中，所述金屬-金屬鍵合為一銅-銅直接鍵合、一銀-銀直接鍵合、一金-錫共晶鍵合、一金-銀共晶鍵合、一鈀-錫共晶鍵合、一鈀-銀共晶鍵合或一鈀-銅共晶鍵合。
  4. 如請求項1所述的封裝方法，其中，所述封裝方法還包括將所述載板移除，並在多個所述晶片上設置一功能層。
  5. 如請求項4所述的封裝方法，其中，所述功能層為一散熱層。
  6. 如請求項1所述的封裝方法，其中，在將多個所述晶片佈置於所述載板的所述承載面上的步驟中，多個所述晶片各自藉由一黏著材固定於所述載板的所述承載面上。
  7. 一種封裝結構，其包括： 一載板，具有一承載面； 多個晶片，佈置於所述載板的所述承載面上，其中每一所述晶片具有連接於所述承載面的一第一側以及相對於所述第一側的一第二側，且所述第二側具有至少一晶片連接件； 一基礎構造，具有一鍵合面，所述鍵合面上具有多個預定區域以分別鍵合多個所述晶片，且每一所述預定區域內具有至少一電連接結構；以及 一包封層，位於所述載板與所述基礎構造之間並將多個所述晶片與外界隔離； 其中，每一所述晶片的至少一所述晶片連接件與對應的所述預定區域內的至少一所述電連接結構之間具有一金屬-金屬鍵合，且所述金屬-金屬鍵合與所述包封層皆是在一熱壓條件下形成。
  8. 如請求項7所述的封裝結構，其中，所述金屬-金屬鍵合為一銅-銅直接鍵合、一銀-銀直接鍵合、一金-錫共晶鍵合、一金-銀共晶鍵合、一鈀-錫共晶鍵合、一鈀-銀共晶鍵合或一鈀-銅共晶鍵合。
  9. 如請求項7所述的封裝結構，其中，每一所述晶片的所述第二側還具有多個晶片接墊以及形成於多個所述晶片接墊上的一重佈結構，至少一所述晶片連接件形成於所述重佈結構上，且與多個所述晶片接墊電性連接。
  10. 如請求項7所述的封裝結構，其中，所述基礎結構為一電路板、一導線架或一封裝基板。
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