TW201914051A - Method of manufacturing light-emitting element - Google Patents

Method of manufacturing light-emitting element Download PDF

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TW201914051A
TW201914051A TW107126987A TW107126987A TW201914051A TW 201914051 A TW201914051 A TW 201914051A TW 107126987 A TW107126987 A TW 107126987A TW 107126987 A TW107126987 A TW 107126987A TW 201914051 A TW201914051 A TW 201914051A
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layer
light
substrate
semiconductor
emitting element
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TW107126987A
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Chinese (zh)
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石崎順也
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日商信越半導體股份有限公司
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005Processes
    • H01L33/0093Wafer bonding; Removal of the growth substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005Processes
    • H01L33/0062Processes for devices with an active region comprising only III-V compounds

Abstract

The present invention provides a method for manufacturing a light-emitting element, which is configured to reduce the cleavage failure rate when the light-emitting element is separated from the semiconductor substrate having the lattice-mismatched window layer and the support substrate by scribing and cleaving. A light-emitting layer portion is formed by epitaxially growing a first semiconductor layer, an active layer and a second semiconductor layer on a substrate through a lattice matching material, and a window layer and the support substrate are formed by epitaxially growing a material lattice-mismatched with the light-emitting layer portion. The substrate is removed to form a first ohmic electrode on the first semiconductor layer, a removal portion is formed by at least removing the first semiconductor layer and the active layer, and a second ohmic electrode is formed on the second semiconductor layer of the removal portion or on the window layer and the support substrate, thereby manufacturing a semiconductor substrate at least having the light-emitting layer portion excluding the removal portion, the first ohmic electrode and the second ohmic electrode on the window layer and the support substrate. The light-emitting element is separated from the semiconductor substrate by scribing and cleaving. Through the reverse side formed with the surface of the light-emitting layer portion of the semiconductor substrate, a groove having a residual thickness of 70 [mu]m or less is formed in the window layer and the support substrate, and the light-emitting element is separated by scribing and cleaving. Then, the surface side is formed on the light-emitting layer portion of the semiconductor substrate and the surface of the semiconductor substrate is marked along the groove. A force perpendicular to the semiconductor substrate is applied to the entire length or a portion of the groove to separate the light-emitting element. The groove is formed by a wet or dry etching.

Description

發光元件的製造方法Manufacturing method of light emitting element

本發明係為關於一種發光元件的製造方法,特別是一種關於包含自半導體基板將發光元件透過刻劃及劈裂予以分離的步驟之發光元件的製造方法。The present invention relates to a method for manufacturing a light-emitting element, and more particularly, to a method for manufacturing a light-emitting element including a step of separating the light-emitting element from the semiconductor substrate by scoring and splitting.

晶片直接封裝(COB)等的產品,係為自LED元件的散熱性佳,且被採用於照明等的用途的LED晶片安裝方法。將LED安裝在COB等的場合,則必須為將晶片直接對基板接合的覆晶安裝。為了實現覆晶安裝,必須製作發光元件的一側的表面上設有極性相異的通電用銲墊的覆晶。此外,設置有通電用銲墊的表面的相反側的表面則必須以具有光提取功能的材料來構成。Products such as chip direct package (COB) are LED chip mounting methods that have good heat dissipation from LED elements and are used in applications such as lighting. When LEDs are mounted in COBs or the like, they must be flip-chip mounted where the wafer is directly bonded to the substrate. In order to achieve flip-chip mounting, a flip-chip having conductive pads having different polarities on the surface of one side of the light-emitting element must be fabricated. In addition, the surface on the opposite side of the surface on which the pads for conducting electricity are provided must be made of a material having a light extraction function.

以黃色~紅色LED製作覆晶的場合,發光層係使用AlGaInP系的材料。由於AlGaInP系材料不存在塊狀結晶,LED部係以磊晶法形成,故起始基板會選擇與AlGaInP不同的材料。起始基板大多選擇GaAs或Ge,而這些基板具有對可見光的光吸收的特性,故製作覆晶的場合,會除去起始基板。When a flip-chip is produced from yellow to red LEDs, an AlGaInP-based material is used as the light-emitting layer. Since the AlGaInP-based material does not have bulk crystals, and the LED part is formed by an epitaxial method, the starting substrate will choose a material different from AlGaInP. Most of the starting substrates are GaAs or Ge, and these substrates have the characteristic of absorbing light in visible light. Therefore, when a flip-chip is fabricated, the starting substrate is removed.

然而,形成發光層的磊晶層為極薄膜,故起始基板除去後便無法自立。因此必須以具有對發光波長呈現略透明而作為發光層的窗層的功能,以及厚度足以使其自立而作為支承基板的功能的材料及構成,與起始基板置換。However, the epitaxial layer forming the light emitting layer is an extremely thin film, so it cannot stand on its own after the starting substrate is removed. Therefore, it is necessary to replace the starting substrate with a material and a structure that have a function of a window layer that is slightly transparent to the light emission wavelength as a light emitting layer and a thickness sufficient to make it stand on its own as a supporting substrate.

作為具有窗層兼支承基板的功能的置換材料,會選擇GaP、GaAsP及藍寶石等。不論選擇上述任一種材料,皆為與AlGaInP系材料相異的材料,故晶格常數、熱膨脹係數及楊氏係數等機械的特性會與AlGaInP系材料不同。As a replacement material having a function of a window layer and supporting a substrate, GaP, GaAsP, sapphire, and the like are selected. Regardless of the choice of any of the above materials, they are all materials different from AlGaInP-based materials, so the mechanical properties such as lattice constant, thermal expansion coefficient, and Young's coefficient will be different from those of AlGaInP-based materials.

作為這樣的技術,專利文獻1中揭露了將GaP結晶成長而形成窗層兼支承基板的方法。As such a technique, Patent Document 1 discloses a method of growing GaP crystals to form a window layer and supporting a substrate.

此處使用圖3的(a)~(d)來說明過去的覆晶構造的發光元件的製造方法的一範例。Here, an example of a method of manufacturing a conventional light-emitting device with a flip-chip structure will be described using FIGS. 3 (a) to (d).

製造AlGaInP系磊晶晶圓的場合,一開始如圖3的(a)所示,準備例如朝[001]方向傾斜15度的GaAs基板作為起始基板300。然後於GaAs基板300上以有機金屬氣相沉積(MOVPE)法,將(Alx Ga1- xy In1 y P(0≦x≦1, 0.4≦y≦0.6)所成的第一半導體層(N包覆層)301、(Alx Ga1- xy In1 y P(0≦x≦1, 0.4≦y≦0.6)所成的活性層302及(Alx Ga1- xy In1 y P(0≦x≦1, 0.4≦y≦0.6)所成的第二半導體層(P包覆層)303予以堆疊作為發光層部307。然後依序堆疊Gay In1 y P(0.0≦y≦1.0)所成的中間組成層304、具有0.5μm以上厚度的GaP窗層305。這些製作方法並不限定於MOVPE法,以分子束磊晶(MBE)法或化學束磊晶(CBE)法製作亦可。When manufacturing an AlGaInP-based epitaxial wafer, as shown in FIG. 3 (a), a GaAs substrate, for example, which is inclined 15 degrees in the [001] direction, is prepared as the starting substrate 300. Then, on the GaAs substrate 300, a first formed by (Al x Ga 1- x ) y In 1 - y P (0 ≦ x ≦ 1, 0.4 ≦ y ≦ 0.6) is formed by a metal organic vapor deposition (MOVPE) method. Active layer 302 formed by semiconductor layer (N cladding layer) 301, (Al x Ga 1- x ) y In 1 - y P (0 ≦ x ≦ 1, 0.4 ≦ y ≦ 0.6), and (Al x Ga 1- x ) A second semiconductor layer (P clad layer) 303 formed of y In 1 - y P (0 ≦ x ≦ 1, 0.4 ≦ y ≦ 0.6) is stacked as the light emitting layer portion 307. Then, an intermediate composition layer 304 formed by Ga y In 1 - y P (0.0 ≦ y ≦ 1.0) and a GaP window layer 305 having a thickness of 0.5 μm or more are sequentially stacked. These manufacturing methods are not limited to the MOVPE method, and may be manufactured by a molecular beam epitaxial (MBE) method or a chemical beam epitaxial (CBE) method.

然後相接於GaP窗層而形成GaAsz P1-z (0.0≦z≦0.1)所成的窗層兼支承基板306。雖然窗層兼支承基板306也可藉由MOVPE法或MBE法形成,但亦能適宜地使用低價且沉積速度快的氫化物氣相沉積(HVPE)法。厚度則可為例如100μm左右。Then, it is in contact with the GaP window layer to form a window layer and support substrate 306 made of GaAs z P 1-z (0.0 ≦ z ≦ 0.1). Although the window layer and supporting substrate 306 can also be formed by the MOVPE method or the MBE method, a low-cost and fast deposition hydride vapor deposition (HVPE) method can also be suitably used. The thickness may be, for example, about 100 μm.

然後,如圖3的(b)所示般,窗層兼支承基板306形成後,藉由化學性蝕刻,形成將AlGaInP系磊晶晶圓的GaAs基板300除去的晶圓031。化學性蝕刻液係以與AlGaInP系材料有蝕刻選擇性者為佳,一般會以含有氨的蝕刻劑進行除去。Then, as shown in FIG. 3 (b), after the window layer and support substrate 306 is formed, a wafer 031 is formed by removing the GaAs substrate 300 of the AlGaInP-based epitaxial wafer by chemical etching. The chemical etching solution is preferably one having an etching selectivity with an AlGaInP-based material, and is generally removed with an etchant containing ammonia.

然後,如圖3的(c)所示般,GaAs基板除去後,於晶圓031的第一半導體層(下部包覆層)301上形成第一歐姆電極351,在將至少第一半導體層(下部包覆層)301及活性層302的一部分切掉的區域(除去部)320形成後,於除去部320的一部分形成第二歐姆電極361。Then, as shown in FIG. 3 (c), after the GaAs substrate is removed, a first ohmic electrode 351 is formed on the first semiconductor layer (lower cladding layer) 301 of the wafer 031, and at least the first semiconductor layer ( After the region (removed portion) 320 in which a part of the lower cladding layer 301 and the active layer 302 are cut away is formed, a second ohmic electrode 361 is formed in a part of the removed portion 320.

然後,位於第一半導體層(下部包覆層301)且為區域320(除去部)以外的區域(非除去部)310之中,可於不具有第一歐姆電極351的區域311的至少一部分設置介電質部340。此外,也可於區域310與區域320之間的段差部330的至少一部分設置介電質部341。接著便可得到區域320之中,第二歐姆電極361以外的區域321的至少一部分設置介電質部342的半導體基板A03。Then, the first semiconductor layer (the lower cladding layer 301) is located in at least a part of the region 311 without the first ohmic electrode 351 among the regions (non-removed portions) 310 other than the region 320 (the removed portion). Dielectric Substance 340. In addition, a dielectric portion 341 may be provided in at least a part of the step portion 330 between the region 310 and the region 320. Then, a semiconductor substrate A03 having a dielectric portion 342 in at least a part of the region 321 other than the second ohmic electrode 361 in the region 320 can be obtained.

此外,雖然圖3的(c)中舉例表示了具有全部介電質部340、341及342的場合,但不必具有全部,僅具有一部分的場合也能夠得到同樣的效果。此外,雖然於區域311中,舉例表示了只有介電質部340的構造,但亦可於介電質部340與第一半導體層301的區域311之間設置光反射膜或光反射部,或者也可於介電質部340沒有相接於第一半導體層301的區域311的面側設置光反射膜或光反射部。In addition, although the case where all the dielectric portions 340, 341, and 342 are provided is shown in FIG. 3 (c) as an example, the same effect can be obtained even when all of the dielectric portions 340, 341, and 342 are provided. In addition, although the structure having only the dielectric portion 340 is exemplified in the region 311, a light reflecting film or a light reflecting portion may be provided between the dielectric portion 340 and the region 311 of the first semiconductor layer 301, or A light reflecting film or a light reflecting portion may be provided on the surface side of the region 311 where the dielectric portion 340 is not in contact with the first semiconductor layer 301.

此外,雖然舉例表示了區域311之中具有平坦的面的場合,但也可以為具有凹凸的面。關於具有凹凸的面,可為藉由濕式蝕刻的單純粗糙面、具有刻琢面的刻琢粗糙面、具有數十μm~數百nm間距的藉由光刻予以圖案化的圖案化粗糙面或是具有數~數百nm的間距的溝槽形狀的光子粗糙面。In addition, although the case where there is a flat surface in the area 311 is shown as an example, it may be a surface having unevenness. Regarding the surface with unevenness, it may be a simple rough surface by wet etching, a carved rough surface with a cut surface, or a patterned rough surface patterned by photolithography with a pitch of tens of μm to hundreds of nm. Or a photonic rough surface with a trench shape having a pitch of several to several hundred nm.

此外,雖然舉例表示了段差部330、區域(除去部)320及窗層兼支承基板306為沒有凹凸的平坦的面,但也可以為具有凹凸的面。關於具有凹凸的面,可為藉由濕式蝕刻的單純粗糙面、具有刻琢面的刻琢粗糙面、具有數十μm~數百nm間距的藉由光刻予以圖案化的圖案化粗糙面或是具有數~數百nm的間距的溝槽形狀的光子粗糙面的任何一種。此外,雖然舉例表示了於窗層兼支承基板306表面沒有任何膜的構造,但也可設置由介電質所成的反射防止膜。In addition, although the stepped portion 330, the region (removed portion) 320, and the window layer and support substrate 306 are flat surfaces having no unevenness, they may be uneven surfaces. Regarding the surface with unevenness, it may be a simple rough surface by wet etching, a carved rough surface with a cut surface, or a patterned rough surface patterned by photolithography with a pitch of tens of μm to hundreds of nm. Or a photonic rough surface having a trench shape with a pitch of several to several hundred nm. Moreover, although the structure which does not have any film on the surface of a window layer and support substrate 306 is shown as an example, you may provide the antireflection film made of a dielectric substance.

然後,如圖3的(d)所示般,於半導體基板A03的第二面03B面,沿著劈裂預備線381,進行賦予刻劃痕382的刻劃處理。刻劃處理可使用例如四點式的鑽石刀頭,以50g的負載進行。刻劃條件並不限定於前述條件,使用多數點式或少數點式的刀頭亦可,負載也不限定於此數值。Then, as shown in FIG. 3 (d), a scribe process is performed on the second surface 03B of the semiconductor substrate A03 along the cleavage preparation line 381 to give a scribe mark 382. The scoring process can be performed with a load of 50 g using, for example, a four-point diamond blade. The scoring conditions are not limited to the aforementioned conditions, and it is also possible to use a majority point type or a few point type cutter head, and the load is not limited to this value.

此外,並不限定於鑽石刀頭,藉由雷射剝蝕法進行刻劃亦可。採用雷射剝蝕法的場合,可使用例如波長355nm、輸出0.5W的雷射進行刻劃處理。In addition, it is not limited to a diamond blade, and scoring may be performed by a laser ablation method. When the laser ablation method is used, a scribe process can be performed using, for example, a laser having a wavelength of 355 nm and outputting 0.5 W.

刻劃處理後,將保護薄膜放上第二面03B表面,從與保護薄膜面為相反側的面(第一面03A)將刀刃抵住而實施劈裂處理,予以晶粒化而分離發光元件,藉此製造發光元件。 [先前技術文獻] [專利文獻]After the scoring process, the protective film is placed on the surface of the second surface 03B, and the blade is pressed against the surface opposite to the protective film surface (the first surface 03A) to perform a splitting process, and the light-emitting element is crystallized to separate the light-emitting element. , Thereby manufacturing a light emitting element. [Prior Art Literature] [Patent Literature]

[專利文獻1]日本特開2015-005551號公報[Patent Document 1] Japanese Patent Laid-Open No. 2015-005551

[發明所欲解決之問題] 然而,在以GaP等的晶格不匹配系的材料形成窗層兼支承基板的半導體基板中,藉由刻劃及劈裂進行晶粒化的場合,由於GaP等的窗層兼支承基板原本就具有高密度的結晶缺陷(差排),以刻劃程度的物理力量,難以將缺陷線延伸,結果經常產生劈裂不良的晶粒。[Problems to be Solved by the Invention] However, in a semiconductor substrate in which a window layer and a supporting substrate are formed of a material with a lattice mismatch system such as GaP, graining is performed by scribing and splitting. The window layer and supporting substrate originally have high-density crystal defects (differential rows), and it is difficult to extend the defect line with the degree of physical force of the scribe, and as a result, badly split crystal grains are often generated.

為了降低劈裂不良的發生頻率,雖然可以透過提升劈裂時施加的壓力來降低發生頻率,卻會成為未基於缺陷線的「破裂、破壞」處理,故無法提升良品率。In order to reduce the frequency of occurrence of cracking, although the frequency of occurrence can be reduced by increasing the pressure applied during the cracking, it will become a "cracking and destruction" process that is not based on the defect line, so the yield cannot be improved.

有鑑於上述問題點,本發明之目的係提供一種發光元件的製造方法,能減低藉由刻劃及劈裂,將發光元件自具有晶格不匹配系的GaP等的窗層兼支承基板的半導體基板予以分離之際的劈裂不良率。 [解決問題之技術手段]In view of the above-mentioned problems, an object of the present invention is to provide a method for manufacturing a light-emitting element, which can reduce the semiconductor layer that supports the light-emitting element from a window layer such as GaP having a lattice mismatch system and a substrate by scribing and cleaving. Defective cleavage when the substrate is separated. [Technical means to solve problems]

為解決上述問題,本發明提供一種發光元件的製造方法,包含下列步驟,在基板上,以與該基板係為晶格匹配系的材料且藉由磊晶成長而至少依序成長第一半導體層、活性層及第二半導體層,而形成發光層部;以與該發光層部係為晶格不匹配系的材料而將窗層兼支承基板予以磊晶成長在該發光層部上而形成該窗層兼支承基板;除去該基板;在該第一半導體層表面形成第一歐姆電極;至少除去該第一半導體層與該活性層而形成除去部;在該除去部的該第二半導體層或在該窗層兼支承基板上形成第二歐姆電極;藉此製造一半導體基板,該半導體基板係在該窗層兼支承基板上至少具有該除去部以外的發光層部、該第一歐姆電極及該第二歐姆電極,之後,自該半導體基板,透過刻劃及劈裂而分離發光元件,藉此製造發光元件; 其中,該發光元件的分離,係藉由在與該半導體基板的該發光層部形成面側為相反側的表面,形成該窗層兼支承基板中殘留厚度為70μm以下的溝槽,之後自該半導體基板的該發光層部形成面側而沿著該溝槽對該半導體基板的表面給予刻劃痕,對該溝槽的全長或一部分施加與該半導體基板垂直的力量,而分離該發光元件。In order to solve the above-mentioned problem, the present invention provides a method for manufacturing a light-emitting element, including the following steps. On a substrate, a first semiconductor layer is grown at least in order by epitaxial growth on a substrate that is a lattice matching material with the substrate system. , An active layer, and a second semiconductor layer to form a light-emitting layer portion; the window layer and the supporting substrate are epitaxially grown on the light-emitting layer portion by using a material that does not match the light-emitting layer system as a lattice mismatch. The window layer and the support substrate are removed; the substrate is removed; a first ohmic electrode is formed on the surface of the first semiconductor layer; at least the first semiconductor layer and the active layer are removed to form a removed portion; the second semiconductor layer in the removed portion or Forming a second ohmic electrode on the window layer and supporting substrate; thereby manufacturing a semiconductor substrate having at least a light emitting layer portion other than the removed portion, the first ohmic electrode, and The second ohmic electrode is then separated from the semiconductor substrate by scribing and cleaving to separate the light emitting element, thereby manufacturing the light emitting element; wherein the separation of the light emitting element is A groove having a thickness of 70 μm or less is left in the window layer and the supporting substrate by forming a surface opposite to the light-emitting layer portion forming surface side of the semiconductor substrate, and then forming a surface from the light-emitting layer portion of the semiconductor substrate. A scratch is made on the surface of the semiconductor substrate along the trench, and a force perpendicular to the semiconductor substrate is applied to the entire length or part of the trench to separate the light emitting element.

若為如此的發光元件的製造方法,藉由在與半導體基板的該發光層部形成面側為相反側的表面,形成窗層兼支承基板中殘留厚度為70μm以下的溝槽,即使以與該發光層部為晶格不匹配系的材料而磊晶成長出窗層兼支承基板的場合,也能夠降低刻劃及劈裂步驟中的不良率。In the method of manufacturing such a light-emitting device, a groove having a thickness of 70 μm or less in the window layer and supporting substrate is formed on the surface opposite to the light-emitting layer portion forming surface side of the semiconductor substrate. When the light-emitting layer portion is made of a material of a lattice mismatch system, and the window layer and the supporting substrate are epitaxially grown, the defect rate in the scribe and cleaving steps can also be reduced.

此外,此場合,該溝槽係以濕式蝕刻或乾式蝕刻形成為佳。In this case, the trench is preferably formed by wet etching or dry etching.

按照這些方法,便能夠確實地形成所期望的深度的溝槽。 [對照先前技術之功效]According to these methods, a trench having a desired depth can be reliably formed. [Contrast with the effect of the prior art]

若依本發明之發光元件的製造方法,藉由刻劃及劈裂,將發光元件自具有晶格不匹配系的GaP等的窗層兼支承基板的半導體基板予以分離之際,能夠減低劈裂不良率,而能夠生產率佳地製造高品質的發光元件。According to the manufacturing method of the light-emitting element of the present invention, when the light-emitting element is separated from a semiconductor substrate having a window layer such as GaP having a lattice mismatch system and a supporting substrate by scoring and cleaving, the cleaving can be reduced. Defective rate, and high-quality light-emitting elements can be manufactured with high productivity.

如上述般,在以GaP等的晶格不匹配系的材料形成窗層兼支承基板的半導體基板中,藉由刻劃及劈裂進行晶粒化的場合,由於GaP等的窗層兼支承基板原本就具有高密度的結晶缺陷(差排),會有以刻劃程度的物理力量難以將缺陷線延伸,結果經常產生劈裂不良的晶粒的問題。As described above, in a semiconductor substrate in which a window layer and a supporting substrate are formed of a lattice-mismatching material such as GaP, when scoring and splitting are used to crystallize, a window layer and a supporting substrate such as GaP Originally, it has high-density crystal defects (differential rows), and it is difficult to extend the defect line by the physical force of the scoring degree. As a result, the problem of poorly split crystal grains often occurs.

此時,本發明者為了解決這樣的問題而積極多次討論。結果找出在與半導體基板的該發光層部形成面側為相反側的表面,形成該窗層兼支承基板中殘留厚度為70μm以下的溝槽,之後進行藉由刻劃及劈裂的晶粒化,便能夠降低晶粒化造成的不良率,進而完成本發明。At this time, the present inventors have actively discussed many times in order to solve such problems. As a result, a surface opposite to the light-emitting layer portion forming surface side of the semiconductor substrate was found, and a groove having a thickness of 70 μm or less remained in the window layer and the supporting substrate, and then grains were scribed and split. As a result, the defect rate caused by grain formation can be reduced, thereby completing the present invention.

換言之,本發明提供一種發光元件的製造方法,包含下列步驟,在基板上,以與該基板係為晶格匹配系的材料且藉由磊晶成長而至少依序成長第一半導體層、活性層及第二半導體層,而形成發光層部;以與該發光層部係為晶格不匹配系的材料而將窗層兼支承基板予以磊晶成長在該發光層部上而形成該窗層兼支承基板;除去該基板;在該第一半導體層表面形成第一歐姆電極;至少除去該第一半導體層與該活性層而形成除去部;在該除去部的該第二半導體層或在該窗層兼支承基板上形成第二歐姆電極;藉此製造一半導體基板,該半導體基板係在該窗層兼支承基板上至少具有該除去部以外的發光層部、該第一歐姆電極及該第二歐姆電極,之後,自該半導體基板,透過刻劃及劈裂而分離發光元件,藉此製造發光元件;其中,該發光元件的分離,係藉由在與該半導體基板的該發光層部形成面側為相反側的表面,形成該窗層兼支承基板中殘留厚度為70μm以下的溝槽,之後自該半導體基板的該發光層部形成面側而沿著該溝槽對該半導體基板的表面給予刻劃痕,對該溝槽的全長或一部分施加與該半導體基板垂直的力量,而分離該發光元件。In other words, the present invention provides a method for manufacturing a light-emitting element, which includes the following steps. On the substrate, at least one of a first semiconductor layer and an active layer is sequentially grown by epitaxial growth with a material that is a lattice matching system with the substrate system. And the second semiconductor layer to form a light-emitting layer portion; the window layer and the supporting substrate are epitaxially grown on the light-emitting layer portion by using a material that is lattice-incompatible with the light-emitting layer portion to form the window layer and A support substrate; removing the substrate; forming a first ohmic electrode on the surface of the first semiconductor layer; removing at least the first semiconductor layer and the active layer to form a removing portion; the second semiconductor layer in the removing portion or the window Forming a second ohmic electrode on the layer and supporting substrate; thereby manufacturing a semiconductor substrate having at least a light emitting layer portion other than the removed portion, the first ohmic electrode, and the second on the window layer and supporting substrate; The ohmic electrode is then used to separate the light-emitting element from the semiconductor substrate by scribing and cleaving, thereby manufacturing the light-emitting element; wherein the light-emitting element is separated by The light emitting layer portion forming surface side of the semiconductor substrate is a surface on the opposite side, and a groove having a thickness of 70 μm or less in the window layer and supporting substrate is formed, and then the light emitting layer portion forming surface side of the semiconductor substrate follows the light emitting layer portion forming surface side. The groove is scribed on the surface of the semiconductor substrate, and a force perpendicular to the semiconductor substrate is applied to the entire length or a part of the groove to separate the light emitting element.

以下針對本發明的第一實施方式及第二實施方式,參考圖式並更詳細說明,然而本發明並不限於此。另外,第一實施方式與第二實施方式僅溝槽的形成方法不同,除此之外的步驟基本上能以相同方法進行。首先,針對第一實施方式及第二實施方式的前半的共通步驟,用圖1的(a)~(c)、圖2的(a)~(c)予以說明。Hereinafter, the first embodiment and the second embodiment of the present invention will be described in more detail with reference to the drawings, but the present invention is not limited thereto. It should be noted that the first embodiment differs from the second embodiment only in the method of forming the trenches, and the other steps can basically be performed in the same manner. First, common steps in the first half of the first embodiment and the second embodiment will be described with reference to (a) to (c) in FIG. 1 and (a) to (c) in FIG. 2.

一開始,如圖1的(a)及圖2的(a)所示,製作AlGaInP系磊晶晶圓的場合,準備例如朝[001]方向傾斜15度的GaAs等的起始基板100及200。Initially, as shown in FIGS. 1 (a) and 2 (a), when producing an AlGaInP-based epitaxial wafer, initial substrates 100 and 200 such as GaAs, which are inclined 15 degrees in the [001] direction, are prepared. .

然後在基板100、200上,以與基板100、200為晶格匹配系的材料,藉由磊晶成長而至少依序成長第一半導體層101、201;活性層102、202以及第二半導體層103、203,而形成發光層部107、207。Then, on the substrates 100 and 200, at least one of the first semiconductor layers 101, 201, the active layers 102, 202, and the second semiconductor layer are sequentially grown by epitaxial growth using a material that is a lattice matching system with the substrates 100 and 200. 103 and 203 to form light emitting layer portions 107 and 207.

具體而言,作為基板100、200而使用GaAs基板的場合,於GaAs基板上,以有機金屬氣相沉積(MOVPE)法,將(Alx Ga1- xy In1 y P(0≦x≦1, 0.4≦y≦0.6)所成的N包覆層(第一半導體層)101、201;(Alx Ga1- xy In1 y P(0≦x≦1, 0.4≦y≦0.6)所成的活性層102、202;(Alx Ga1- xy In1 y P(0≦x≦1, 0.4≦y≦0.6)所成的P包覆層(第二半導體層)103、203依序磊晶成長而形成發光層部107、207。然後可將Gay In1 y P(0.0≦y≦1.0)所成的中間組成層104、204及具有0.5μm以上厚度的GaP窗層105、205依序堆疊。Specifically, when a GaAs substrate is used as the substrates 100 and 200, the (Al x Ga 1- x ) y In 1 - y P (0 ≦) is formed on the GaAs substrate by an organic metal vapor deposition (MOVPE) method. x cladding layer (first semiconductor layer) 101, 201 formed by x ≦ 1, 0.4 ≦ y ≦ 0.6; (Al x Ga 1- x ) y In 1 - y P (0 ≦ x ≦ 1, 0.4 ≦ y ≦ 0.6) active coating layer 102, 202; (Al x Ga 1- x ) y In 1 - y P (0 ≦ x ≦ 1, 0.4 ≦ y ≦ 0.6) P coating layer (second (Semiconductor layer) 103 and 203 are sequentially epitaxially grown to form light emitting layer portions 107 and 207. Then Ga y In 1 may be - y P (0.0 ≦ y ≦ 1.0) formed by the intermediate layer composition and the GaP window layer 104, 204 having a thickness of more than 0.5μm 105 and 205 are sequentially stacked.

這些製作方法並不限定於MOVPE法,以分子束磊晶(MBE)法或化學束磊晶(CBE)法製作亦可。These manufacturing methods are not limited to the MOVPE method, and may be manufactured by a molecular beam epitaxial (MBE) method or a chemical beam epitaxial (CBE) method.

然後,以與發光層部107、207為晶格不匹配系的材料,將窗層兼支承基板106、206磊晶成長於發光層部上。具體而言,利用相接於GaP窗層105、205而磊晶成長出與發光層部107、207為晶格不匹配系的GaAsz P1-z (0.0≦z≦0.1)窗層兼支承基板106、206,便能將窗層兼支承基板106、206形成於發光層部107、207上。雖然窗層兼支承基板106、206也可藉由MOVPE法或MBE法形成,但亦能適宜地使用便宜且成長速度快的氫化物氣相沉積(HVPE)法。厚度可為20~200μm,例如100μm左右。Then, the window layer and support substrates 106 and 206 are epitaxially grown on the light emitting layer portion by using a material that does not match the lattice of the light emitting layer portions 107 and 207. Specifically, a GaAs z P 1-z (0.0 ≦ z ≦ 0.1) window layer is also supported by epitaxial growth of a GaAs z P 1-z (0.0 ≦ z ≦ 0.1) that is in lattice mismatch with the light emitting layer portions 107 and 207 by contacting the GaP window layers 105 and 205. The substrates 106 and 206 can form the window layer and the supporting substrates 106 and 206 on the light emitting layer portions 107 and 207. Although the window layer and support substrates 106 and 206 can also be formed by the MOVPE method or the MBE method, a cheap and fast-growing hydride vapor deposition (HVPE) method can also be suitably used. The thickness may be 20 to 200 μm, for example, about 100 μm.

窗層兼支承基板106、206形成後,如圖1的(b)及圖2的(b)所示,進行除去基板100、200的步驟。例如藉由化學性蝕刻除去AlGaInP系磊晶晶圓的GaAs基板100、200,形成晶圓011、012。化學性蝕刻液係以與AlGaInP系材料有蝕刻選擇性者為佳,一般會以含有氨的蝕刻劑進行除去。After the window layer and support substrates 106 and 206 are formed, as shown in FIG. 1 (b) and FIG. 2 (b), a step of removing the substrates 100 and 200 is performed. For example, the GaAs substrates 100 and 200 of the AlGaInP-based epitaxial wafer are removed by chemical etching to form wafers 011 and 012. The chemical etching solution is preferably one having an etching selectivity with an AlGaInP-based material, and is generally removed with an etchant containing ammonia.

然後,如圖1的(c)及圖2的(c)所示,除去基板100、200後,在晶圓011、021的下部包覆層(第一半導體層)101、201上,形成第一歐姆電極151、251,然後,至少除去第一半導體層101、201及活性層102、202而形成除去部120、220,在除去部120、220的第二半導體層103、203或在窗層兼支承基板106、206上形成第二歐姆電極161、261。Then, as shown in (c) of FIG. 1 and (c) of FIG. 2, after removing the substrates 100 and 200, the first cladding layers (first semiconductor layers) 101 and 201 of the wafers 011 and 021 are formed to form first layers. An ohmic electrode 151, 251, and then at least the first semiconductor layers 101, 201 and the active layers 102, 202 are removed to form a removal portion 120, 220, the second semiconductor layer 103, 203 in the removal portion 120, 220, or a window layer Second ohmic electrodes 161 and 261 are formed on the supporting substrates 106 and 206.

然後,非除去部(除去部120、220以外的區域)110、210之中,可於不具有第一歐姆電極151、251的區域111、211的至少一部分設置介電質部140、240。Then, among the non-removed portions (regions other than the removed portions 120 and 220) 110 and 210, the dielectric portions 140 and 240 may be provided in at least a part of the regions 111 and 211 having no first ohmic electrodes 151 and 251.

此外,也可於非除去部110、210與除去部120、220之間的段差部130、230的至少一部分設置介電質部141、241。In addition, dielectric portions 141 and 241 may be provided in at least a part of the step portions 130 and 230 between the non-removed portions 110 and 210 and the removed portions 120 and 220.

接著除去部120、220之中,可於第二歐姆電極161、261以外的區域121、221的至少一部分設置介電質部142、242。如以上般所製造的半導體基板A01、A02,至少在窗層兼支承基板106、206上具有該除去部120、220以外的發光層部107、207;該第一歐姆電級151、251及該第二歐姆電極161、261。Next, among the removing portions 120 and 220, dielectric portions 142 and 242 may be provided in at least a part of the regions 121 and 221 other than the second ohmic electrodes 161 and 261. The semiconductor substrates A01 and A02 manufactured as described above have the light-emitting layer portions 107 and 207 other than the removed portions 120 and 220 at least on the window layer and support substrates 106 and 206; the first ohmic level 151 and 251 and the Second ohmic electrodes 161, 261.

雖然本實施方式中,舉例表示了具有全部介電質部140、240;141、241;142、242的場合,但不必具有全部,僅具有一部分的場合也能夠得到同樣的效果。此外,本實施方式中,雖然舉例表示了於第一半導體層101、201的區域111、211只有介電質部140、240的構造,但亦可於介電質部140、240與第一半導體層101、201的區域111、211之間設置光反射膜或光反射部,或者也可於介電質部140、240沒有相接於第一半導體層101、201的區域111、211的面側設置光反射膜或光反射部。Although this embodiment has exemplified the case where all the dielectric portions 140, 240; 141, 241; 142, 242 are provided, the same effect can be obtained even if all of the dielectric portions 140, 240; 141, 241; 142, 242 are required. In addition, in this embodiment, although the structures 111 and 211 of the first semiconductor layers 101 and 201 have only the dielectric portions 140 and 240, the dielectric portions 140 and 240 and the first semiconductor may be used. A light reflecting film or a light reflecting portion is provided between the regions 111 and 211 of the layers 101 and 201, or the dielectric portions 140 and 240 may not be in contact with the surface side of the regions 111 and 211 of the first semiconductor layers 101 and 201 A light reflecting film or a light reflecting portion is provided.

此外,本實施方式中,雖然舉例表示了於區域111、211具有平坦的面的場合,但也可以為具有凹凸的面。關於具有凹凸的面,可為藉由濕式蝕刻的單純粗糙面、具有刻琢面的刻琢粗糙面、具有數十μm~數百nm間距的藉由光刻予以圖案化的圖案化粗糙面或是具有數~數百nm的間距的溝槽形狀的光子粗糙面。In addition, in this embodiment, although the case where the regions 111 and 211 have a flat surface is shown as an example, it may be a surface having unevenness. Regarding the surface with unevenness, it may be a simple rough surface by wet etching, a carved rough surface with a cut surface, or a patterned rough surface patterned by photolithography with a pitch of tens of μm to hundreds of nm. Or a photonic rough surface with a trench shape having a pitch of several to several hundred nm.

此外,本實施方式中,雖然舉例表示了段差部130、230;除去部120、220以及窗層兼支承基板106、206沒有凹凸的平坦的面,但也可以為具有凹凸的面。關於具有凹凸的面,可為藉由濕式蝕刻的單純粗糙面、具有刻琢面的刻琢粗糙面、具有數十μm~數百nm間距的藉由光刻予以圖案化的圖案化粗糙面或是具有數~數百nm的間距的溝槽形狀的光子粗糙面的任何一種。In this embodiment, the stepped portions 130 and 230; the removed portions 120 and 220 and the window layer and support substrates 106 and 206 are flat surfaces having no unevenness, but they may be uneven surfaces. Regarding the surface with unevenness, it may be a simple rough surface by wet etching, a carved rough surface with a cut surface, or a patterned rough surface patterned by photolithography with a pitch of tens of μm to hundreds of nm. Or a photonic rough surface having a trench shape with a pitch of several to several hundred nm.

此外,雖然舉例表示了窗層兼支承基板106、206的表面沒有任何膜的構造,但也可設置由介電質所成的反射防止膜。In addition, although the structure in which the surfaces of the window layer and support substrates 106 and 206 are not provided with any film is exemplified, an anti-reflection film made of a dielectric may be provided.

至此為止第一實施方式與第二實施方式為完全相同的步驟。之後則如圖1的(d)、(e)及圖2的(d)、(e)般,藉由在與半導體基板A01、A02的該發光層部形成面側為相反側的表面(即具有窗層兼支承基板106、206的第一面)01A、02A,形成窗層兼支承基板106、206中殘留厚度為70μm以下的溝槽180、280,自半導體基板A01、A02的發光層部形成面(01B、02B)側而沿著溝槽對半導體基板的表面給予刻劃痕182、282,對溝槽180、280的全長或一部分施加與半導體基板垂直的力量,而進行分離發光元件的步驟。溝槽的形成方法有濕式蝕刻的場合(第一實施方式)、乾式蝕刻的場合(第二實施方式),分別於以下詳述。So far, the first embodiment and the second embodiment have exactly the same steps. After that, as shown in (d) and (e) of FIG. 1 and (d) and (e) of FIG. 2, the surface opposite to the light emitting layer portion forming surface of the semiconductor substrates A01 and A02 is opposite to the surface (ie, The first surfaces of the window layer and support substrates 106 and 206) 01A and 02A form grooves 180 and 280 having a thickness of 70 μm or less in the window layer and support substrates 106 and 206, and the light emitting layer portions from the semiconductor substrates A01 and A02. The surface (01B, 02B) side is formed with scratches 182, 282 along the grooves on the surface of the semiconductor substrate, and a force perpendicular to the semiconductor substrate is applied to the entire length or part of the grooves 180, 280 to separate the light-emitting elements. step. The trench formation method includes a case of wet etching (first embodiment) and a case of dry etching (second embodiment), which will be described in detail below.

首先,關於第一實施方式,用圖1的(d)、(e)來說明。如圖1的(d)所示,在與半導體基板A01的該發光層部形成面側為相反側的表面(即具有窗層兼支承基板106的第一面)01A上,形成1μm的SiO2 膜,藉由光刻,將預先給予的劈裂預備線181的區域為已開口的SiO2 圖案170予以設置。開口部171的寬度越大蝕刻越容易,可為例如25μm。開口部171的寬度並非限定於25μm,只要相對於蝕刻深度,具有1/20以上的寬度即可。First, the first embodiment will be described with reference to (d) and (e) of FIG. 1. As shown in FIG. 1 (d), 1 μm SiO 2 is formed on a surface (ie, the first surface having a window layer and supporting substrate 106) 01A opposite to the light-emitting layer portion formation surface side of the semiconductor substrate A01. In the film, the area of the cleavage preparation line 181 provided in advance is an opened SiO 2 pattern 170 by photolithography. The larger the width of the opening 171 is, the easier the etching is, and it may be, for example, 25 μm. The width of the opening portion 171 is not limited to 25 μm, and may be a width of 1/20 or more with respect to the etching depth.

然後在與具有SiO2 圖案170的半導體基板A01的第一面01A為相反側的發光層部形成面側的表面(第二面)01B塗抹電子蠟,投入以1:3的比例混和鹽酸與硝酸的蝕刻溶液中,蝕刻開口部171。藉由5分鐘左右的浸漬可進行1μm左右的蝕刻。接著將蝕刻溶液保溫的同時,透過時間管理進行控制,以成為所期望的溝槽深度。此時,溝槽180以窗層兼支承基板106中殘留厚度成為70μm以下的方式形成。Then, apply the electronic wax to the surface (second surface) 01B on the opposite side of the light emitting layer portion forming surface 01A of the semiconductor substrate A01 having the SiO 2 pattern 170, and mix hydrochloric acid and nitric acid in a ratio of 1: 3. In the etching solution, the opening 171 is etched. Etching of about 1 μm can be performed by immersion for about 5 minutes. Then, while the etching solution is kept warm, it is controlled through time management to achieve a desired trench depth. At this time, the trench 180 is formed so that the residual thickness in the window layer and support substrate 106 becomes 70 μm or less.

然後,如圖1的(e)所示般,設置了所期望的溝槽深度的半導體基板A01的第二面01B面中,沿著溝槽180(即沿著劈裂預備線181)進行給予刻劃痕182的刻劃處理。刻劃處理可使用例如4點式的鑽石刀頭,以50g的負載進行。刻劃條件並不限定於前述條件,使用多數點式或少數點式的刀頭亦可,負載也不限定於此數值。Then, as shown in FIG. 1 (e), the second surface 01B of the semiconductor substrate A01 provided with a desired trench depth is provided along the trench 180 (that is, along the cleavage preparation line 181). The scoring process of scoring 182. The scoring process can be performed with a load of 50 g using a 4-point diamond blade, for example. The scoring conditions are not limited to the aforementioned conditions, and it is also possible to use a majority point type or a few point type cutter head, and the load is not limited to this value.

此外,並不限定於鑽石刀頭,藉由雷射剝蝕法進行刻劃亦可。採用雷射剝蝕法的場合,可使用例如波長355nm、輸出功率0.5W的雷射進行刻劃處理。In addition, it is not limited to a diamond blade, and scoring may be performed by a laser ablation method. When the laser ablation method is used, for example, a laser with a wavelength of 355 nm and an output power of 0.5 W can be used for the scoring process.

刻劃處理後,對溝槽180的全長或一部分施加與半導體基板A01垂直的力量,而分離發光元件。此時,可將保護薄膜放上第二面01B表面,從與保護薄膜面為相反側的面將刀刃抵住而實施劈裂處理,藉此晶粒化。After the scribe process, a force perpendicular to the semiconductor substrate A01 is applied to the entire length or a part of the trench 180 to separate the light emitting element. At this time, the protective film can be placed on the surface of the second surface 01B, and the blade can be abutted from a surface opposite to the protective film surface to perform a cleaving treatment, thereby crystallizing.

然後關於第二實施方式,使用圖2的(d)、(e)來說明。在與半導體基板A02的發光層部形成面側為相反側的表面(即半導體基板A02的具有窗層兼支承基板206的第一面)02A上,形成1μm的SiO2 膜,藉由光刻,將預先給予的劈裂預備線281的區域為已開口的光阻圖案290予以設置。開口部271的寬度越大蝕刻越容易,可為例如25μm。開口部171的寬度並非限定於25μm,只要相對於蝕刻深度,具有1/20以上的寬度即可。Next, the second embodiment will be described using (d) and (e) of FIG. 2. A 1 μm SiO 2 film is formed on a surface opposite to the light-emitting layer portion formation surface side of the semiconductor substrate A02 (that is, the first surface of the semiconductor substrate A02 having a window layer and supporting substrate 206) 02A, and by photolithography, A region of the cleavage preparation line 281 provided in advance is an opened photoresist pattern 290. The larger the width of the opening 271 is, the easier the etching is, and it may be, for example, 25 μm. The width of the opening portion 171 is not limited to 25 μm, and it may be a width of 1/20 or more with respect to the etching depth.

將具有光阻圖案290的晶圓A02投入氫氟酸液,得到與光阻圖案290略相同的SiO2 圖案270。SiO2 圖案270形成後,以有機洗淨、灰化的方法除去光阻圖案290。The wafer A02 having the photoresist pattern 290 is put into a hydrofluoric acid solution to obtain a SiO 2 pattern 270 which is slightly the same as the photoresist pattern 290. After the SiO 2 pattern 270 is formed, the photoresist pattern 290 is removed by organic washing and ashing.

在具有SiO2 圖案270的晶圓A02的第一面02A,進行含有例如氯氣電漿的處理,將開口部271蝕刻。可使用Cl2 作為氯氣電漿源,可使用ICP作為電漿施加方式。電漿施加的輸出功率可為例如150W。接著透過時間管理進行控制,以成為所期望的溝槽深度。此時,溝槽280以窗層兼支承基板206中殘留厚度成為70μm以下的方式形成。The first surface 02A of the wafer A02 having the SiO 2 pattern 270 is subjected to a treatment including, for example, a plasma of chlorine gas, and the opening 271 is etched. Cl 2 can be used as the plasma source of chlorine gas, and ICP can be used as the plasma application method. The output power applied by the plasma may be, for example, 150W. It is then controlled through time management to achieve the desired trench depth. At this time, the trench 280 is formed so that the residual thickness in the window layer and support substrate 206 becomes 70 μm or less.

上述所示條件僅為舉例示範,並非限定於上述條件。可選擇SiCl4 或BCl3 作為氯氣電漿產生源及氣體,也可選擇RIE作為電漿施加方式。輸出功率只要有50W以上,就能進行蝕刻。The conditions shown above are just examples and are not limited to the above conditions. SiCl 4 or BCl 3 can be selected as the source and gas for the plasma generation of chlorine gas, and RIE can also be selected as the plasma application method. As long as the output power is 50W or more, etching can be performed.

在與設置了所期望的溝槽深度的半導體基板A02的第一面02A為相反側的第二面02B面,沿著溝槽280(即沿著劈裂預備線281)進行給予刻劃痕282的刻劃處理。刻劃處理可使用4點式的鑽石刀頭,以50g的負載進行。刻劃條件並不限定於前述條件,使用多數點式或少數點式的刀頭亦可,負載也不限定於此數值。On the second surface 02B surface of the semiconductor substrate A02 on which the desired trench depth is provided, the second surface 02B is opposite to the first surface 02A, and a score 282 is provided along the trench 280 (that is, along the cleavage preparation line 281). Scratch processing. Scribing can be performed using a 4-point diamond blade with a load of 50g. The scoring conditions are not limited to the aforementioned conditions, and it is also possible to use a majority point type or a few point type cutter head, and the load is not limited to this value.

此外,並不限定於鑽石刀頭,藉由雷射剝蝕法進行刻劃亦可。採用雷射剝蝕法的場合,可使用例如波長355nm、輸出功率0.5W的雷射進行刻劃處理。In addition, it is not limited to a diamond blade, and scoring may be performed by a laser ablation method. When the laser ablation method is used, for example, a laser with a wavelength of 355 nm and an output power of 0.5 W can be used for the scoring process.

刻劃處理後,對溝槽280的全長或一部分施加與半導體基板A02垂直的力量,而分離發光元件。此時,可將保護薄膜放上第二面02B表面,從與保護薄膜面為相反側的面將刀刃抵住而實施劈裂處理,藉此晶粒化。After the scribe process, a force perpendicular to the semiconductor substrate A02 is applied to the entire length or a part of the trench 280 to separate the light emitting element. At this time, the protective film can be placed on the surface of the second surface 02B, and the blade can be abutted from a surface opposite to the protective film surface to perform a cleaving process, thereby crystallizing.

如上述般,在與半導體基板A01、A02的發光層部形成面側為相反側的表面01A、02A,形成窗層兼支承基板106、206中殘留厚度為70μm以下的溝槽180、280,自半導體基板的發光層部形成面側,沿著溝槽對半導體基板A01、A02的表面給予刻劃痕182、282,對溝槽180、280的全長或一部分施加與半導體基板垂直的力量,而分離發光元件,便能夠在藉由刻劃及劈裂,將發光元件自具有晶格不匹配系的GaP等的窗層兼支承基板的半導體基板分離之際,減低劈裂不良率。As described above, the grooves 180 and 280 having a thickness of 70 μm or less in the window layer and supporting substrates 106 and 206 are formed on the surfaces 01A and 02A opposite to the light-emitting layer portion forming side of the semiconductor substrates A01 and A02. The light emitting layer portion of the semiconductor substrate is formed on the surface side, and the surface of the semiconductor substrates A01 and A02 is provided with scratches 182 and 282 along the grooves, and a force perpendicular to the semiconductor substrate is applied to the entire length or a part of the grooves 180 and 280 to separate them. The light-emitting element can reduce the defective rate of cleavage when the light-emitting element is separated from a semiconductor substrate having a window layer such as GaP having a lattice mismatch system and a supporting substrate by scoring and cleavage.

窗層兼支承基板中形成了殘留厚度超過70μm的溝槽的場合、未形成溝槽的場合以及於半導體基板的發光層部形成面側形成了溝槽的場合,劈裂不良率會變高。 [實施例]When grooves having a residual thickness of more than 70 μm are formed in the window layer and support substrate, when grooves are not formed, and when grooves are formed on the light-emitting layer portion formation surface side of the semiconductor substrate, the cracking failure rate becomes high. [Example]

以下表示本發明的實施例及比較例而對本發明更具體地說明,但本發明並不限定於這些。Examples and comparative examples of the present invention are shown below to describe the present invention more specifically, but the present invention is not limited to these.

(實施例1~5) 根據示於圖1般的本發明的發光元件的製造方法的第一實施方式,進行發光元件的製造。 首先,如圖1所示,準備GaAs(001)所成的基板作為起始基板100,以MOVPE法,於此基板上形成足以作為功能層的雙異質層(發光層部107)。發光層部107係依序堆疊下部包覆層(第一半導體層)101、活性層102、上部包覆層(第二半導體層)103者。(Examples 1 to 5) According to the first embodiment of the method for manufacturing a light-emitting element of the present invention shown in FIG. 1, a light-emitting element was manufactured. First, as shown in FIG. 1, a substrate made of GaAs (001) is prepared as a starting substrate 100, and a double hetero layer (light emitting layer portion 107) sufficient as a functional layer is formed on this substrate by the MOVPE method. The light emitting layer portion 107 is a stack of a lower cladding layer (first semiconductor layer) 101, an active layer 102, and an upper cladding layer (second semiconductor layer) 103 in this order.

第一半導體層101係選擇(Alx Ga1- xy In1 y P(0.6≦x≦1.0, 0.4≦y≦0.6)的組成,本實施例中,以n型AlInP包覆層為0.7μm(參雜濃度3.0×1017 /cm3 )、n型Al0.85 GaInP層為0.3μm(參雜濃度1.0×1017 /cm3 )的二層構造作為第一半導體層。The first semiconductor layer 101 has a composition of (Al x Ga 1- x ) y In 1 - y P (0.6 ≦ x ≦ 1.0, 0.4 ≦ y ≦ 0.6). In this embodiment, an n-type AlInP cladding layer is used as A two-layer structure of 0.7 μm (an impurity concentration of 3.0 × 10 17 / cm 3 ) and an n-type Al 0.85 GaInP layer of 0.3 μm (an impurity concentration of 1.0 × 10 17 / cm 3 ) was used as the first semiconductor layer.

活性層102選自(Alx Ga1- xy In1 y P(0.15≦x≦0.8, 0.4≦y≦0.6),依照波長而變更x及y的組成。本實施例中活性層係使用多重活性層。活性層及障壁層的膜厚依照所求波長而變更,於4~12nm的範圍內配合波長而各自調整。The active layer 102 is selected from (Al x Ga 1- x ) y In 1 - y P (0.15 ≦ x ≦ 0.8, 0.4 ≦ y ≦ 0.6), and the composition of x and y is changed according to the wavelength. In this embodiment, multiple active layers are used for the active layer. The film thicknesses of the active layer and the barrier layer are changed according to the required wavelength, and they are adjusted individually in accordance with the wavelength within a range of 4 to 12 nm.

以p型AlInP包覆層為0.9μm(參雜濃度3.0×1017 /cm3 )、p型Al0.6 GaInP層為0.1μm(參雜濃度1.0×1017 /cm3 )的二層構造作為第二半導體層103。A two-layer structure with a p-type AlInP cladding layer of 0.9 μm (parameter concentration 3.0 × 10 17 / cm 3 ) and a p-type Al 0.6 GaInP layer of 0.1 μm (parameter concentration 1.0 × 10 17 / cm 3 ) was used as the first layer. Two semiconductor layers 103.

在發光層部107上,形成GaInP所成的緩衝層(中間組成層104)的膜,此緩衝層上以MOVPE法及HVPE法,形成100μm左右的GaP所成的窗層兼支承基板106的膜。A film of a buffer layer (intermediate composition layer 104) made of GaInP is formed on the light emitting layer portion 107. A window layer made of GaP of about 100 μm and a film supporting the substrate 106 is formed on the buffer layer by MOVPE and HVPE methods. .

窗層兼支承基板106形成後,如圖1的(b)所示,藉由濕式蝕刻法除去基板100而作為自立基板,在除去基板100的面形成第一歐姆電極151。第一歐姆電極151為含有Si、Zn、S的Au電極所成,膜厚為1.5μm。After the window layer and support substrate 106 is formed, as shown in FIG. 1 (b), the substrate 100 is removed by a wet etching method as a free standing substrate, and a first ohmic electrode 151 is formed on a surface from which the substrate 100 is removed. The first ohmic electrode 151 is made of an Au electrode containing Si, Zn, and S, and has a film thickness of 1.5 μm.

然後,如圖1的(c)所示,藉由光刻法及蝕刻法切掉發光層部107的一部分,設置發光層區域110(非除去部)與露出窗層兼支承基板的區域(除去部)120。Then, as shown in FIG. 1 (c), a part of the light-emitting layer portion 107 is cut off by a photolithography method and an etching method, and a light-emitting layer region 110 (non-removed portion) and a region where the window layer and support substrate are exposed (removed) are provided. Department) 120.

接著,在除去部120的窗層兼支承基板106上形成第二歐姆電極161。第二歐姆電極161為含有Be的Au電極所成,膜厚為1.5μm。Next, a second ohmic electrode 161 is formed on the window layer and support substrate 106 of the removal portion 120. The second ohmic electrode 161 is made of an Au electrode containing Be, and has a film thickness of 1.5 μm.

接著,如圖1的(d)所示,在半導體基板A01的具有窗層兼支承基板106的第一面(01A)上,形成1μm的SiO2 膜。藉由光刻,將劈裂預備線181的區域為已開口的SiO2 圖案170予以設置。開口寬度為25μm。Next, as shown in FIG. 1D, a 1 μm SiO 2 film is formed on the first surface (01A) of the semiconductor substrate A01 having the window layer and the support substrate 106. The area of the cleavage preparation line 181 is set as the opened SiO 2 pattern 170 by photolithography. The opening width is 25 μm.

然後,在與具有SiO2 圖案170的半導體基板的第一面(01A)為相反側的第二面(01B)塗抹電子蠟,投入以1:3的比例混和鹽酸與硝酸的蝕刻溶液中,將開口部171蝕刻而形成溝槽180。如表1所示,藉由改變蝕刻時間,使溝槽180在窗層兼支承基板106中的殘留厚度(溝槽厚度)產生變化。此時,以窗層兼支承基板106中殘留厚度成為70μm以下的方式形成溝槽180。Then, an electronic wax is applied to the second surface (01B) opposite to the first surface (01A) of the semiconductor substrate having the SiO 2 pattern 170, and is put into an etching solution in which hydrochloric acid and nitric acid are mixed at a ratio of 1: 3. The opening 171 is etched to form a trench 180. As shown in Table 1, by changing the etching time, the residual thickness (trench thickness) of the trench 180 in the window layer and support substrate 106 is changed. At this time, the trench 180 is formed so that the remaining thickness in the window layer and support substrate 106 becomes 70 μm or less.

然後,如圖1的(e)所示,在設置了所期望的溝槽深度的半導體基板的第二面(01B)中,沿著劈裂預備線181進行刻劃處理。刻劃處理可使用4點式的鑽石刀頭,以50g的負載進行。Then, as shown in FIG. 1 (e), a scribe process is performed along the cleavage preparation line 181 on the second surface (01B) of the semiconductor substrate provided with a desired trench depth. Scribing can be performed using a 4-point diamond blade with a load of 50g.

刻劃處理後,將保護薄膜放上第二面01B表面,從與保護薄膜面為相反側的面將刀刃抵住而實施劈裂處理,且晶粒化。After the scoring process, the protective film was placed on the surface of the second surface 01B, and the blade was abutted from the surface opposite to the protective film surface to perform a cleavage process, and crystallized.

(比較例1~3) 除了改變蝕刻的時間,使溝槽的窗層兼支承基板中殘留厚度為表1所示厚度以外,以與實施例1同樣的方法進行發光元件的製造。(Comparative Examples 1 to 3) A light-emitting device was manufactured in the same manner as in Example 1 except that the etching time was changed so that the remaining thickness in the window layer and supporting substrate of the trench was as shown in Table 1.

(實施例6~10) 除了進行含氯氣電漿的處理而蝕刻開口部、以及使溝槽在窗層兼支承基板中殘留厚度為表1所示厚度以外,以與實施例1同樣的方法進行發光元件的製造。使用Cl2 作為氯氣電漿源、使用ICP作為電漿施加方式。電漿施加的輸出功率為150W。接著透過時間管理進行控制,以成為所期望的溝槽深度。此時,以窗層兼支承基板中殘留厚度成為70μm以下的方式形成溝槽。(Examples 6 to 10) The same method as in Example 1 was performed except that the openings were etched by the treatment with a chlorine-containing gas plasma and the remaining thickness of the trenches in the window layer and the support substrate was as shown in Table 1. Manufacturing of light-emitting elements. Cl 2 was used as the plasma source of chlorine gas, and ICP was used as the plasma application method. The output power applied by the plasma is 150W. It is then controlled through time management to achieve the desired trench depth. At this time, the trench was formed so that the residual thickness in the window layer and support substrate became 70 μm or less.

(比較例4~6) 除了使溝槽的窗層兼支承基板中殘留厚度為表1所示厚度以外,以與實施例6同樣的方法進行發光元件的製造。(Comparative Examples 4 to 6) A light-emitting element was produced in the same manner as in Example 6 except that the remaining thickness in the window layer and supporting substrate of the trench was as shown in Table 1.

(實施例11~15) 除了使窗層兼支承基板的厚度為120μm左右以及溝槽的窗層兼支承基板中殘留厚度為表1所示厚度以外,以與實施例1同樣的方法進行發光元件的製造。(Examples 11 to 15) A light-emitting device was performed in the same manner as in Example 1 except that the thickness of the window layer and supporting substrate was about 120 μm, and the remaining thickness of the grooved window layer and supporting substrate was as shown in Table 1. Manufacturing.

(比較例7~11) 除了使溝槽的窗層兼支承基板中殘留厚度為表1所示厚度以外,以與實施例11同樣的方法進行發光元件的製造。(Comparative Examples 7 to 11) A light-emitting device was manufactured in the same manner as in Example 11 except that the remaining thickness in the window layer and supporting substrate of the trench was as shown in Table 1.

(實施例16~20) 除了使窗層兼支承基板的厚度為120μm左右以及溝槽的窗層兼支承基板中殘留厚度為表1所示厚度以外,以與實施例6同樣的方法進行發光元件的製造。(Examples 16 to 20) A light-emitting device was performed in the same manner as in Example 6 except that the thickness of the window layer and supporting substrate was about 120 μm and the remaining thickness of the grooved window layer and supporting substrate was as shown in Table 1. Manufacturing.

(比較例12~16) 除了使溝槽的窗層兼支承基板中殘留厚度為表1所示厚度以外,以與實施例16同樣的方法進行發光元件的製造。(Comparative Examples 12 to 16) A light-emitting device was produced in the same manner as in Example 16 except that the remaining thickness in the window layer and supporting substrate of the trench was as shown in Table 1.

將有關實施例1~10及比較例1~6,溝槽的窗層兼支承基板中殘留厚度與刻劃及劈裂所造成的不良率(%)的關係的表示於表1及圖4。將有關實施例11~20及比較例7~16溝槽的窗層兼支承基板中殘留厚度與刻劃及劈裂所造成的不良率(%)的關係的表示於表1及圖5。Tables 1 and 4 show the relationship between the residual thickness in the window layer and supporting substrate of the trenches and the defective rate (%) caused by scoring and splitting in Examples 1 to 10 and Comparative Examples 1 to 6. Tables 1 and 5 show the relationship between the residual thickness in the window layer and support substrate of the trenches of Examples 11 to 20 and Comparative Examples 7 to 16 and the defective rate (%) caused by scoring and splitting.

【表1】 【Table 1】

由表1、圖4及圖5得知,形成有70μm以下的殘留厚度的溝槽的實施例中,能夠減低劈裂不良率。As can be seen from Table 1, FIG. 4 and FIG. 5, in the examples in which grooves having a residual thickness of 70 μm or less were formed, the cracking failure rate could be reduced.

另外,本發明並不限於上述的實施型態。上述實施型態為舉例說明,凡具有與本發明的申請專利範圍所記載之技術思想及實質上同樣構成而產生相同的功效者,不論為何物皆包含在本發明的技術範圍內。In addition, the present invention is not limited to the above-mentioned embodiments. The above-mentioned embodiment is an example, and anyone who has the same technical idea and substantially the same structure as those described in the patent application scope of the present invention to produce the same effect is included in the technical scope of the present invention.

011、021、031‧‧‧晶圓 011, 021, 031 ‧‧‧ wafer

01A、02A、03A‧‧‧與半導體基板的發光層部形成面側為相反側的表面(第一面) 01A, 02A, 03A‧‧‧ The surface opposite to the light-emitting layer portion forming surface side of the semiconductor substrate (the first surface)

01B、02B、03B‧‧‧半導體基板的發光層部形成面側的表面(第二面) 01B, 02B, 03B‧‧‧ The surface of the light emitting layer portion of the semiconductor substrate forming surface side (second surface)

100、200、300‧‧‧基板 100, 200, 300‧‧‧ substrates

1 01、201、301‧‧‧第一半導體層1 01, 201, 301‧‧‧First semiconductor layer

102、202、302‧‧‧活性層 102, 202, 302‧‧‧ Active layer

103、203、303‧‧‧第二半導體層 103, 203, 303‧‧‧Second semiconductor layer

104、204、304‧‧‧中間組成層 104, 204, 304‧‧‧ intermediate composition layer

105、205、305‧‧‧窗層 105, 205, 305‧‧‧ window layer

106、206、306‧‧‧窗層兼支承基板 106, 206, 306‧‧‧Window layer and supporting substrate

107、207、307‧‧‧發光層部 107, 207, 307‧‧‧‧Light-emitting layer department

110、210、310‧‧‧非除去部 110, 210, 310

111、211、311‧‧‧非除去部中,不具有第一歐姆電極的區域 111, 211, 311‧‧‧ in the non-removed portion, the region having no first ohmic electrode

120、220、320‧‧‧除去部 120, 220, 320‧‧‧

121、221、321‧‧‧除去部中,第二歐姆電極以外的區域 121, 221, 321‧‧‧ except the area outside the second ohmic electrode

130、230、330‧‧‧段差部 130, 230, 330‧‧‧ steps

140、141、142、240、241、242、340、341、342‧‧‧介電質部 140, 141, 142, 240, 241, 242, 340, 341, 342‧‧‧

151、251、351‧‧‧第一歐姆電極 151, 251, 351‧‧‧ first ohmic electrode

161、261、361‧‧‧第二歐姆電極161, 261, 361‧‧‧ second ohmic electrode

170、270‧‧‧SiO2圖案170, 270‧‧‧SiO 2 pattern

171、271‧‧‧開口部 171, 271‧‧‧ opening

180、280‧‧‧溝槽 180, 280‧‧‧ groove

181、281、381‧‧‧劈裂預備線 181, 281, 381‧‧‧ split preparation line

182、282、382‧‧‧刻劃痕 182, 282, 382‧‧‧ scratches

290‧‧‧光阻圖案 290‧‧‧Photoresist pattern

A01、A02、A03‧‧‧半導體基板 A01, A02, A03‧‧‧Semiconductor substrate

圖1係表示本發明之發光元件的製造方法的第一實施方式的示意圖。 圖2係表示本發明之發光元件的製造方法的第二實施方式的示意圖。 圖3係表示過去之發光元件的製造方法的示意圖。 圖4係表示有關實施例1~10以及比較例1~6在窗層兼支承基板的溝槽殘留厚度與經刻劃及劈裂的不良率(%)的關係的圖。 圖5係表示有關實施例11~20以及比較例7~16在窗層兼支承基板的溝槽殘留厚度與經刻劃及劈裂的不良率(%)的關係的圖。FIG. 1 is a schematic view showing a first embodiment of a method for manufacturing a light-emitting element according to the present invention. FIG. 2 is a schematic view showing a second embodiment of a method for manufacturing a light emitting device according to the present invention. FIG. 3 is a schematic view showing a method of manufacturing a conventional light emitting device. FIG. 4 is a graph showing the relationship between the residual thickness of the trench in the window layer and the support substrate and the defective rate (%) of scribe and split in Examples 1 to 10 and Comparative Examples 1 to 6. FIG. FIG. 5 is a graph showing the relationship between the residual thickness of the trench in the window layer and the supporting substrate and the defective rate (%) of scribe and split in Examples 11-20 and Comparative Examples 7-16.

Claims (2)

一種發光元件的製造方法,包含下列步驟: 在基板上,以與該基板係為晶格匹配系的材料且藉由磊晶成長而至少依序成長第一半導體層、活性層及第二半導體層,而形成發光層部; 以與該發光層部係為晶格不匹配系的材料而將窗層兼支承基板予以磊晶成長在該發光層部上而形成該窗層兼支承基板; 除去該基板; 在該第一半導體層表面形成第一歐姆電極; 至少除去該第一半導體層與該活性層而形成除去部; 在該除去部的該第二半導體層或在該窗層兼支承基板上形成第二歐姆電極; 藉此製造一半導體基板,該半導體基板係在該窗層兼支承基板上至少具有該除去部以外的發光層部、該第一歐姆電極及該第二歐姆電極,之後,自該半導體基板,透過刻劃及劈裂而分離發光元件,藉此製造發光元件, 其中,該發光元件的分離,係藉由在與該半導體基板的該發光層部形成面側為相反側的表面,形成該窗層兼支承基板中殘留厚度為70μm以下的一溝槽,之後自該半導體基板的該發光層部形成面側而沿著該溝槽對該半導體基板的表面給予刻劃痕,對該溝槽的全長或一部分施加與該半導體基板垂直的力量,而分離該發光元件。A method for manufacturing a light emitting element includes the following steps: On a substrate, at least one of a first semiconductor layer, an active layer, and a second semiconductor layer is sequentially grown by epitaxial growth with a material that is a lattice matching system with the substrate system. To form a light-emitting layer portion; epitaxially grow the window layer and supporting substrate on the light-emitting layer portion by using a material which is a lattice mismatch system with the light-emitting layer portion to form the window layer and supporting substrate; remove the A substrate; forming a first ohmic electrode on the surface of the first semiconductor layer; removing at least the first semiconductor layer and the active layer to form a removing portion; the second semiconductor layer in the removing portion or on the window layer and supporting substrate Forming a second ohmic electrode; thereby manufacturing a semiconductor substrate having at least a light-emitting layer portion other than the removed portion, the first ohmic electrode, and the second ohmic electrode on the window layer and supporting substrate, and thereafter, The light-emitting element is separated from the semiconductor substrate by scribing and cleaving to manufacture the light-emitting element. The light-emitting element is separated from the semiconductor substrate by The light emitting layer portion is formed on the opposite side of the surface, and a groove having a thickness of 70 μm or less in the window layer and the supporting substrate is formed, and then the groove is formed from the light emitting layer portion of the semiconductor substrate along the groove. A scratch is made on the surface of the semiconductor substrate, and a force perpendicular to the semiconductor substrate is applied to the entire length or a part of the trench to separate the light emitting element. 如請求項1所述之發光元件的製造方法,其中該溝槽係以濕式蝕刻或乾式蝕刻形成。The method for manufacturing a light emitting device according to claim 1, wherein the trench is formed by wet etching or dry etching.
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