TW201810654A - 半導體結構、hemt結構及其形成方法 - Google Patents

半導體結構、hemt結構及其形成方法 Download PDF

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TW201810654A
TW201810654A TW106109522A TW106109522A TW201810654A TW 201810654 A TW201810654 A TW 201810654A TW 106109522 A TW106109522 A TW 106109522A TW 106109522 A TW106109522 A TW 106109522A TW 201810654 A TW201810654 A TW 201810654A
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layer
active layer
diffusion
hemt
iii
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TWI765880B (zh
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張耀中
陳柏智
余俊磊
蔡俊琳
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台灣積體電路製造股份有限公司
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Abstract

本揭露提供一種半導體結構，包含一通道層；位在該通道層上方的一主動層，其中該主動層經配置以形成一二維電子氣體(two-dimensional electron gas，2DEG)，該二維電子氣體沿著該通道層與該主動層之間的一界面形成於該通道層中；形成於該主動層的一頂表面上方的一閘極電極，；以及位於該主動層的該頂表面上方的一源極/汲極電極；其中該主動層包含自該頂表面至該主動層的一底表面依序堆疊的一第一層與一第二層，相較於該第二層，該第一層具有較高的鋁(Al)原子濃度。本揭露亦提供HEMT結構以及相關方法。

Description

半導體結構、HEMT結構及其形成方法
本揭露係關於一種半導體結構、HEMT結構及其形成方法。
由於高電流密度、高崩潰電壓以及低OB阻抗，高電子移動性電晶體(High Electron Mobility Transistors，HEMT)適合用於電力應用。HEMT結構包含通道層與主動層。二維電子氣體(two-dimensional electron gas，2DEG)於通道層中產生，該通道層與主動層的界面相鄰。2DEG用於HEMT結構中作為電荷載體。HEMT結構的問題為電荷落入閘極的汲極側，其可造成已知為在高電壓操作之下的「電流崩塌(current collapse)」現象。因此，需要具有低開啟阻抗與低電流崩塌以及改良的界面捕捉密度(interface trap density)與線性汲極電流退化的裝置。本揭露的實施例至少回應這些需求。
本揭露的一些實施例提供一種半導體結構，該半導體結構包含一通道層；位在該通道層上方的一主動層，其中該主動層經配置以形成一二維電子氣體(two-dimensional electron gas，2DEG)，該二維電子氣體沿著該通道層與該主動層之間的一界面形成於該通道層中；形成於該主動層的一頂表面上方的一閘極電極，；以及位於該主動層的該頂表面上方的一源極/汲極電極；其中該主動層包含自該頂表面至該主動層的一底表面依序堆疊的一第一層與一第二層，相較於該第二層，該第一層具有較高的鋁(Al)原子濃度。
本揭露提供了數個不同的實施方法或實施例，可用於實現本發明的不同特徵。為簡化說明起見，本揭露也同時描述了特定零組件與佈置的範例。請注意提供這些特定範例的目的僅在於示範，而非予以任何限制。舉例而言，在以下說明第一特徵如何在第二特徵上或上方的敘述中，可能會包括某些實施例，其中第一特徵與第二特徵為直接接觸，而敘述中也可能包括其他不同實施例，其中第一特徵與第二特徵中間另有其他特徵，以致於第一特徵與第二特徵並不直接接觸。此外，本揭露中的各種範例可能使用重複的參考數字和/或文字註記，以使文件更加簡單化和明確，這些重複的參考數字與註記不代表不同的實施例與/或配置之間的關聯性。 另外，本揭露在使用與空間相關的敘述詞彙，如“在...之下”，“低”，“下”，“上方”，“之上”，“下”，“頂”，“底”和類似詞彙時，為便於敘述，其用法均在於描述圖示中一個元件或特徵與另一個（或多個）元件或特徵的相對關係。除了圖示中所顯示的角度方向外，這些空間相對詞彙也用來描述該裝置在使用中以及操作時的可能角度和方向。該裝置的角度方向可能不同（旋轉90度或其它方位），而在本揭露所使用的這些空間相關敘述可以同樣方式加以解釋。 儘管本揭露之廣範圍所主張的數值範圍與參數係約略植，在特定範例中所闡述的數值係盡可能精準。然而，任何數值本質上含有在個別測試量測中得到之標準偏差所必然造成的一些誤差。再者，在本文中，「約」通常係指在給定值或範圍的10%、5%、1%或0.5%內。或者，「約」係指在該技藝中具有通常技術者可接受之平均的標準偏差內。在操作/工作範例之外，除非特別指名，否則本文所揭露之所有的數值範圍、數量、值、與比例，例如材料的量、時間期間、溫度、操作條件、數量的比例、及其類似者應被理解為受到「約」字修飾。據此，除非有相反的指示，本揭露以及所附隨之申請專利範圍所闡述的數值參數係約略數，其可視需要而變化。至少，應根據所報導之有意義的位數數目並且使用通常的進位技術，解讀各個數值參數。本文中，範圍可表示為從一端點至另一端點，或是在兩個端點之間。除非特別聲明，否則本文揭露的所有範圍皆包含端點。 本揭露係關於III-V高電子移動性電晶體(HEMT)及其製造方法。雖然本揭露係以特定實施例描述，然而由申請專利範圍所定義之本發明的原理顯然可應用於本揭露所述之本發明的特定實施例之外。再者，在本揭露的說明中，為了不模糊本揭露之發明態樣，故忽略一些細節。所忽略的細節為該技藝中具有通常技術之人士的知識範圍之內。 矽基板上的III-V HEMT係作為電壓轉換器應用之功率切換電晶體。相較於矽功率電晶體，III-V HEMT因寬帶隙性質而有低開啟狀態阻抗與低切換損失之特徵。在本揭露中，「III-V族半導體(group III-V semiconductor)」係指包含至少一III族元素與至少一V族元素的化合物半導體，例如但不限於氮化鎵(GaN)、氮化鋁鎵(AlGaN)、砷化鎵(GaAs)、氮化銦鋁鎵(InAlGaN)、氮化銦鎵(InGaN)、以及類似物。在類似的方式中，「III-氮化物半導體」係指包含氮與至少一III族元素的化合物半導體，例如但不限於GaN、AlGaN、氮化銦(InN)、氮化鋁(AlN)、氮化銦鎵(InGaN)、氮化銦鋁鎵(InAlGaN)、以及類似物。 圖1至圖8(b)係根據本揭露的一些實施例說明不同階段所製造的III-V HEMT結構之剖面示意圖。圖1為根據本揭露的一實施例說明在初始製造階段之III-V HEMT的剖面示意圖。提供適合作為III-V HEMT之支撐基板的半導體基板302。半導體基板302包含複數層。在一些實施例中，半導體基板302包含大塊矽，複數個半導體層形成於該大塊矽上。半導體基板302包括適合作為製造III-V族半導體裝置的基板之任何材料。在一些實施例中，半導體基板302包含矽(Si)、碳化矽(SiC)、藍寶石、以及類似物。或者，在一些實施例中，半導體基板302包括可製造III-V族半導體裝置之材料的天然基板，以及例如可為天然的GaN或其他III-氮化物基板。再者，雖然半導體基板302顯示為實質單一基板，然而，在其他實施例中，半導體基板302係相當於絕緣體基板上半導體，例如絕緣體上矽(silicon on insulator，SOI)或絕緣體上鍺(germanium on insulator，GOI)基板。 在圖2中，在半導體基板302上方，連續形成過渡結構304與通道層312。在一些實施例中，過渡結構304係包括複數個層，媒介自半導體基板302至通道層312的晶格過渡。在此方式中，可減少半導體基板302與通道層312之間的晶格錯位。 在一些實施例中，過渡結構304包含半導體基板302上方的成核層(nuclear layer)。成核層具有晶格結構與/或熱膨脹係數(thermal expansion coefficient，TEC)適合橋接半導體基板302與上方層之間的晶格錯位與/或TEC錯配，例如本揭露所述之GaN層。在一些實施例中，成核層包含氮化鋁(AlN)。在一些實施例中，成核層厚度為70至300奈米(nm)。在一些實施例中，省略成核層。 在一或多個實施例中，過渡結構304另包含過渡層於成核層上方。過渡層進一步促使成核層(或半導體基板302)與通道層312之間的晶格結構與TEC逐漸變化。在一些實施例中，過渡層包含分級的(graded)氮化鋁鎵(Alx Ga(1-x) N，x為鋁-鎵組成中的鋁含量比例，0＜x＜1)層。在一些實施例中，分級的氮化鋁鎵層包含多層，由與半導體基板302相鄰之底層至通道層312，各自具有降低的比例x。在至少一實施例中，分級的氮化鋁鎵層具有三層，底層的x比例範圍係約0.7-0.9，中間層的範圍係約0.4-0.6，以及頂層的範圍係約0.15-0.3。在一些實施例中，取代具有不同x比例的多層，分級的氮化鋁鎵層具有連續梯度的比例x。在一些實施例中，過渡層厚度係約500至1050 nm。在一些實施例中，省略過渡層。 在一些實施例中，通道層312包含一或多個III-V族化合物層。III-V族化合物層的例子包含但不限於GaN、AlGaN、InGaN與InAlGaN。在至少一實施麗珠，一或多個III-V族化合物層係被摻雜。在一或多個實施例中，通道層312包含交錯配置的p摻雜與n摻雜之III-V族化合物層。在至少一實施例中，通道層312包含p摻雜的GaN層。P摻雜的GaN層中的p型摻質之例子包含但不限於C、Fe、Mg與Zn。在一實施例中，通道層312厚度為約100至約200 nm。 可使用一些現有的成長技術，於半導體基板302上方形成通道層312。在一些實施例中，可使用分子束磊晶(molecular-beam epitaxy，MBE)通道層312、金屬有機化學氣相沉積(metalorganic chemical vapor deposition，MOCVD)、混合氣相磊晶(hydride vapor phase epitaxy，HVPE)或其他合適的方式，於過渡結構304上方形成通道層312。 在圖3中，於通道層312上方形成主動層314。主動層314包含一或多個III-V族化合物層，其組成不同於通道層312的III-V族化合物層。在一些實施例中，主動層314包含AlN、Aly Ga(1-y) N (其中y為鋁含量比例，0＜y＜1)、或其組合。主動層314經配置以沿著通道層312與主動層314之間的界面引起通道層314中的二維電子氣體(2DEG)318 。具有兩種不同半導體材料的主動層314與通道層312之間，形成異接合(heterojunction)。主動層314與通道層312之間存在帶隙不連續。由於壓電效應(piezoelectric effect)，主動層314中的電子可掉落至通道層312中，因而產生高移動性傳導電子的薄層，亦即2DEG 318，在與主動層314界面相鄰的通道層312中。2DEG 318中的電子為通道層312中的電荷載體。 在製造製程過程中，主動層314的表面可被逐漸氧化，造成在其暴露的表面上方形成(天然的)氧化物。該等氧化物包含氧化鋁(AlO)、氧化鎵(GaO)、氧化氮(NO)、或Al、Ga、N與O之組合。在此實施例中，在移至後續階段之前，於主動層214的表面上，進行清理步驟與/或退火(annealing)，如圖4所示。清理步驟可移除主動層314之表面上的汙染。清理步驟亦可移除氧化物或減少主動層之表面上吸收的氧化物量。在此實施例中，藉由將主動層314的表面暴露至任何合適的濕式清理溶液，進行濕式清理步驟。 在例示實施例中，在退火製程過程中，對於主動層314的表面提供氮環境氣氛(nitrogen-based ambient atmosphere)。使用該退火，藉由修補由高密度的供應型點缺陷存在造成的缺陷，以降低主動層314的阻抗，該缺陷例如氮空缺(nitrogen vacancies，VN )、Ga/N反位(anti-site)、以及其與天然缺陷與受體摻質的複合物，具有相對低的形成能量。已知這些缺陷在GaN中具有供應者作用(donor behavior)，因而限制最大的p型傳導。由於植入誘發的破壞產生額外的供應型缺陷，補償活化孔(activated hole)，因而在離子植入的GaN層中甚至更難以達到高p型傳導性。所導入的缺陷在帶隙內具有主要的深階(deep level)；因此，植入的GaN為高電阻。該破壞必須被退火以達成植入摻質的電性活化。在一些實施例中，於約350°C至約800°C的溫度範圍中，完成退火。 在圖5(a)中，薄AlN膜319為毯狀物，沉積於主動層314之經清理且退火的表面上方。AlN膜319的Al濃度高於主動層314中的Al濃度。在一些實施例中，AlN膜319中的Al濃度與主動層314中的Al濃度比例係約1.1至2.5。在一些實施例中，可使用原子層沉積(atomic layer deposition，ALD)，用於毯狀沉積薄Al膜319於主動層314上方。然而，這並非本發明之限制。在其他的實施例中，可使用MBE、化學氣相沉積(CVD)、濺鍍、電子束蒸鍍(E-beam evaporation)、熱蒸鍍、或其他合適的方式，於主動層314上方形成薄Al膜319。所沉積的AlN膜319厚度足以對於相鄰的主動層314提供所需要的Al濃度。在一些實施例中，所沉積的AlN膜319之厚度約3至20個Al原子的長度。 在一些其他的實施例中，薄AlN膜319’沉積於主動層314之經清理且退火的表面之一部分上方，如圖5(b)所示。特別地，可選擇性進行在主動層314上方沉積薄AlN膜319’，以避免主動層314的該部分表面保留用於閘極電極。AlN膜319’中的Al濃度高於主動層314中的Al濃度。在一些實施例中，AlN膜319’中的Al濃度與主動層314中的Al濃度比例為約1.1至2.5。由於該閘極電極附近的高電壓與高溫可加速高Al濃度層與相鄰的主動層314之間鍵結斷裂，因而薄膜319’的部分沉積可對於所製造的裝置提供較高的可信賴度。薄AlN膜319’的厚度需求可與AlN膜319實質相同。在一些實施例中，AlN膜319’沉積厚度約為3至21個Al原子的長度。可使用MBE、CVD、濺鍍、E束蒸鍍、熱蒸鍍、或其他合適的方式，在主動層314上方形成薄AlN膜319’。 在圖6(a)中，於圖5(a)的半導體結構上進行高溫退火。在退火過程中，來自高濃度區域(例如在薄AlN膜31中)的Al原子逐漸擴散至相鄰主動層314且與相鄰主動層314反應。在退火之後，Al膜319與主動層314合作形成額外的Al擴散主動層321，其中Al濃度自該額外的Al擴散主動層321之表面/邊界朝向其內部逐漸降低。在一些實施例中，於約500°C至約900°C的溫度範圍中，完成該退火。 在一些實施例中，Al的額外擴散自額外的Al擴散主動層321朝向其內部延伸至小於約5 nm的深度，並且形成高擴散Al層(例如高Al擴散層322)，如圖6(a)所示。因此，在高溫退火之前，在高Al擴散層322下方之額外的Al擴散主動層321之大部分仍具有與主動層314實質相同的Al濃度。高Al擴散層322於主動層314與後續步驟中形成於其上的閘極電極之介電層之間的界面自然呈現高帶阻障(high band barrier)。在此方式中，高Al擴散層322可降低電子落入界面處的晶格錯配缺陷之機會。因此，可顯著改良關於界面捕捉密度(Dit)的一些特性，例如線性汲極電流(Idlin)退化、電流崩塌、以及動態開啟狀態阻抗RON 。 在圖6(b)中，於圖5(b)的半導體結構上進行類似於圖6(a)的高溫退火。在退火過程中，來自較高濃度區域(例如在薄AlN膜319’中)的Al原子逐漸擴散至相鄰的主動層314中並且與相鄰的主動層314反應。在退火之後，Al膜319’與主動層314合作形成額外的Al擴散主動層321’，其中Al濃度自額外的Al擴散主動層321’的表面/邊界朝向其內部逐漸降低。在一些實施例中，於約500°C至約900°C的溫度範圍中，完成該退火。 在一些實施例中，Al的額外擴散自額外的Al擴散主動層321’朝向其內部延伸至小於約5 nm的深度，並且形成高Al擴散層322’，如圖6(b)所示。因此，在高溫退火之前，在高Al擴散層322’外部之額外的Al擴散主動層321’之大部分仍具有與主動層314實質相同的Al濃度。高Al擴散層322’亦可改良一些特性，例如界面捕捉密度、Idlin退化、電流崩塌以及動態開啟狀態阻抗RON 。 在討論III-V HEMT結構的以下形成製程之前，請參閱圖9。圖9係根據本揭露的一些實施例說明Ga原子與Al原子之X射線能量散射分析(energy dispersive X-ray，EDX)的圖表。在EDX分析中，額外的Al擴散主動層321係位於約18 nm的深度，以及高Al擴散層322的區域或高Al擴散層322’係位於約18 nm至約24 nm的深度。EDX分析顯示Al原子的主要峰值係位於高Al擴散層322/322’。在高溫退火之前，位於比約24 nm深度更深的Al原子之平曲線(flat curve)的Al濃度係與主動層314實質相同。在此實施例中，主要峰值的Al原子總量為約26原子%，以及額外的Al擴散主動層321/321’中之平曲線的Al原子總量為約18原子%。在一些實施例中，主要峰值的Al濃度與平曲線的Al濃度之比例係約1.1至2.5。此外，在相同深度，主要峰值的Al濃度係低於Ga濃度。在一些實施例中，可藉由X射線光電子光譜(X-ray photoelectron spectroscopy，XPS)分析或任何其他合適的方式，得到相同的結果。 參閱圖7(a)，閘極結構362包含形成於閘極介電質320上方的傳導閘極電極364。傳導閘極電極364可包括任何合適的傳導材料，例如摻雜的多晶矽，或是金屬，例如鈦(Ti)或鋁(Al)。閘極介電質320可包括例如氧化鋁(Al2 O3 )、二氧化矽(SiO2 )或氮化矽(Si3 N4 )。閘極電極364形成非歐姆接點於高Al擴散層322的表面。 在實質相同的方式中，如圖7(b)所示，閘極結構362包含傳導閘極電極364形成於閘極介電質320上方。傳導閘極電極364可包括任何合適的傳導材料，例如摻雜的多晶矽，或是金屬，例如鈦(Ti)或鋁(Al)。閘極電極364形成非歐姆接點於額外的Al擴散主動層321’的表面。 在圖8(a)中，在閘極電極364的兩側上，提供歐姆源極接點372與歐姆汲極接點374。源極與汲極電極372與374形成於高Al擴散層322的表面上方並且與高Al擴散層322的表面接觸。在實質相同的方式中，如圖8(b)所示，在閘極電極364的兩側上，提供歐姆源極接點372與歐姆汲極接點374。源極與汲極電極372與374形成於高Al擴散層322’的表面上方並且與高Al擴散層322’的表面接觸。在此實施例中，閘極電極364與汲極電極374相距約20微米的距離L1，以及閘極電極364與汲極電極374之側的高Al擴散層322’的最近端相距約15微米的距離L2。在一些實施例中，L2/L1比例自約0至約0.8，並且距離L2可代表閘極電極364與汲極電極374之間的距離或是閘極電極364與源極電極372之間的距離。 一般而言，2DEG 318中的電子呈現高載體移動性。藉由施加電壓至閘極電極364，而調整此區域的傳導性。當施加逆電壓(reverse voltage)時，2DEG 318附近的傳導帶上升至Fermi程度之上，並且2DEG 318的一部分耗盡載體，藉以防止電流自源極電極372流至汲極電極374。 圖10係根據本揭露的一些實施例說明發明人進行的實驗結果之圖表，說明在不同深度有或沒有高Al擴散層322/322’所製造的III-V HEMT上量測之界面捕捉密度Dit之值。不同深度對應於不同的能階，分別標示為「0.2」、「0.3」、「0.4」、「0.5」、「0.6」與「0.7」eV，其係於相同條件下處理，差別在於高Al擴散層322/322’的存在與不存在。較小的能階對應於與額外的Al擴散主動層321/321’之表面相距較淺的深度。將較於具有高Al擴散層322/322’所製造的III-V HEMT(圖10中以“正方形”表示的數據點)，沒有高Al擴散層322/322’所製造的III-V HEMT(圖10中以“菱形”表示的數據點)於那些較淺的深度具有較高的界面捕捉密度Dit。 圖11係根據本揭露的一些實施例說明發明人所進行的實驗結果之圖表，說明線性汲極電流(linear drain current (Idlin)退化為有或沒有高Al擴散層所製造的III-V HEMT群組上量測之應力時間(stress time)之函數。發現相較於不具有高Al擴散層322/322’所製造的III-V HEMT，亦即正方形，具有高Al擴散層322/322’所製造的III-V HEMT具有較少的Idlin退化。當應力時間延長時，差異變得更加顯著。因此，可理解具有高Al擴散層322/322’的III-V HEMT至少在可信賴度具有較佳表現。 圖12係根據本揭露的實施例說明發明人所進行的實驗結果之圖表，說明動態最小「開啟(on)」阻抗(Rdson)比例為有或沒有高Al擴散層322/322’所製造的III-V HEMT群組上量測之應力電壓之函數。發現相較於不具有高Al擴散層322/322’所製造的III-V HEMT，亦即正方形，具有高Al擴散層322/322’所製造的III-V HEMT具有較小的Rdson比例增加。換言之，具有高Al擴散層322/322’之HEMT的Rdson增加速度小於不具有高Al擴散層322/322’之HEMT的Rdson增加速度。當應力電壓增加時，差異變得更加顯著。因此，可理解具有高Al擴散層322/322’的III-V HEMT至少在可信賴度具有較佳表現。 本揭露的一些實施例提供一種半導體結構。該半導體結構包含：一通道層；在該通道層上方的一主動層，其中該主動層經配置以沿著該通道層與該主動層之間的一界面形成二維電子氣體(2DEG)於該通道層中；在該主動層之頂表面上方的一閘極電極；以及在該主動層之頂表面上方的一源極/汲極電極；其中該主動層包含自該主動層之該頂表面至一底表面依序配置於其中的一第一層與一第二層，以及相較於該第二層，該第一層具有較高的鋁(Al)原子濃度。 前述內容概述一些實施方式的特徵，因而熟知此技藝之人士可更加理解本揭露之各方面。熟知此技藝之人士應理解可輕易使用本揭露作為基礎，用於設計或修飾其他製程與結構而實現與本申請案所述之實施例具有相同目的與/或達到相同優點。熟知此技藝之人士亦應理解此均等架構並不脫離本揭露揭示內容的精神與範圍，並且熟知此技藝之人士可進行各種變化、取代與替換，而不脫離本揭露之精神與範圍。
302‧‧‧半導體基板
304‧‧‧過渡結構
312‧‧‧通道層
314‧‧‧主動層
318‧‧‧二維電子氣體
319‧‧‧薄AlN膜
319’‧‧‧薄AlN膜
320‧‧‧閘極介電質
321‧‧‧額外的Al擴散主動層
321’‧‧‧額外的Al擴散主動層
322‧‧‧高Al擴散層
322’‧‧‧高Al擴散層
362‧‧‧閘極結構
364‧‧‧傳導閘極電極
372‧‧‧歐姆源極接點
374‧‧‧歐姆汲極接點
為協助讀者達到最佳理解效果，建議在閱讀本揭露時同時參考附件圖示及其詳細文字敘述說明。請注意為遵循業界標準作法，本專利說明書中的圖式不一定按照正確的比例繪製。在某些圖式中，尺寸可能刻意放大或縮小，以協助讀者清楚了解其中的討論內容。 圖1至圖8(b)係根據本揭露的一些實施例說明各種階段所製造的III-V HEMT結構之剖面示意圖。 圖9係根據本揭露的一些實施例說明Ga原子與Al原子之X射線能量散射分析(energy dispersive X-ray，EDX)。 圖10係根據本揭露的一些實施例說明發明人進行的實驗結果之圖表，說明在不同深度有或沒有高Al擴散層所製造的III-V HEMT上量測之界面捕捉密度Dit之值。 圖11係根據本揭露的一些實施例說明發明人所進行的實驗結果之圖表，說明線性汲極電流(linear drain current (Idlin)退化為有或沒有高Al擴散層所製造的III-V HEMT上量測之應力時間(stress time)之函數。 圖12係根據本揭露的實施例說明發明人所進行的實驗結果之圖表，說明動態最小「開啟(on)」阻抗(Rdson)比例為有或沒有高Al擴散層所製造的III-V HEMT群組上量測之應力電壓之函數。

Claims (1)

  1. 一種半導體結構，包括： 一通道層； 一主動層，位於該通道層上方，該主動層經配置以形成一二維的電子氣體(two-dimensional electron gas，2DEG)，該二維電子氣體沿著該通道層與該主動層之間的一界面形成於該通道層中； 一閘極電極，形成於該主動層的一頂表面上方；以及 一源極/汲極電極，位於該主動層的該頂表面上方； 其中該主動層包含自該頂表面至該主動層的一底表面依序堆疊的一第一層與一第二層，相較於該第二層，該第一層具有較高的鋁(Al)原子濃度。
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US11532740B2 (en) 2022-12-20
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