TW201715501A - 顯示面板、其製造方法與其驅動方法 - Google Patents

顯示面板、其製造方法與其驅動方法 Download PDF

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TW201715501A
TW201715501A TW104140309A TW104140309A TW201715501A TW 201715501 A TW201715501 A TW 201715501A TW 104140309 A TW104140309 A TW 104140309A TW 104140309 A TW104140309 A TW 104140309A TW 201715501 A TW201715501 A TW 201715501A
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transistor
pixel circuit
source
display panel
gate
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TW104140309A
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TWI564861B (zh
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黃如琳
程智修
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聯詠科技股份有限公司
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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3648—Control of matrices with row and column drivers using an active matrix
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    • G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/003—Details of a display terminal, the details relating to the control arrangement of the display terminal and to the interfaces thereto
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    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
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    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
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    • G09G3/3233—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
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    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
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    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
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Abstract

一種顯示面板、其製造方法與其驅動方法。顯示面板包括至少一源極線以及多個像素電路。這些像素電路的源極端耦接至源極線。這些像素電路包含近像素電路與遠像素電路。近像素電路至源極驅動器的距離小於遠像素電路至源極驅動器的距離。近像素電路的源極端的輸入阻抗（在開啟狀態下）大於遠像素電路的源極端的輸入阻抗（在開啟狀態下），以便補償在同一條源極線不同位置的源極線阻抗差異。

Description

顯示面板、其製造方法與其驅動方法
本發明是有關於一種顯示裝置，且特別是有關於一種顯示面板、其製造方法與驅動方法。
顯示面板通配置有多個像素(pixel)電路。這些像素電路具有相同的布局結構，因此電性特性彼此相似。舉例來說，不同位置的這些像素電路的源極端可能具有相同的輸入阻抗。源極驅動器可以經由不同的源極線將不同的像素電壓傳輸至這些像素電路的源極端。閘極驅動器可以經由不同的閘極線將不同相位的掃描脈衝傳輸至這些像素電路的閘極端，以便於不同時間開啟這些像素電路。這些掃描脈衝的高壓準位（閘極高電壓）互為相同。配合閘極驅動器的掃描時序，這些像素電壓可以被寫入對應的像素電路中以顯示影像。
源極線一般具有阻抗（電阻性阻抗與電容性阻抗）。隨著顯示面板尺寸越大（源極線越長），則源極線的阻抗越大。再者，顯示面板密集度/解析度越高（源極線越細），則源極線的阻抗亦越大。因為源極線的阻抗，連接於同一條源極端的不同像素電路將具有不同的時間常數。遠離源極驅動器的像素電路的時間常數會大於接近源極驅動器的像素電路的時間常數。時間常數越大，像素電路的充電時間越短。在顯示面板尺寸越來越大、不斷增加解析度與頻率的發展趨勢下，源極線的阻抗所造成的時間常數差異將會變得不容忽視。時間常數差異（充電時間差異）可能造成顯示異常。
本發明提供一種顯示面板、其製造方法與驅動方法，其可以補償在同一條源極線不同位置的不同像素電路的源極線阻抗差異。
本發明實施例的一種顯示面板包括至少一源極線以及多個像素電路。這些像素電路的源極端耦接至源極線。這些像素電路包含近像素電路與遠像素電路。近像素電路至源極驅動器的距離小於遠像素電路至源極驅動器的距離。在開啟狀態下近像素電路的源極端的輸入阻抗大於在開啟狀態下遠像素電路的源極端的輸入阻抗。
本發明實施例的一種顯示面板的製造方法，包括：提供至少一源極線於顯示面板；提供多個像素電路於顯示面板，其中這些像素電路的源極端耦接至源極線，這些像素電路包含近像素電路與遠像素電路，近像素電路至源極驅動器的距離小於遠像素電路至源極驅動器的距離；以及調整這些像素電路的源極端的輸入阻抗，使得在開啟狀態下近像素電路的源極端的輸入阻抗大於在開啟狀態下遠像素電路的源極端的輸入阻抗。
本發明實施例提供一種顯示面板的驅動方法。顯示面板包括至少一源極線、一第一閘極線、一第二閘極線與多個像素電路。這些像素電路的源極端耦接至源極線。這些像素電路包含近像素電路與遠像素電路。近像素電路至源極驅動器的距離小於遠像素電路至源極驅動器的距離。近像素電路的閘極端電性連接至第一閘極線。遠像素電路的閘極端電性連接至第二閘極線。所述驅動方法包括：提供第一閘極高電壓至第一閘極線，以開啟近像素電路；以及提供第二閘極高電壓至第二閘極線，以開啟遠像素電路，其中第一閘極線的第一閘極高電壓小於第二閘極線的第二閘極高電壓，使得在開啟狀態下近像素電路的源極端的輸入阻抗大於在開啟狀態下遠像素電路的源極端的輸入阻抗。
基於上述，本發明實施例所述顯示面板、其製造方法與驅動方法可以使在同一條源極線不同位置的不同像素電路的源極端具有不同的開啟輸入阻抗（在開啟狀態下的輸入阻抗），以便補償在同一條源極線的不同位置的源極線阻抗差異。
為讓本發明的上述特徵和優點能更明顯易懂，下文特舉實施例，並配合所附圖式作詳細說明如下。
在本案說明書全文(包括申請專利範圍)中所使用的「耦接（或連接）」一詞可指任何直接或間接的連接手段。舉例而言，若文中描述第一裝置耦接（或連接）於第二裝置，則應該被解釋成該第一裝置可以直接連接於該第二裝置，或者該第一裝置可以透過其他裝置或某種連接手段而間接地連接至該第二裝置。另外，凡可能之處，在圖式及實施方式中使用相同標號的元件/構件/步驟代表相同或類似部分。不同實施例中使用相同標號或使用相同用語的元件/構件/步驟可以相互參照相關說明。
圖1是依照本發明實施例說明一種顯示裝置100的電路方塊示意圖。顯示裝置100包括至少一個閘極驅動器120、至少一個源極驅動器130以及一個顯示面板140。顯示面板140具有兩基板（Substrate），而且於兩基板間填充有液晶材料。顯示面板140設置有多條源極線（source line，或稱資料線，例如圖1所示SL_1、SL_2、…、SL_n，其中n為正整數）、多條閘極線（gate line，或稱掃描線，例如圖1所示GL_1、GL_2、…、GL_m，其中m為正整數）以及複數個像素(pixel)電路（例如圖1所示P(1,1)、P(1,2)、…、P(1,n)、P(2,1)、P(2,2)、…、P(2,n)、P(m,1)、P(m,2)、…、P(m,n)）。源極線SL_1～SL_n垂直於閘極線GL_1～GL_m。像素單元P(1,1)～P(m,n)係以矩陣的方式分佈於顯示面板140上。這些像素電路P(1,1)～P(m,n)的源極端分別耦接至源極線SL_1～SL_n中的對應源極線，而這些像素電路P(1,1)～P(m,n)的閘極端分別耦接至閘極線GL_1～GL_m中的對應閘極線，如圖1所示。
閘極驅動器120的多個輸出端以一對一方式耦接至不同閘極線GL_1～GL_m。閘極驅動器120可以一個接著一個地輪流驅動（或掃描）顯示面板140的每一條閘極線。例如，閘極線GL_1先被驅動，然後依序驅動閘極線GL_2～GL_m。
源極驅動器130可以將多個數位像素資料轉換為對應像素變壓。配合閘極驅動器120的掃描時序，源極驅動器130可以經由源極線SL_1～SL_n將這些對應像素變壓寫入顯示面板140的對應像素電路中（例如圖1所示像素電路P(1,1)～P(m,n)）以顯示影像。
源極線SL_1～SL_n一般具有阻抗（電阻性阻抗與電容性阻抗）。隨著顯示面板140尺寸越大（源極線越長），則源極線SL_1～SL_n的阻抗越大。再者，顯示面板140密集度/解析度越高（源極線越細），則源極線SL_1～SL_n的阻抗亦越大。
圖2是依照本發明實施例說明圖1所示源極線SL_1的等效電路示意圖。為方便說明，在此將設定源極線SL_1的像素電路個數為5（即m=5）。圖2繪示了像素電路P(1,1)與P(5,1)的等效電路圖，而顯示面板140中的其他像素電路可以參照像素電路P(1,1)與P(5,1)而類推。基於像素電路P(1,1)至源極驅動器130的距離小於像素電路P(5,1)至源極驅動器130的距離，以下將稱像素電路P(1,1)為「近像素電路」，而稱像素電路P(5,1)為「遠像素電路」。於圖2中，電阻RL與電容CL分別表示源極線SL_1（金屬線）的電阻性阻抗與電容性阻抗。於近像素電路P(1,1)處，源極線SL_1的時間常數約略為RL*CL。於遠像素電路P(5,1)處，源極線SL_1的時間常數約略為15RL*CL。本實施例可以調整這些像素電路P(1,1)～P(m,n)在開啟狀態下的源極端的輸入阻抗。例如，使近像素電路P(1,1)在開啟狀態下的源極端的輸入阻抗大於遠像素電路P(5,1)在開啟狀態下的源極端的輸入阻抗，以補償源極線SL_1於不同位置的阻抗差異（亦即補償源極線SL_1於不同位置的時間常數差異）。
詳而言之，近像素電路P(1,1)包括第一電晶體211與第一電容212。第一電晶體211的源極電性連接至源極線SL_1。第一電晶體211的汲極電性連接至第一電容212。第一電晶體211的閘極電性連接至顯示面板140的第一閘極線GL_1。遠像素電路P(5,1)包括第二電晶體251與第二電容252。第二電晶體251的源極電性連接至源極線SL_1。第二電晶體251的汲極電性連接至第二電容252。第二電晶體251的閘極電性連接至顯示面板140的第二閘極線GL_5。圖2中Ron1表示第一電晶體211的導通電阻，Ct1表示第一電容212的電容值，Ron5表示第二電晶體251的導通電阻，而Ct5表示第二電容252的電容值。
在一些實施例中，第一電晶體211的導通電阻Ron1（近像素電路P(1,1)在開啟狀態下的源極端的輸入阻抗）與第二電晶體251的導通電阻Ron5（遠像素電路P(5,1)在開啟狀態下的源極端的輸入阻抗）可以被調整，使得第一電晶體211的導通電阻Ron1大於第二電晶體251的導通電阻Ron5。舉例來說（但不限於此），第一電晶體211的通道的寬長比值（例如W1/L1）與第二電晶體251的通道的寬長比值（例如W5/L5）可以被調整，使得第一電晶體211的通道的寬長比值W1/L1小於第二電晶體251的通道的寬長比值W5/L5。其中，W1為第一電晶體211的通道寬，L1為第一電晶體211的通道長，W5為第二電晶體251的通道寬，而L5為第二電晶體251的通道長。第一電晶體211的通道的寬長比值W1/L1小於第二電晶體251的通道的寬長比值W5/L5，意味著第一電晶體211的導通電阻Ron1大於第二電晶體251的導通電阻Ron5。
在另一些實施例中，閘極驅動器120可以提供不同準位的掃描脈衝至閘極線GL_1～GL_m，以使第一電晶體211的導通電阻Ron1大於第二電晶體251的導通電阻Ron5。舉例來說（但不限於此），閘極線GL_1的閘極高電壓（即掃描脈衝的高電壓準位）可以小於閘極線GL_5的閘極高電壓，使得第一電晶體211的導通電阻Ron1大於該第二電晶體251的導通電阻Ron5。
在又一些實施例中，第一電容212的電容值Ct1與第二電容252的電容值Ct5可以被調整，使得第一電容212的電容值Ct1大於第二電容252的電容值Ct5。舉例來說（但不限於此），第一電容212與/或第二電容252的電極面積（或電極距離）可以被調整，以改變電容值。第一電容212的電容值Ct1大於第二電容252的電容值Ct5，使得近像素電路P(1,1)在開啟狀態下的源極端的輸入阻抗大於遠像素電路P(5,1)在開啟狀態下的源極端的輸入阻抗。
理想狀況下，本實施例可以調整近像素電路P(1,1)的導通電阻Ron1與/或電容值Ct1，以及/或是調整遠像素電路P(5,1)的導通電阻Ron5與/或電容值Ct5，使得近像素電路P(1,1)的時間常數RL*CL + Ron1* Ct1可以約略等於遠像素電路P(5,1)的時間常數15RL*CL + Ron5* Ct5。由於補償了源極線SL_1於不同位置的阻抗差異，使得源極線SL_1於不同位置的像素電路具有相似的時間常數，進而改善了因為時間常數差異（充電時間差異）所造成顯示異常。
圖3是依照本發明說明一種顯示面板的製造方法的流程示意圖。此製造方法包括步驟S310與步驟S320。步驟S310中，提供至少一源極線與多個像素電路於顯示面板140。其中，這些像素電路的源極端耦接至源極線，例如圖1所示像素電路P(1,1)、P(2,1)、…、P(m,1)的源極端耦接至源極線SL_1。這些像素電路包含一個近像素電路與一個遠像素電路，使得近像素電路至源極驅動器130的距離小於遠像素電路至源極驅動器130的距離。步驟S320中，調整這些像素電路的源極端的輸入阻抗，使得近像素電路在開啟狀態下的源極端的輸入阻抗大於遠像素電路在開啟狀態下的源極端的輸入阻抗。
在一些實施例中，該近像素電路包括第一電晶體與第一電容（例如圖2所示近像素電路P(1,1)包括第一電晶體211與第一電容212），該遠像素電路包括第二電晶體與第二電容（例如圖2所示遠像素電路P(5,1)包括第二電晶體251與第二電容252）。圖3所示步驟S320包括：調增第一電晶體的導通電阻，使得第一電晶體的導通電阻大於第二電晶體的導通電阻。例如，調增圖2所示第一電晶體211的導通電阻Ron1，使得第一電晶體211的導通電阻Ron1大於第二電晶體251的導通電阻Ron5。
在一些實施例中，所述調增該第一電晶體的導通電阻的步驟包括：調降第一電晶體的通道的寬長比值，使得第一電晶體的通道的寬長比值小於第二電晶體的通道的寬長比值。
在一些實施例中，該近像素電路包括第一電晶體與第一電容（例如圖2所示近像素電路P(1,1)包括第一電晶體211與第一電容212），該遠像素電路包括第二電晶體與第二電容（例如圖2所示遠像素電路P(5,1)包括第二電晶體251與第二電容252）。圖3所示步驟S320包括：調增第一電容的電容值，使得第一電容的電容值大於第二電容的電容值。例如，調增圖2所示第一電容212的電容值Ct1，使得第一電容212的電容值Ct1大於第二電容252的電容值Ct5。
圖4是依照本發明說明一種顯示面板的驅動方法的流程示意圖。此顯示面板可以參照圖1與圖2所述顯示面板140的相關說明。此驅動方法包括步驟S410與步驟S420。步驟S410中，提供第一閘極高電壓至第一閘極線，以開啟近像素電路。例如，提供第一閘極高電壓至圖2所示閘極線GL_1，以開啟近像素電路P(1,1)。步驟S420中，提供第二閘極高電壓至第二閘極線，以開啟遠像素電路。例如，提供第二閘極高電壓至圖2所示閘極線GL_5，以開啟遠像素電路P(5,1)。其中，第一閘極線的第一閘極高電壓小於第二閘極線的第二閘極高電壓，使得近像素電路在開啟狀態下的源極端的輸入阻抗大於遠像素電路在開啟狀態下的源極端的輸入阻抗。
綜上所述，本發明實施例所述顯示面板中不同像素電路在開啟狀態下具有不同的輸入阻抗。不同位置的像素電路具有不同的輸入阻抗，因此可以補償於同一條源極線不同位置的阻抗差異，進而改善了因為時間常數差異（充電時間差異）所造成顯示異常。
雖然本發明已以實施例揭露如上，然其並非用以限定本發明，任何所屬技術領域中具有通常知識者，在不脫離本發明的精神和範圍內，當可作些許的更動與潤飾，故本發明的保護範圍當視後附的申請專利範圍所界定者為準。
100‧‧‧顯示裝置 120‧‧‧閘極驅動器 130‧‧‧源極驅動器 140‧‧‧顯示面板 211‧‧‧第一電晶體 212‧‧‧第一電容 251‧‧‧第二電晶體 252‧‧‧第二電容 CL‧‧‧電容 Ct1、Ct5‧‧‧電容值 GL_1、GL_2、GL_5、GL_m‧‧‧閘極線 P(1,1)、P(1,2)、P(1,n)、P(2,1)、P(2,2)、P(2,n)、P(5,1)、P(m,1)、P(m,2)、P(m,n)‧‧‧像素電路 RL‧‧‧電阻 Ron1、Ron5‧‧‧導通電阻 SL_1、SL_2、SL_n‧‧‧源極線 S310、S320、S410、S420‧‧‧步驟
圖1是依照本發明實施例說明一種顯示裝置的電路方塊示意圖。 圖2是依照本發明實施例說明圖1所示源極線SL_1的等效電路示意圖。 圖3是依照本發明說明一種顯示面板的製造方法的流程示意圖。 圖4是依照本發明說明一種顯示面板的驅動方法的流程示意圖。
S310、S320‧‧‧步驟

Claims (12)

  1. 一種顯示面板，包括： 至少一源極線；以及 多個像素電路，該些像素電路的源極端耦接至該源極線，其中該些像素電路包含一近像素電路與一遠像素電路，該近像素電路至一源極驅動器的距離小於該遠像素電路至該源極驅動器的距離，而在開啟狀態下該近像素電路的源極端的輸入阻抗大於在開啟狀態下該遠像素電路的源極端的輸入阻抗。
  2. 如申請專利範圍第1項所述的顯示面板，其中該近像素電路包括一第一電晶體與一第一電容，該第一電晶體的源極電性連接至該源極線，該第一電晶體的汲極電性連接至該第一電容，該遠像素電路包括一第二電晶體與一第二電容，該第二電晶體的源極電性連接至該源極線，以及該第二電晶體的汲極電性連接至該第二電容。
  3. 如申請專利範圍第2項所述的顯示面板，其中該第一電晶體的導通電阻大於該第二電晶體的導通電阻。
  4. 如申請專利範圍第2項所述的顯示面板，其中該第一電晶體的通道的寬長比值小於該第二電晶體的通道的寬長比值，使得該第一電晶體的導通電阻大於該第二電晶體的導通電阻。
  5. 如申請專利範圍第2項所述的顯示面板，其中該第一電晶體的閘極電性連接至該顯示面板的一第一閘極線，該第二電晶體的閘極電性連接至該顯示面板的一第二閘極線，該第一閘極線的閘極高電壓小於該第二閘極線的閘極高電壓，使得該第一電晶體的導通電阻大於該第二電晶體的導通電阻。
  6. 如申請專利範圍第2項所述的顯示面板，其中該第一電容的電容值大於該第二電容的電容值。
  7. 一種顯示面板的製造方法，包括： 提供至少一源極線於該顯示面板； 提供多個像素電路於該顯示面板，其中該些像素電路的源極端耦接至該源極線，該些像素電路包含一近像素電路與一遠像素電路，該近像素電路至一源極驅動器的距離小於該遠像素電路至該源極驅動器的距離；以及 調整該些像素電路在開啟狀態下的源極端的輸入阻抗，使得在開啟狀態下該近像素電路的源極端的輸入阻抗大於在開啟狀態下該遠像素電路的源極端的輸入阻抗。
  8. 如申請專利範圍第7項所述的顯示面板的製造方法，其中該近像素電路包括一第一電晶體與一第一電容，該第一電晶體的源極電性連接至該源極線，該第一電晶體的汲極電性連接至該第一電容，該遠像素電路包括一第二電晶體與一第二電容，該第二電晶體的源極電性連接至該源極線，而該第二電晶體的汲極電性連接至該第二電容。
  9. 如申請專利範圍第8項所述的顯示面板的製造方法，其中所述調整該些像素電路的源極端的輸入阻抗的步驟包括： 調增該第一電晶體的導通電阻，使得該第一電晶體的導通電阻大於該第二電晶體的導通電阻。
  10. 如申請專利範圍第8項所述的顯示面板的製造方法，其中所述調增該第一電晶體的導通電阻的步驟包括： 調降該第一電晶體的通道的寬長比值，使得該第一電晶體的通道的寬長比值小於該第二電晶體的通道的寬長比值。
  11. 如申請專利範圍第8項所述的顯示面板的製造方法，其中所述調整該些像素電路的源極端的輸入阻抗的步驟包括： 調增該第一電容的電容值，使得該第一電容的電容值大於該第二電容的電容值。
  12. 一種顯示面板的驅動方法，該顯示面板包括至少一源極線、一第一閘極線、一第二閘極線與多個像素電路，其中該些像素電路的源極端耦接至該源極線，該些像素電路包含一近像素電路與一遠像素電路，該近像素電路至一源極驅動器的距離小於該遠像素電路至該源極驅動器的距離，該近像素電路的閘極端電性連接至該第一閘極線，該遠像素電路的閘極端電性連接至該第二閘極線，所述驅動方法包括： 提供一第一閘極高電壓至該第一閘極線，以開啟該近像素電路；以及 提供一第二閘極高電壓至該第二閘極線，以開啟該遠像素電路，其中該第一閘極線的該第一閘極高電壓小於該第二閘極線的該第二閘極高電壓，使得在開啟狀態下該近像素電路的源極端的輸入阻抗大於在開啟狀態下該遠像素電路的源極端的輸入阻抗。
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