TW201712749A - Transition metal dry etch by atomic layer removal of oxide layers for device fabrication - Google Patents

Transition metal dry etch by atomic layer removal of oxide layers for device fabrication

Info

Publication number
TW201712749A
TW201712749A TW105114454A TW105114454A TW201712749A TW 201712749 A TW201712749 A TW 201712749A TW 105114454 A TW105114454 A TW 105114454A TW 105114454 A TW105114454 A TW 105114454A TW 201712749 A TW201712749 A TW 201712749A
Authority
TW
Taiwan
Prior art keywords
transition metal
oxide layers
device fabrication
dry etch
atomic layer
Prior art date
Application number
TW105114454A
Other languages
English (en)
Inventor
Patricio E Romero
John J Plombon
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Publication of TW201712749A publication Critical patent/TW201712749A/zh

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321—After treatment
    • H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
    • H01L21/32133—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only
    • H01L21/32135—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008—Making conductor-insulator-semiconductor electrodes
    • H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28026—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
    • H01L21/28079—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being a single metal, e.g. Ta, W, Mo, Al
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76829—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
    • H01L21/76834—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers formation of thin insulating films on the sidewalls or on top of conductors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material
    • H01L21/76883—Post-treatment or after-treatment of the conductive material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/5226—Via connections in a multilevel interconnection structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/528—Geometry or layout of the interconnection structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/53204—Conductive materials
    • H01L23/53209—Conductive materials based on metals, e.g. alloys, metal silicides
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N50/00—Galvanomagnetic devices
    • H10N50/01—Manufacture or treatment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66787—Unipolar field-effect transistors with an insulated gate, i.e. MISFET with a gate at the side of the channel
    • H01L29/66795—Unipolar field-effect transistors with an insulated gate, i.e. MISFET with a gate at the side of the channel with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B61/00—Magnetic memory devices, e.g. magnetoresistive RAM [MRAM] devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N50/00—Galvanomagnetic devices
    • H10N50/10—Magnetoresistive devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N50/00—Galvanomagnetic devices
    • H10N50/80—Constructional details

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Geometry (AREA)
  • Ceramic Engineering (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Drying Of Semiconductors (AREA)
  • Plasma & Fusion (AREA)
  • Semiconductor Memories (AREA)
  • ing And Chemical Polishing (AREA)
  • Inorganic Compounds Of Heavy Metals (AREA)
TW105114454A 2015-06-17 2016-05-10 Transition metal dry etch by atomic layer removal of oxide layers for device fabrication TW201712749A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/US2015/036302 WO2016204757A1 (en) 2015-06-17 2015-06-17 Transition metal dry etch by atomic layer removal of oxide layers for device fabrication

Publications (1)

Publication Number Publication Date
TW201712749A true TW201712749A (en) 2017-04-01

Family

ID=57545741

Family Applications (1)

Application Number Title Priority Date Filing Date
TW105114454A TW201712749A (en) 2015-06-17 2016-05-10 Transition metal dry etch by atomic layer removal of oxide layers for device fabrication

Country Status (6)

Country Link
US (1) US10217646B2 (zh)
EP (1) EP3311398A4 (zh)
KR (2) KR20220132603A (zh)
CN (1) CN107980170B (zh)
TW (1) TW201712749A (zh)
WO (1) WO2016204757A1 (zh)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109545737A (zh) * 2017-09-22 2019-03-29 株式会社斯库林集团 基板处理方法及基板处理装置

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2017205658A1 (en) * 2016-05-25 2017-11-30 The Regents Of The University Of Colorado, A Body Corporate Atomic layer etching on microdevices and nanodevices
JP7063117B2 (ja) * 2018-03-30 2022-05-09 東京エレクトロン株式会社 エッチング方法及びエッチング装置
US11437250B2 (en) * 2018-11-15 2022-09-06 Tokyo Electron Limited Processing system and platform for wet atomic layer etching using self-limiting and solubility-limited reactions
US10982335B2 (en) * 2018-11-15 2021-04-20 Tokyo Electron Limited Wet atomic layer etching using self-limiting and solubility-limited reactions
WO2020159854A1 (en) * 2019-01-28 2020-08-06 Tokyo Electron Limited Photo-assisted chemical vapor etch for selective removal of ruthenium
US11515167B2 (en) * 2019-02-01 2022-11-29 Hitachi High-Tech Corporation Plasma etching method and plasma processing apparatus
JP7202230B2 (ja) * 2019-03-20 2023-01-11 株式会社Ｓｃｒｅｅｎホールディングス 基板処理方法および基板処理装置
CN113906552A (zh) * 2019-04-29 2022-01-07 朗姆研究公司 用于减法式金属蚀刻的原子层蚀刻
US11424134B2 (en) * 2019-09-19 2022-08-23 Applied Materials, Inc. Atomic layer etching of metals
US11424123B2 (en) * 2020-02-25 2022-08-23 Tokyo Electron Limited Forming a semiconductor feature using atomic layer etch
US11984325B2 (en) 2021-07-12 2024-05-14 Applied Materials, Inc. Selective removal of transition metal nitride materials
KR102693152B1 (ko) * 2021-08-04 2024-08-08 한양대학교 에리카산학협력단 자기제한반응을 이용한 원자층 식각 방법

Family Cites Families (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04225525A (ja) 1990-12-27 1992-08-14 Sony Corp ドライエッチング方法
AU2003253610A1 (en) 2002-06-28 2004-01-19 Tokyo Electron Limited Anisotropic dry etching of cu-containing layers
KR100542736B1 (ko) * 2002-08-17 2006-01-11 삼성전자주식회사 원자층 증착법을 이용한 산화막의 형성방법 및 이를이용한 반도체 장치의 캐패시터 형성방법
US6975032B2 (en) * 2002-12-16 2005-12-13 International Business Machines Corporation Copper recess process with application to selective capping and electroless plating
US7540935B2 (en) * 2003-03-14 2009-06-02 Lam Research Corporation Plasma oxidation and removal of oxidized material
DE10338019A1 (de) * 2003-08-19 2005-03-24 Nawotec Gmbh Verfahren zum hochaufgelösten Bearbeiten dünner Schichten mit Elektronenstrahlen
US7300876B2 (en) * 2004-12-14 2007-11-27 Sandisk 3D Llc Method for cleaning slurry particles from a surface polished by chemical mechanical polishing
TW200802593A (en) * 2006-03-20 2008-01-01 Ulvac Inc Etching method
US7906099B2 (en) 2006-06-09 2011-03-15 Exxonmobil Chemical Patents Inc. Intergrown molecular sieve, its synthesis and its use in the conversion of oxygenates to olefins
US8124541B2 (en) * 2007-04-04 2012-02-28 Micron Technology, Inc. Etchant gas and a method for removing material from a late transition metal structure
JP2009043974A (ja) * 2007-08-09 2009-02-26 Tokyo Electron Ltd 半導体装置の製造方法、半導体基板の処理装置及び記憶媒体
US7648899B1 (en) * 2008-02-28 2010-01-19 Novellus Systems, Inc. Interfacial layers for electromigration resistance improvement in damascene interconnects
US8058179B1 (en) * 2008-12-23 2011-11-15 Novellus Systems, Inc. Atomic layer removal process with higher etch amount
US20110065276A1 (en) 2009-09-11 2011-03-17 Applied Materials, Inc. Apparatus and Methods for Cyclical Oxidation and Etching
US8901016B2 (en) * 2010-12-28 2014-12-02 Asm Japan K.K. Method of forming metal oxide hardmask
JP5707144B2 (ja) * 2011-01-18 2015-04-22 東京エレクトロン株式会社 基板処理装置のドライクリーニング方法及び金属膜の除去方法
JP5811540B2 (ja) * 2011-01-25 2015-11-11 東京エレクトロン株式会社 金属膜の加工方法及び加工装置
US8617973B2 (en) * 2011-09-28 2013-12-31 GlobalFoundries, Inc. Semiconductor device fabrication methods with enhanced control in recessing processes
TWI625424B (zh) * 2013-03-13 2018-06-01 應用材料股份有限公司 蝕刻包含過渡金屬的膜之方法
JP6142676B2 (ja) * 2013-05-31 2017-06-07 セントラル硝子株式会社 ドライエッチング方法、ドライエッチング装置、金属膜及びそれを備えたデバイス
US9576810B2 (en) * 2013-10-03 2017-02-21 Applied Materials, Inc. Process for etching metal using a combination of plasma and solid state sources
CN104451955B (zh) * 2014-11-25 2017-02-22 中国科学院电子学研究所 一种具有分级结构的金属或金属氧化物及其制备方法

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109545737A (zh) * 2017-09-22 2019-03-29 株式会社斯库林集团 基板处理方法及基板处理装置

Also Published As

Publication number Publication date
US10217646B2 (en) 2019-02-26
WO2016204757A1 (en) 2016-12-22
CN107980170A (zh) 2018-05-01
EP3311398A4 (en) 2019-02-20
CN107980170B (zh) 2022-02-18
KR102437717B1 (ko) 2022-08-29
KR20180016992A (ko) 2018-02-20
EP3311398A1 (en) 2018-04-25
US20180138054A1 (en) 2018-05-17
KR20220132603A (ko) 2022-09-30

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