TW201642316A - 保護圖案化介電金層塗層之雙塗覆及剝離方法 - Google Patents

保護圖案化介電金層塗層之雙塗覆及剝離方法 Download PDF

Info

Publication number
TW201642316A
TW201642316A TW105111915A TW105111915A TW201642316A TW 201642316 A TW201642316 A TW 201642316A TW 105111915 A TW105111915 A TW 105111915A TW 105111915 A TW105111915 A TW 105111915A TW 201642316 A TW201642316 A TW 201642316A
Authority
TW
Taiwan
Prior art keywords
layer
metal
coating
wafer
resist
Prior art date
Application number
TW105111915A
Other languages
English (en)
Other versions
TWI690978B (zh
Inventor
傑夫瑞 普爾
Original Assignee
普斯特股份有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 普斯特股份有限公司 filed Critical 普斯特股份有限公司
Publication of TW201642316A publication Critical patent/TW201642316A/zh
Application granted granted Critical
Publication of TWI690978B publication Critical patent/TWI690978B/zh

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/0271—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
    • H01L21/0272—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers for lift-off processes
    • G—PHYSICS
    • G02—OPTICS
    • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B1/00—Optical elements characterised by the material of which they are made; Optical coatings for optical elements
    • G02B1/10—Optical coatings produced by application to, or surface treatment of, optical elements
    • G02B1/14—Protective coatings, e.g. hard coatings
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
    • H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
    • H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
    • H01L21/2855—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table by physical means, e.g. sputtering, evaporation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76886—Modifying permanently or temporarily the pattern or the conductivity of conductive members, e.g. formation of alloys, reduction of contact resistances
    • H01L21/76892—Modifying permanently or temporarily the pattern or the conductivity of conductive members, e.g. formation of alloys, reduction of contact resistances modifying the pattern
    • G—PHYSICS
    • G02—OPTICS
    • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B1/00—Optical elements characterised by the material of which they are made; Optical coatings for optical elements
    • G02B1/10—Optical coatings produced by application to, or surface treatment of, optical elements
    • G02B1/11—Anti-reflection coatings

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Optics & Photonics (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Photosensitive Polymer And Photoresist Processing (AREA)
  • Optical Filters (AREA)
  • Weting (AREA)

Abstract

本發明揭示一種使用2層微影製程來保護圖案化介電質-金屬塗層之雙塗覆及剝離方法，該微影製程經暴露及顯影以形成底切結構，且隨後在用以不完全最終層結束之金屬/介電質濾光劑塗覆晶圓之後，剝離頂部微影層以暴露金屬層邊緣且將底部微影層完整留在晶圓上，使得可沈積最終濾光層以完成塗層且使暴露之金屬層邊緣鈍化。

Description

保護圖案化介電金層塗層之雙塗覆及剝離方法
本發明屬於薄膜介電質-金屬塗層之領域。更特定言之，其為一種使用雙塗覆及剝離方法來保護圖案化介電質-金屬塗層之方法。
已知若干沈積及保護介電質-金屬塗層之先前技術方法，諸如頒予Buchsbaum等人之美國專利第7,648,808號中所描述的方法，其處理沈積在圖案化特徵之頂部上的最終毯覆式塗層。在Buchsbaum所揭示之方法中，使用剝離製程接著使用新穎最終毯覆式塗覆步驟來對特徵進行圖案化及沈積，該最終毯覆式塗覆步驟完成塗層堆疊且產生金屬層邊緣之鈍化。金屬層邊緣之鈍化防止金屬之氧化及腐蝕。最終毯覆層可為一組層，諸如最終空腔鏡面、抗反射層或單層材料。此等層可使用針對其耐腐蝕特性特異性選擇之材料。此先前技術與部分或完全填充之圖案化區域相容，但在經塗覆及未塗覆之圖案化區上方利用連續毯覆式塗覆。其不與具有接合墊或類似未塗覆區域需求之晶圓相容。
藉由使用本申請案中所揭示之2層製程，上文所描述之先前技術限制現在可得以解決。
本揭示案之發明內容為一種使用2層微影製程來保護圖案化介電 質-金屬塗層之雙塗覆及剝離方法，該微影製程經暴露及顯影以形成底切結構(undercut)，且隨後在用以不完全最終層結束之金屬/介電質濾光劑塗覆晶圓之後，剝離頂部微影層以暴露金屬層邊緣且將底部微影層完整留在晶圓上，使得可沈積最終毯覆層以完成塗層且使暴露之金屬層邊緣鈍化。
1‧‧‧晶圓
2‧‧‧剝離抗蝕劑/LOR
3‧‧‧1822抗蝕劑
4‧‧‧金屬/介電質薄膜濾光劑
5‧‧‧最終毯覆層
為更完整理解本發明之性質及目標，應結合附圖參考以下【實施方式】，其中：圖1為展示本發明較佳實施例之步驟的圖示。
本方法之較佳實施例開始於在晶圓(1)上進行2層剝離微影製程，其由沈積剝離抗蝕劑(lift-off resist，LOR)(2)及1822抗蝕劑(3)(或其他材料，諸如蝕刻相容性金屬或可由熟習此項技術者在閱讀本發明之後確定的抗蝕劑)組成，該微影製程隨後經暴露及顯影以在LOR(2)中形成1-4微米底切結構。接著，用以不完全最終塗層結束之0.25-5微米金屬/介電質薄膜濾光劑(4)塗覆晶圓(1)。接著，使用丙酮或等效物選擇性地剝離任何金屬/介電質薄膜濾光劑(4)過量塗層及1822抗蝕劑(3)層，從而暴露所沈積之金屬/介電質薄膜濾光劑(4)的金屬邊緣且將LOR(2)圖案完整留在晶圓(1)上。此留下圖案化周界比原始LOR(2)底切結構之尺寸大1-4微米之圖案化金屬/介電質薄膜濾光塗層(4)。隨後，沈積最終毯覆層(5)以完成所沈積之薄膜濾光塗層(4)且使金屬層邊緣鈍化。對於一些應用，最終毯覆層沈積(5)亦可由多層堆疊組成。最後，剝離底層(LOR)(2)及過量毯覆層沈積(5)，從而將圖案化特徵留在晶圓(1)上。
此2層製程之步驟如下展示在圖1中：首先用底層(LOR)(2)及頂層(1822抗蝕劑)(3)或其他類似材料之2 層製程使晶圓(1)圖案化，其隨後經暴露及顯影以在LOR(2)中形成1-4微米底切結構。
接著，用蒸發或濺鍍製程來將介電質及金屬濾光層(4)沈積至圖案化晶圓(1)上。
隨後剝離頂部層(1822抗蝕劑)(3)及任何過量介電質及金屬濾光材料(4)，從而將底層(LOR)(2)完整留在晶圓(1)上，且使介電質及金屬濾光層(4)之金屬層邊緣暴露。
隨後在放大之底層(LOR)(2)圖案中沈積最終毯覆式塗層(5)以保護介電質及金屬濾光層(4)之金屬塗層邊緣且完成塗層堆疊(4)及(5)。
隨後剝離底層(LOR)(2)及任何過量最終毯覆式塗層(5)，從而留下圖案化特徵。
因為可在不脫離本文所涉及之本發明範疇的情況下在上文所描述的保護圖案化介電質-金屬塗層之雙塗覆及剝離方法中進行某些變化，因此希望其實施方式中所含有或附圖中所示之所有主題應解釋為說明申請專利範圍而不具限制性意義。
1‧‧‧晶圓
2‧‧‧剝離抗蝕劑/LOR
3‧‧‧1822抗蝕劑
4‧‧‧金屬/介電質薄膜濾光劑
5‧‧‧最終毯覆層

Claims (1)

  1. 一種使用雙層微影製程來保護圖案化介電質-金屬塗層之雙塗覆及剝離方法，包括：首先利用底層剝離抗蝕劑及頂層抗蝕劑之雙層製程使晶圓圖案化；隨後使該圖案化晶圓暴露及顯影以在該剝離抗蝕劑中形成底切結構；接著使用蒸發或濺鍍製程來將介電質及金屬濾光層沈積至該圖案化晶圓上；隨後剝離該頂層抗蝕劑及任何過量沈積介電質及金屬濾光材料，從而將該底層剝離抗蝕劑完整留在該晶圓上，且使該沈積之介電質及金屬濾光劑的任何金屬層邊緣在放大之底層剝離抗蝕劑圖案中暴露；隨後在該放大之底層剝離抗蝕劑圖案內沈積一或多個最終毯覆式塗層以保護該金屬層邊緣且完成塗層堆疊；及隨後剝離該底層剝離抗蝕劑及任何過量最終毯覆式塗層，從而將圖案化特徵留在該晶圓上。
TW105111915A 2015-04-15 2016-04-15 保護圖案化介電金屬塗層之雙塗覆及剝離方法 TWI690978B (zh)

Applications Claiming Priority (6)

Application Number Priority Date Filing Date Title
US201562147776P 2015-04-15 2015-04-15
US62/147,776 2015-04-15
US15/097,342 US9514939B2 (en) 2015-04-15 2016-04-13 Dual coating and lift-off method for protecting patterned dielectric-metal coatings
WOPCT/US16/027190 2016-04-13
US15/097,342 2016-04-13
PCT/US2016/027190 WO2016168232A1 (en) 2015-04-15 2016-04-13 Dual coating and lift-off method for protecting patterned dielectric-metal coatings

Publications (2)

Publication Number Publication Date
TW201642316A true TW201642316A (zh) 2016-12-01
TWI690978B TWI690978B (zh) 2020-04-11

Family

ID=57127170

Family Applications (1)

Application Number Title Priority Date Filing Date
TW105111915A TWI690978B (zh) 2015-04-15 2016-04-15 保護圖案化介電金屬塗層之雙塗覆及剝離方法

Country Status (4)

Country Link
US (1) US9514939B2 (zh)
CA (1) CA2982944C (zh)
TW (1) TWI690978B (zh)
WO (1) WO2016168232A1 (zh)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10256266B2 (en) 2017-04-05 2019-04-09 Omnivision Technologies, Inc. Chip-scale image sensor package and associated method of making

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4238559A (en) * 1978-08-24 1980-12-09 International Business Machines Corporation Two layer resist system
US20040209123A1 (en) * 2003-04-17 2004-10-21 Bajorek Christopher H. Method of fabricating a discrete track recording disk using a bilayer resist for metal lift-off
US20050136648A1 (en) * 2003-12-23 2005-06-23 Mariah Sharma Method and system for forming a contact in a thin-film device
US7648808B2 (en) * 2004-01-12 2010-01-19 Ocean Thin Films, Inc. Patterned coated dichroic filter
US20130252369A1 (en) * 2012-03-20 2013-09-26 Intersil Americas LLC Enhanced lift-off techniques for use when fabricating light sensors including dielectric optical coating filters
US8815102B2 (en) 2012-03-23 2014-08-26 United Microelectronics Corporation Method for fabricating patterned dichroic film
US9515217B2 (en) * 2012-11-05 2016-12-06 Solexel, Inc. Monolithically isled back contact back junction solar cells
US9448346B2 (en) 2012-12-19 2016-09-20 Viavi Solutions Inc. Sensor device including one or more metal-dielectric optical filters
JP2015090380A (ja) * 2013-11-05 2015-05-11 ソニー株式会社 ドライフィルムフォトレジスト、ドライフィルムフォトレジストの製造方法、金属パターン形成方法及び電子部品
CN115980901A (zh) * 2014-06-18 2023-04-18 唯亚威通讯技术有限公司 金属-电介质滤光器、传感器设备及制造方法

Also Published As

Publication number Publication date
US9514939B2 (en) 2016-12-06
US20160307750A1 (en) 2016-10-20
TWI690978B (zh) 2020-04-11
CA2982944A1 (en) 2016-10-20
CA2982944C (en) 2021-05-18
WO2016168232A1 (en) 2016-10-20

Similar Documents

Publication Publication Date Title
CN100594434C (zh) 制具有纳米尺度的大面积由金属膜覆盖的金属结构的方法
JP2006013456A (ja) 少なくとも一つの活性有機層を有する電子構成要素を製造するための装置及び方法
CN104576323A (zh) 一种金属图形化结构及方法
CN101894792A (zh) 一种使用剥离法形成金属图案的方法
JPS60167448A (ja) 集積回路の金属配線方法
TWI690978B (zh) 保護圖案化介電金屬塗層之雙塗覆及剝離方法
JP3818188B2 (ja) マスクパターンの形成方法、該マスクパターンを用いたパターニング方法及び薄膜磁気ヘッドの製造方法
CN106684007B (zh) 一种半导体工艺空气桥的制作方法
EP3283908B1 (en) Dual coating and lift-off method for depositing and protecting patterned dielectric-metal coatings
CN107452600A (zh) 一种复合抗电镀掩模的制备方法
WO2015000272A1 (zh) 裸眼3d功能面板的信号基板及其制造方法以及显示设备
JPS6155797B2 (zh)
CA2992470A1 (en) Lithography process for the encapsulation of patterned thin film coatings
JPH04180231A (ja) 微細バンプ電極を有する半導体装置の製造方法
JPH0312933A (ja) 半導体装置の製造方法
KR101186697B1 (ko) 반도체에 도금 패턴을 형성하는 방법 및 이에 의해 제조된 반도체
JPS61170738A (ja) 多層レジストによるリフト・オフプロセス
CN116206953A (zh) 用于带沟槽晶圆三层胶一次曝光一次显影的金属剥离方法
JPH04324445A (ja) 露光用マスクおよびその製造方法
KR970052887A (ko) 홈 위에 다리를 갖는 반도체 장치의 제조방법
JP3438197B2 (ja) 金属配線膜およびその製造方法
JP2004281329A (ja) 電極パターン形成方法およびディスプレイパネルの製造方法
JPS6032350B2 (ja) 半導体装置の製造方法
JPS63288020A (ja) 電極作成方法
JPS61240661A (ja) 厚膜金属パタ−ンの形成方法