TW201633534A - 混合裝置 - Google Patents

混合裝置 Download PDF

Info

Publication number
TW201633534A
TW201633534A TW104141659A TW104141659A TW201633534A TW 201633534 A TW201633534 A TW 201633534A TW 104141659 A TW104141659 A TW 104141659A TW 104141659 A TW104141659 A TW 104141659A TW 201633534 A TW201633534 A TW 201633534A
Authority
TW
Taiwan
Prior art keywords
region
jfet
hemt
mixing device
drift region
Prior art date
Application number
TW104141659A
Other languages
English (en)
Inventor
安古斯 布萊安特
菲利浦 安卓 摩白
Original Assignee
萊豪森機械工廠有限公司
沃威克風險投資有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 萊豪森機械工廠有限公司, 沃威克風險投資有限公司 filed Critical 萊豪森機械工廠有限公司
Publication of TW201633534A publication Critical patent/TW201633534A/zh

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232—Field-effect technology
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/778—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface
    • H01L29/7788—Vertical transistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/8258—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using a combination of technologies covered by H01L21/8206, H01L21/8213, H01L21/822, H01L21/8252, H01L21/8254 or H01L21/8256
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
    • H01L27/0605—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits made of compound material, e.g. AIIIBV
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
    • H01L27/0688—Integrated circuits having a three-dimensional layout
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
    • H01L27/085—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/10—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
    • H01L27/105—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration including field-effect components
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/26—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, elements provided for in two or more of the groups H01L29/16, H01L29/18, H01L29/20, H01L29/22, H01L29/24, e.g. alloys
    • H01L29/267—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, elements provided for in two or more of the groups H01L29/16, H01L29/18, H01L29/20, H01L29/22, H01L29/24, e.g. alloys in different semiconductor regions, e.g. heterojunctions
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66446—Unipolar field-effect transistors with an active layer made of a group 13/15 material, e.g. group 13/15 velocity modulation transistor [VMT], group 13/15 negative resistance FET [NERFET]
    • H01L29/66462—Unipolar field-effect transistors with an active layer made of a group 13/15 material, e.g. group 13/15 velocity modulation transistor [VMT], group 13/15 negative resistance FET [NERFET] with a heterojunction interface channel or gate, e.g. HFET, HIGFET, SISFET, HJFET, HEMT
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/778—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/778—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface
    • H01L29/7786—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with direct single heterostructure, i.e. with wide bandgap layer formed on top of active layer, e.g. direct single heterostructure MIS-like HEMT
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/16—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic Table
    • H01L29/1608—Silicon carbide
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/20—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
    • H01L29/2003—Nitride compounds
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/80—Field effect transistors with field effect produced by a PN or other rectifying junction gate, i.e. potential-jump barrier
    • H01L29/808—Field effect transistors with field effect produced by a PN or other rectifying junction gate, i.e. potential-jump barrier with a PN junction gate, e.g. PN homojunction gate
    • H01L29/8083—Vertical transistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/13—Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304—Transistor
    • H01L2924/1306—Field-effect transistor [FET]
    • H01L2924/13062—Junction field-effect transistor [JFET]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/13—Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304—Transistor
    • H01L2924/1306—Field-effect transistor [FET]
    • H01L2924/13064—High Electron Mobility Transistor [HEMT, HFET [heterostructure FET], MODFET]

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Junction Field-Effect Transistors (AREA)

Abstract

本發明係有關於一種混合裝置、一種結合JFET以及HEMT裝置之結構、以及一種製造結合JFET以及HEMT裝置之結構之方法，特別是一種包括汲極端、源極端以及閘極端之混合裝置，其中混合裝置包括：一高電子遷移率電晶體(HEMT)；以及一與HEMT串聯耦接之接面場效電晶體(JFET)，其中HEMT以及JFET各自包括一閘極區、一源極傳導區與一汲極傳導區，以及其中JFET之閘極區係耦接至HEMT之一第一所述之傳導區。

Description

混合裝置
本發明係有關於一種例如混合功率半導體裝置之混合裝置、一種結合JFET以及HEMT裝置之結構、以及一種製造結合JFET以及HEMT裝置之結構之方法。
考慮習知高電子遷移率電晶體(High Electron Mobility Transistor，HEMT)、接面場效電晶體(Junction Field Effect Transistor，JFET)以及金氧半場效電晶體(Metal Oxide Semiconductor Field Effect Transistor，MOSFET)，每種裝置型式之屬性係大致如下表列(*代表缺點)：
雙極性裝置已製造於SiC中，但由於操作時基面錯位(basal plane dislocation)之產生，遍及其生命週期仍遭受順向壓降(傳導損失)之增加。
關於GaN HEMT，近年來由於有些成長於Si基板之裝置而有大幅進展(儘管由於GaN與SiC之間良好之晶格匹配，SiC才是較佳之基板)。由於HEMT結構中高遷移率電子氣(electron gas)，傳導損失非常低。然而，由於電流坍塌現象(current collapse)，要獲得具有高於200伏特之崩潰電壓之穩定裝置仍具有挑戰性。此外，容易取得之GaN基板之欠缺，這些裝置受限於使用側向結構，使得高電壓裝置佔用相對大之面積，並且限制了實際上之崩潰電壓。
關於SiC JFET，近年來已經可在市面上購得，且具有低傳導損失。然而，JFET固有之正常開啟模式的操作特性限制了其潛力；有些裝置係使用於與Si MOSFET之串疊操作，以克服此缺點。
關於SiC MOSFET，由於其係為正常關閉之開關並且為垂直型裝置，在功率轉換器上之使用具有優勢，因此具有良好使用效率之裝置面積。然而，由於閘氧化層(SiO2)以及SiC p型井間介面處之缺陷程度，SiC MOSFET之MOS通道傳導(低遷移率)明顯較差。在具有低於1200伏特崩潰電壓之裝置中，通道電阻通常係為一限制因子，其通道電阻大於漂移區電阻。
因此，亟需一種具有以下優點之裝置，特別是，能操作於高溫、高電壓(例如，600至900伏特之額定電壓範圍)及/或高頻，及/或由於，例如，較高崩潰電壓而較穩定、為正常關閉以及/或於操作時消耗較少功率(例如，由於良好之通道傳導)等。
根據本發明之第一態樣，係提供一種混合裝置，包括汲極端、源極端以及閘極端，其中混合裝置包括：高電子遷移率電晶體(HEMT)； 以及接面場效電晶體(JFET)串聯，與HEMT串聯耦接，其中HEMT以及JFET各自包括一閘極區、一源極傳導區與一汲極傳導區，以及其中JFET之閘極區係耦接至HEMT之一第一所述之傳導區。
較佳者(即選擇性地)，混合裝置係為混合功率半導體裝置。HEMT可為正常關閉HEMT，例如，增強模式HEMT。
在實施例中，此裝置可為正常關閉裝置。此裝置可提供，例如，習知HEMT、JFET或MOSFET之改良或替代方案。此裝置可具有600伏特至900伏特之額定電壓範圍，並可適用於，例如，汽車牽引以及/或室內太陽能變流器。例如，此裝置可使用為功率轉換器之功率開關，例如，交流(ac)轉交流、交流轉直流(dc)、直流轉交流或直流轉直流。功率轉換器較佳者包括至少一兩隻相位臂(phase arm)之相位脚(phase leg)，其至少一者具有一或多個混合裝置具體實施例。然而，功率轉換器可，例如，為任何習知形式之切換模式功率供應器(SMPS)，例如，降壓、升壓、順向、馳反、推挽、半或全橋等。此SMPS之任何一或多種主要功率開關可包括以下定義之混合裝置。
在實施例中，JFET之閘極區(即，井區，例如，P型井)可藉由直接相鄰，亦即，與第一傳導區直接接觸，而被耦接至HEMT之第一傳導區(源極或汲極傳導區)。然而，JFET之閘極區以及HEMT之第一傳導區間之電性耦接也可透過接觸區，例如，混合裝置之源極端接觸。
端點之任何一或多者可包括一半導體區以及/或一較佳金屬(例如，金或鋁)接觸、墊、軌道以及/或線等。HEMT以及/或JFET之傳導區之任何一或多者，較佳者，包括一半導體材料。
HEMT可具有異質結構，包括至少一寬能隙半導體材料(wide bandgap(WBG)semiconductor material)。通常，在具體實施例中，任何寬能隙材料具有3eV或更大的能隙。此材料可進一步使用於HEMT之其他區域。異質結構之寬能隙半導體材料可包括GaN。異質結構可包括，例如，GaN、AlGaN、GaAs、AlGaAs、InGaAn以及/或InGaAs。舉例而言，異質結構可具有，例如，形成一二維電子氣之AlGaN-GaN或GaAs-AlGaAs介面。
有利地，此裝置可被實現成垂直結構，例如，至少包括JFET之垂直結構。此垂直結構可相較側向裝置更為精巧，其中，通常所有區域，包括所有端點區，係製造於裝置之單一表面內/上。在垂直JFET結構中，汲極區，漂移區、閘極區以及源極區皆可被製造於不同垂直層(較佳者，閘極區位於漂移區中，而且位於部分漂移區上)。
此異質結構可包括高導電率通道，較佳者，係以二維電子氣(2DEG)之型態呈現。因此，此裝置(至少其HEMT)可具有高通道遷移率。由於異質結構包括寬能隙半導體材料，可允許較高溫、較高電壓以及/或較高頻率下之操作。
同理，JFET，例如，n型通道JFET(較佳者，具有n-型漂移區)，可具有一包括寬能隙半導體材料之漂移區。此材料可進一步使用於JFET之其他區。漂移區之寬帶半導體材料可包括SiC。上述之寬能隙半導體材料可允許較高溫、較高電壓以及/或較高頻率下之操作。
因此，寬能隙半導體可使用於異質結構層以及/或漂移區。
在具體實施例中，JFET之傳導區(例如，源極)中之第一個可被耦接至HEMT之傳導區(例如，汲極)中之第二個。HEMT之第一傳導區 (例如，源極)通常被耦接至JFET之閘極區。此耦接可由區域之直接接觸達成，或者JFET之第一傳導區可與HEMT之第二傳導區共用相同之區域，例如，兩者可同時存在於N+型GaN區內。此耦接可被視為類似串疊電路配置。
可進一步提供之混合裝置，其中該些端之一包括JFET之傳導區之一(較佳者，汲極端包括汲極區)。其他(較佳者，源極端)，較佳者，可直接與HEMT之傳導區之一(較佳者，源極)電性接觸(較佳者，歐姆接觸)。混合裝置之閘極端可包括HEMT之閘極區。
JFET之第一傳導區可包括JFET之源極傳導區。
可進一步提供之混合裝置，其中，HEMT之傳導區中之第二個包括HEMT之汲極區。
根據本發明之另一態樣，係提供一種結合JFET以及HEMT裝置之結構，包括：一垂直JFET結構，包括：一汲極區、耦接至汲極區之漂移區、以及其位於漂移區內並且具有與漂移區相反之導電型式之井區；一HEMT結構，係製造於JFET結構上，HEMT結構包括：一異質結構，其與漂移區以及井區重疊，並且具有連接於漂移區以及井區之間之受限電荷載子區。
類似本發明之第一態樣，具體實施例中之此裝置可為正常關閉之裝置。此裝置可，例如，提供改善或替代方案予習知HEMT、JFET或MOSFET。垂直FET結構可使此裝置顯得精巧以及/或由於減少基板上之覆蓋區面積(footprint/area)而降低成本。
較佳者，結合JFET以及HEMT裝置結構之異質結構層以及/或漂移區包括寬能隙半導體。漂移區可例如，包括SiC，較佳者，係為摻 雜之SiC(例如，n-型摻雜)。
結合JFET以及HEMT裝置之結構可包括：第一傳導區，係連接於井區與受限電荷載子區之第一部分之間，第一傳導區接近井區；以及第二傳導區，係連接於漂移區與受限電荷載子區之第二部分之間，第二傳導區接近漂移區。JFET之源極區可包括第二傳導區。此受限電荷載子區可為二維電子氣(2DEG)。第一傳導區可為異質結構以及源極端間之摻雜區，例如，N+型GaN區。第一傳導區可位於井區(例如，P型井)上方。受限電荷載子區之第一以及第二部分可被視為受限電荷載子區之側向之相對端點。在具體實施例中，第一傳導區可與井區直接相鄰，以及/或第二傳導區可與漂移區直接相鄰。
根據本發明之另一態樣，係提供一種製造結合JFET以及HEMT裝置之結構之方法，包括：形成漂移區於具有第一傳導端之基板上；形成井區於漂移區內，井區具有與漂移區相反之導電型式；沉積一第一寬能隙半導體層於漂移區以及井區上；沉積一第二寬能隙半導體層於第一寬能隙半導體層上；沉積一第二傳導端於井區上；以及沉積一閘極端於第二寬能隙半導體層上。
第一傳導端可例如，包括一SiC汲極區，較佳者係為摻雜之SiC，例如，N+型SiC。井區可藉由摻雜而形成。寬能隙層之一者可為，例如，GaN，以及其他，例如，AlGaN。較佳者，其中之一或兩者可由異質磊晶而長出。結合結構之端點之任何一者可包括例如由蒸鍍所沉積之一接觸。第二傳導端之沉積可包括，例如，藉由電漿或濕式蝕刻事先移除第一以及/或第二寬能隙層之區域。
可進一步提供之方法，包括形成一傳導區於漂移區上並且藉由第一寬能隙半導體層之一區與井區隔離，傳導區具有高於第一寬能隙半導體層之該區之導電率。此傳導區，例如，N+型GaN，可藉由，例如摻雜第一寬能隙半導體層之該區而形成。
較佳具體實施例係定義於所附之專利申請範圍附屬項中。
較佳具體實施例之上述任何一或多態樣以及/或上述任何一或多可選擇之特徵可以任何排列而結合。此外，上述任何方法可被提供作為一對應之裝置，反之亦然。
圖式顯示對照以下符號之元件(其中「；」代表「以及/或」)：
1‧‧‧混合裝置；結合JFET以及HEMT結構
2‧‧‧混合裝置汲極端；JFET汲極(傳導)區；基板；第一傳導端(額外地或可替換地，汲極或第一傳導端可包括，較佳者，金屬接觸(未顯示於圖1中)沉積於區域2上)
3‧‧‧混合裝置源極端；第二傳導端
4‧‧‧混合裝置閘極端；HEMT閘極區
5‧‧‧HEMT
6‧‧‧JFET
7‧‧‧HEMT源極(傳導)區；第一傳導區
8‧‧‧井區；JFET之閘極區
9‧‧‧JFET源極(傳導)區；HEMT汲極傳導區；第二傳導區
10‧‧‧通道；受限電荷載子區
11‧‧‧漂移區
12a，12b‧‧‧異質結構
13‧‧‧第一寬能隙半導體層
14‧‧‧第二寬能隙半導體層
為了有助於理解本發明，並且顯示如何實施本發明，將藉由範例提供以下圖式之說明，其中：圖1顯示一混合GaN-SiC功率裝置之範例結構；圖2顯示一混合GaN-SiC功率裝置之等效電路；圖3a與圖3b分別顯示混合裝置具體實施例之結構以及等效電路；圖4a與圖4b分別顯示垂直Si MOSFET之結構以及等效電路；圖5a至圖5h顯示製造混合GaN-SiC功率裝置之範例製程；圖6顯示具有形成混合裝置步驟之流程圖。基板可被處理而形成一傳導區(例如，汲極區)以及/或對應端接觸。然而，此端接觸可被形成/沉積於任何其他階段，例如，當其他傳導端(例如，源極區)以及/或閘極端之接觸被形成/沉積於「沉積端接觸」階段。(任何端可包括一接觸以及/或半導體區)；以及圖7顯示一範例功率轉換器，包括每一者具有兩相位臂之三相位脚，其 中相位臂之每一功率開關可由一或多個串聯/並聯混合裝置具體實施例所取代。
以下將說明諸如混合寬能隙功率半導體裝置之具體實施例，較佳者，混合GaN-SiC功率裝置。此裝置包括，例如，與SiC JFET相耦接之正常關閉GaN HEMT，較佳者(意即選擇地)，其組態類似於串疊電路。此具體實施例使得垂直SiC功率開關之生產可以進行正常關閉操作之，以及/或具有較低於既有SiC MOSFET之電阻。較佳者，具體實施例具有600至900伏特之額定電壓範圍，此範圍通常可適用於，例如，汽車牽引以及/或室內太陽能變流器。
此裝置之具體實施例由於採用既有之GaN以及SiC裝置技術之優勢，性能上超越既有之Si技術。尤其，本具體實施例可提供與既有之Si功率裝置，諸如，Si IGBT以及/或Si超接面MOSFET，競爭之寬能隙裝置，例如在上述之600至900伏特之額定電壓範圍。
關於寬能隙材料之較佳使用，必須注意到，具有至少3eV之能隙之寬能隙半導體可允許裝置被形成而可相較於習知裝置操作於較高溫、較高電壓以及/或較高頻率下。一般而言，寬能隙功率半導體裝置技術目前已大致聚焦於兩個不同領域：氮化鎵(GaN)與碳化矽(SiC)。
本具體實施例之結構可被視為以(例如，GaN)HEMT取代具有MOS通道之(例如，SiC)MOSFET，較佳者，以克服MOS通道之低遷移率(高電阻)。
概念上，本具體實施例可被視為包括結合一JFET之一 HEMT，其中一JFET傳導區(源極或汲極)係，較佳者，直接耦接至HEMT之傳導區(汲極或源極)，而且JFET之控制區(閘極)係，較佳者，直接耦接至HEMT之其他傳導區。
本具體實施例之基本結構係顯示於圖1中，其等校電路係顯示於圖2中。在圖1中，每一井以及源極區(3，8)可由至少一混合裝置所使用，使得圖1之結構包括兩個井，而且源極可被使用以實施至少兩混合裝置。在本範例中，GaN HEMT係成長於SiC裝置上方；GaN HEMT可有效地控制SiC裝置，較佳者，後者提供關閉狀態時的電壓阻擋。
圖3a與圖3b以及圖4a與圖4b係為混合裝置具體實施例與標準SiC MOSFET之結構以及等效電路之比較。
圖5a至圖5h顯示製造混合GaN-SiC功率裝置之範例製程。
首先，(a)在SiC基板上，(b)以例如磊晶方式成長SiC漂移區(n型)。接著，(c)形成深p型井區於SiC漂移區內。接著，(d)較佳者以異質磊晶方式，成長第一層GaN，並且佈植N+區，以形成通道之歐姆接觸。隨後，(e)較佳者以磊晶方式，完成GaN/AlGaN上層磊晶。接著，(f)蝕刻溝槽，以形成源極接觸。接著，(g)沉積並且圖案化源極金屬。最後，(h)沉積並且圖案化閘極電極。
本具體實施例之優點可包括以下所述之任何一或多者：
‧SiC以及GaN之間的晶格匹配良好，代表可以形成兩者之間高品質介面。
‧SiC以及GaN之間的能隙差異小，阻擋電子流動之異質接面較無作用。
‧不需要提供GaN大塊基板，因為，例如，SiC漂移區可擔任該角色。
‧GaN HEMT裝置可保有側向結構，因此，在具體實施例中，可採用類似類似構造於既有之HEMT裝置。
‧GaN HEMT可為正常關閉(增強模式)，在具體實施例中，如同市售之GaN HEMT。
‧垂直SiC裝置可有效地成為與GaN HEMT耦接之SiC JFET，例如，類似串疊配置。因此，既有之SiC功率JFET中所採用之相同裝置構造可被使用於本具體實施例中，較佳者，GaN HEMT係成長於上方。(請注意，垂直之平面MOSFET可有效地成為與垂直JFET串疊之側向MOS通道，與半導體材料無關。)
‧具有崩潰電壓為600至900伏特之額定電壓範圍之裝置是可實現的，因為本具體實施例之電阻並不受限於SiC MOS之高通道電阻。
‧有必要時，JFET與HEMT皆可操作於高溫下。
上述任何一或多個優點可被提供於具體實施例中，其中SiC以及/或GaN係由不同材料所替換。
毫無疑問，對熟悉本技藝之人士而言，可以產生許多其他有效的替代方案。必須了解，本發明並不限於上述具體實施例，並且涵蓋熟悉本技藝之人士所視為顯而易見之變換於其申請專利範圍內之精神與範 疇內。
2‧‧‧汲極
3‧‧‧源極
4‧‧‧閘極
5‧‧‧GaN側向HEMT
6‧‧‧SiC垂直JFET

Claims (20)

  1. 一種混合裝置，具有一汲極端、一源極端與一閘極端，其中該混合裝置包括：一高電子遷移率電晶體(HEMT)；以及一接面場效電晶體(JFET)，與該HEMT串聯耦接，其中該HEMT以及該JFET各自包括一閘極區、一源極傳導區與一汲極傳導區，以及其中該JFET之該閘極區係耦接至該HEMT之一第一該傳導區。
  2. 根據申請專利範圍第1項所述之混合裝置，其中該HEMT具有一異質結構，其包括一寬能隙半導體材料。
  3. 根據申請專利範圍第2項所述之混合裝置，其中該異質結構之該寬能隙半導體材料包括氮化鎵(GaN)。
  4. 根據上述申請專利範圍任一項所述之混合裝置，其中該JFET具有一漂移區，其包括一寬能隙半導體材料。
  5. 根據上述申請專利範圍任一項所述之混合裝置，其中該漂移區之該寬帶半導體材料包括碳化矽(SiC)。
  6. 根據上述申請專利範圍任一項所述之混合裝置，其中該JFET係為一n通道JFET。
  7. 根據上述申請專利範圍任一項所述之混合裝置，其中該JFET之該傳導區中之第一個係耦接至該HEMT之該傳導區中之第二個。
  8. 根據上述申請專利範圍任一項所述之混合裝置，其中該混合裝置之該汲極端與該源極端之一者包括該JFET之該傳導區之一者，而另一者係與該HEMT之該傳導區之一者接觸，而且其中該混合裝置之該閘極端包括 該HEMT之該閘極區。
  9. 根據上述申請專利範圍任一項所述之混合裝置，其中該JFET之該第一傳導區中之第二個包括該JFET之該源極傳導區。
  10. 根據上述申請專利範圍任一項所述之混合裝置，其中該HEMT之該傳導區中之第二個包括該HEMT之該汲極區。
  11. 根據上述申請專利範圍任一項所述之混合裝置，其中該混合裝置包括一垂直JFET結構。
  12. 根據上述申請專利範圍任一項所述之混合裝置，係可操作於一600伏特至900伏特範圍之源極-汲極電壓。
  13. 一種功率轉換器，包括根據上述申請專利範圍任一項所述之混合裝置，該功率轉換器較佳者具有至少一包括一功率開關之相位臂(phase arm)，其中該功率開關包括該混合裝置。
  14. 一種結合JFET以及HEMT裝置之結構，該結構包括：一垂直JFET結構，其包括：一汲極區；一漂移區，其耦接至該汲極區；以及一井區，其位於該漂移區內並且具有與該漂移區相反之導電型式；一HEMT結構，係製造於該JFET結構上，該HEMT結構包括：一異質結構，其與該漂移區以及該井區重疊並且具有一連接於該漂移區以及該井區之間之受限電荷載子區。
  15. 根據申請專利範圍第14項所述之結合JFET以及HEMT裝置之結構，其中該異質結構以及該漂移區之至少一者包括寬能隙半導體。
  16. 根據申請專利範圍第14項或第15項所述之結合JFET以及HEMT裝置之結構，包括：一第一傳導區，係連接於該井區與該受限電荷載子區之一第一部分之間，該第一傳導區接近該井區；以及一第二傳導區，係連接於該漂移區與該受限電荷載子區之一第二部分之間，該第二傳導區接近該漂移區。
  17. 根據申請專利範圍第16項所述之結合JFET以及HEMT裝置之結構，其中該JFET之一源極區包括該第二傳導區。
  18. 一種製造結合JFET以及HEMT裝置之結構之方法，包括：形成一漂移區於一具有一第一傳導端之基板上；形成一井區於該漂移區，該井區具有與該漂移區相反之導電型式；沉積一第一寬能隙半導體層於該漂移區以及該井區上；沉積一第二寬能隙半導體層於該第一寬能隙半導體層上；沉積一第二傳導端於該井區上；以及沉積一閘極端於該第二寬能隙半導體層上。
  19. 根據申請專利範圍第18項所述之方法，包括形成一傳導區於該漂移區上並且藉由該第一寬能隙半導體層之一區與該井區隔離，該傳導區具有高於該第一寬能隙半導體層之該區之導電率。
  20. 一種混合裝置，係如以上所述及/或圖式。
TW104141659A 2014-12-12 2015-12-11 混合裝置 TW201633534A (zh)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB1422127.9A GB2534544A (en) 2014-12-12 2014-12-12 Hybrid device

Publications (1)

Publication Number Publication Date
TW201633534A true TW201633534A (zh) 2016-09-16

Family

ID=54843856

Family Applications (1)

Application Number Title Priority Date Filing Date
TW104141659A TW201633534A (zh) 2014-12-12 2015-12-11 混合裝置

Country Status (3)

Country Link
GB (1) GB2534544A (zh)
TW (1) TW201633534A (zh)
WO (1) WO2016092031A1 (zh)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109904216A (zh) * 2019-01-28 2019-06-18 西安电子科技大学 具有AlGaN/GaN异质结的垂直型场效应晶体管及其制作方法
CN111199972A (zh) * 2018-11-16 2020-05-26 深圳比亚迪微电子有限公司 集成级联器件及其制备方法

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6461063B2 (ja) * 2016-09-28 2019-01-30 トヨタ自動車株式会社 半導体装置とその製造方法
TWI615970B (zh) * 2016-12-29 2018-02-21 新唐科技股份有限公司 半導體元件
US11393806B2 (en) 2019-09-23 2022-07-19 Analog Devices, Inc. Gallium nitride and silicon carbide hybrid power device

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5693831B2 (ja) * 2008-08-15 2015-04-01 トヨタ自動車株式会社 トランジスタ
US9312343B2 (en) * 2009-10-13 2016-04-12 Cree, Inc. Transistors with semiconductor interconnection layers and semiconductor channel layers of different semiconductor materials
US8598937B2 (en) * 2011-10-07 2013-12-03 Transphorm Inc. High power semiconductor electronic components with increased reliability
US9059199B2 (en) * 2013-01-07 2015-06-16 Avogy, Inc. Method and system for a gallium nitride vertical transistor

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111199972A (zh) * 2018-11-16 2020-05-26 深圳比亚迪微电子有限公司 集成级联器件及其制备方法
CN109904216A (zh) * 2019-01-28 2019-06-18 西安电子科技大学 具有AlGaN/GaN异质结的垂直型场效应晶体管及其制作方法
CN109904216B (zh) * 2019-01-28 2021-09-28 西安电子科技大学 具有AlGaN/GaN异质结的垂直型场效应晶体管及其制作方法

Also Published As

Publication number Publication date
WO2016092031A1 (en) 2016-06-16
GB2534544A (en) 2016-08-03

Similar Documents

Publication Publication Date Title
US9214517B2 (en) Semiconductor device using 2-dimensional electron gas and 2-dimensional hole gas and method of manufacturing the semiconductor device
JP5738798B2 (ja) トランジスタ装置
US9876102B2 (en) Semiconductor device with multiple carrier channels
US9293538B2 (en) Diode having trenches in a semiconductor region
CN108028273B (zh) 半导体装置和制造半导体装置的方法
CN103367356B (zh) 具有氮化物层的半导体元件
JP5731687B2 (ja) 窒化物半導体素子及びその製造方法
TW201633534A (zh) 混合裝置
JP2015037190A (ja) 相補型窒化ガリウム集積回路及びそれらの作製方法
TW200924201A (en) Gallium nitride diodes and integrated components
WO2008021544A2 (en) High breakdown enhancement mode gallium nitride based high electron mobility transistors with integrated slant field plate
JP2015043414A (ja) 高電圧ｉｖ族イナーブルスイッチを備えるモノリシック複合ｉｉｉ族窒化物トランジスタ
JP2014078710A (ja) 高電子移動度トランジスタ及びその駆動方法
KR101672396B1 (ko) 4원계 질화물 전력반도체소자 및 이의 제조 방법
CN108807510B (zh) 一种逆阻型氮化镓高电子迁移率晶体管
US10505032B2 (en) Semiconductor device with III-nitride channel region and silicon carbide drift region
KR20150065005A (ko) 노멀리 오프 고전자이동도 트랜지스터
JP2014107566A (ja) フッ化物系または塩化物系化合物を含むゲート誘電体を備えたｉｉｉ族窒化物系トランジスタ
CN105261656A (zh) 形成在氮化物半导体基板上的肖特基势垒二极管
CN108831932B (zh) 一种氮化镓横向mis-肖特基混合阳极二极管
CN104167440A (zh) 一种增强型AlGaN/GaN异质结场效应晶体管
JP2014022701A (ja) 縦型半導体装置およびその製造方法
KR102067596B1 (ko) 질화물 반도체 소자 및 그 제조 방법
CN105742348A (zh) 兼容hemt的横向整流器结构
JP2013183034A (ja) 電力用半導体装置