TW201627439A - 半導體用接著劑以及半導體裝置及其製造方法 - Google Patents

半導體用接著劑以及半導體裝置及其製造方法 Download PDF

Info

Publication number
TW201627439A
TW201627439A TW104140706A TW104140706A TW201627439A TW 201627439 A TW201627439 A TW 201627439A TW 104140706 A TW104140706 A TW 104140706A TW 104140706 A TW104140706 A TW 104140706A TW 201627439 A TW201627439 A TW 201627439A
Authority
TW
Taiwan
Prior art keywords
semiconductor
adhesive
semiconductor device
manufacturing
component
Prior art date
Application number
TW104140706A
Other languages
English (en)
Other versions
TWI679263B (zh
Inventor
本田一尊
永井朗
佐藤慎
茶花幸一
小野敬司
Original Assignee
日立化成股份有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 日立化成股份有限公司 filed Critical 日立化成股份有限公司
Publication of TW201627439A publication Critical patent/TW201627439A/zh
Application granted granted Critical
Publication of TWI679263B publication Critical patent/TWI679263B/zh

Links

Classifications

    • C—CHEMISTRY; METALLURGY
    • C09—DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09J—ADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
    • C09J4/00—Adhesives based on organic non-macromolecular compounds having at least one polymerisable carbon-to-carbon unsaturated bond ; adhesives, based on monomers of macromolecular compounds of groups C09J183/00 - C09J183/16
    • C09J4/06—Organic non-macromolecular compounds having at least one polymerisable carbon-to-carbon unsaturated bond in combination with a macromolecular compound other than an unsaturated polymer of groups C09J159/00 - C09J187/00
    • C—CHEMISTRY; METALLURGY
    • C09—DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09J—ADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
    • C09J7/00—Adhesives in the form of films or foils
    • C09J7/10—Adhesives in the form of films or foils without carriers
    • C—CHEMISTRY; METALLURGY
    • C09—DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09D—COATING COMPOSITIONS, e.g. PAINTS, VARNISHES OR LACQUERS; FILLING PASTES; CHEMICAL PAINT OR INK REMOVERS; INKS; CORRECTING FLUIDS; WOODSTAINS; PASTES OR SOLIDS FOR COLOURING OR PRINTING; USE OF MATERIALS THEREFOR
    • C09D4/00—Coating compositions, e.g. paints, varnishes or lacquers, based on organic non-macromolecular compounds having at least one polymerisable carbon-to-carbon unsaturated bond ; Coating compositions, based on monomers of macromolecular compounds of groups C09D183/00 - C09D183/16
    • C09D4/06—Organic non-macromolecular compounds having at least one polymerisable carbon-to-carbon unsaturated bond in combination with a macromolecular compound other than an unsaturated polymer of groups C09D159/00 - C09D187/00
    • C—CHEMISTRY; METALLURGY
    • C09—DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09J—ADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
    • C09J11/00—Features of adhesives not provided for in group C09J9/00, e.g. additives
    • C09J11/08—Macromolecular additives
    • C—CHEMISTRY; METALLURGY
    • C09—DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09J—ADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
    • C09J201/00—Adhesives based on unspecified macromolecular compounds
    • C—CHEMISTRY; METALLURGY
    • C09—DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09J—ADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
    • C09J7/00—Adhesives in the form of films or foils
    • C—CHEMISTRY; METALLURGY
    • C09—DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09J—ADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
    • C09J7/00—Adhesives in the form of films or foils
    • C09J7/20—Adhesives in the form of films or foils characterised by their carriers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/563—Encapsulation of active face of flip-chip device, e.g. underfilling or underencapsulation of flip-chip, encapsulation preform on chip or mounting substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/29—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H01L24/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L24/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L24/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/065—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/065—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L25/0657—Stacked arrangements of devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/07—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/07—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00
    • H01L25/074—Stacked arrangements of non-apertured devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/18—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different subgroups of the same main group of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/50—Multistep manufacturing processes of assemblies consisting of devices, each device being of a type provided for in group H01L27/00 or H01L29/00
    • C—CHEMISTRY; METALLURGY
    • C09—DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09J—ADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
    • C09J2203/00—Applications of adhesives in processes or use of adhesives in the form of films or foils
    • C09J2203/326—Applications of adhesives in processes or use of adhesives in the form of films or foils for bonding electronic components such as wafers, chips or semiconductors
    • C—CHEMISTRY; METALLURGY
    • C09—DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09J—ADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
    • C09J2433/00—Presence of (meth)acrylic polymer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/05001—Internal layers
    • H01L2224/05099—Material
    • H01L2224/051—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/05117—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
    • H01L2224/05124—Aluminium [Al] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/05001—Internal layers
    • H01L2224/05099—Material
    • H01L2224/051—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/05138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/05147—Copper [Cu] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/05599—Material
    • H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/05601—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
    • H01L2224/05611—Tin [Sn] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/05599—Material
    • H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/05638—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/05644—Gold [Au] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/05599—Material
    • H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/05638—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/05655—Nickel [Ni] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001—Core members of the bump connector
    • H01L2224/13075—Plural core members
    • H01L2224/1308—Plural core members being stacked
    • H01L2224/13082—Two-layer arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001—Core members of the bump connector
    • H01L2224/13099—Material
    • H01L2224/131—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/13101—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001—Core members of the bump connector
    • H01L2224/13099—Material
    • H01L2224/131—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/13101—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
    • H01L2224/13111—Tin [Sn] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001—Core members of the bump connector
    • H01L2224/13099—Material
    • H01L2224/131—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/13138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/13144—Gold [Au] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001—Core members of the bump connector
    • H01L2224/13099—Material
    • H01L2224/131—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/13138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/13147—Copper [Cu] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001—Core members of the bump connector
    • H01L2224/13099—Material
    • H01L2224/131—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/13138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/13155—Nickel [Ni] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16135—Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/16145—Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29199—Material of the matrix
    • H01L2224/2929—Material of the matrix with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298—Fillers
    • H01L2224/29299—Base material
    • H01L2224/29386—Base material with a principal constituent of the material being a non metallic, non metalloid inorganic material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298—Fillers
    • H01L2224/29299—Base material
    • H01L2224/2939—Base material with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73201—Location after the connecting process on the same surface
    • H01L2224/73203—Bump and layer connectors
    • H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
    • H01L2224/7525—Means for applying energy, e.g. heating means
    • H01L2224/75251—Means for applying energy, e.g. heating means in the lower part of the bonding apparatus, e.g. in the apparatus chuck
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
    • H01L2224/7525—Means for applying energy, e.g. heating means
    • H01L2224/75252—Means for applying energy, e.g. heating means in the upper part of the bonding apparatus, e.g. in the bonding head
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/812—Applying energy for connecting
    • H01L2224/81201—Compression bonding
    • H01L2224/81203—Thermocompression bonding, e.g. diffusion bonding, pressure joining, thermocompression welding or solid-state welding
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/818—Bonding techniques
    • H01L2224/81801—Soldering or alloying
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/831—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector the layer connector being supplied to the parts to be connected in the bonding apparatus
    • H01L2224/83101—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector the layer connector being supplied to the parts to be connected in the bonding apparatus as prepeg comprising a layer connector, e.g. provided in an insulating plate member
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838—Bonding techniques
    • H01L2224/8385—Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
    • H01L2224/83855—Hardening the adhesive by curing, i.e. thermosetting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838—Bonding techniques
    • H01L2224/8385—Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
    • H01L2224/83855—Hardening the adhesive by curing, i.e. thermosetting
    • H01L2224/83862—Heat curing
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
    • H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
    • H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L2225/06503—Stacked arrangements of devices
    • H01L2225/0651—Wire or wire-like electrical connections from device to substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
    • H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
    • H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L2225/06503—Stacked arrangements of devices
    • H01L2225/06513—Bump or bump-like direct electrical connections between devices, e.g. flip-chip connection, solder bumps
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
    • H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
    • H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L2225/06503—Stacked arrangements of devices
    • H01L2225/06541—Conductive via connections through the device, e.g. vertical interconnects, through silicon via [TSV]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/35—Mechanical effects
    • H01L2924/351—Thermal stress
    • H01L2924/3511—Warping

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Chemical & Material Sciences (AREA)
  • Organic Chemistry (AREA)
  • Manufacturing & Machinery (AREA)
  • Life Sciences & Earth Sciences (AREA)
  • Materials Engineering (AREA)
  • Wood Science & Technology (AREA)
  • Wire Bonding (AREA)
  • Adhesives Or Adhesive Processes (AREA)
  • Adhesive Tapes (AREA)

Abstract

本發明的半導體用接著劑是於將半導體晶片及配線電路基板各自的連接部彼此電性連接而成的半導體裝置、或將多個半導體晶片各自的連接部彼此電性連接而成的半導體裝置中，用於所述連接部的密封，並且所述半導體用接著劑含有(甲基)丙烯酸系化合物及硬化劑，於200℃下保持5秒時的硬化反應率為80%以上。

Description

半導體用接著劑以及半導體裝置及其製造方法
本發明是有關於一種半導體用接著劑以及半導體裝置及其製造方法。
以前，於將半導體晶片（chip）與基板連接時，一直廣泛地應用使用金線等金屬細線的打線接合（wire bonding）方式。而且，為了應對針對半導體裝置的高功能·高積體·高速化等要求，逐漸推廣覆晶（flip chip）連接方式（FC連接方式），該覆晶連接方式於半導體晶片或基板上形成被稱為凸塊（bump）的導電性凸起，於半導體晶片與基板間直接連接。
覆晶連接方式例如已知有以下方法：使用焊料、錫、金、銀、銅等進行金屬接合的方法；施加超音波振動而進行金屬接合的方法；藉由樹脂的收縮力來保持機械接觸的方法等。就連接部的可靠性的觀點而言，通常採用使用焊料、錫、金、銀、銅等進行金屬接合的方法。
例如於半導體晶片與基板間的連接時，球柵陣列（Ball Grid Array，BGA）、晶片尺寸封裝（Chip Size Package，CSP）等中盛行使用的板上晶片（Chip On Board，COB）型的連接方式亦為覆晶連接方式。另外，覆晶連接方式亦被廣泛地用於在半導體晶片上形成凸塊或配線而於半導體晶片間連接的疊層晶片（Chip On Chip，COC）型連接方式（例如參照下述專利文獻1）。
於強烈要求進一步小型化、薄型化或高功能化的封裝中，將上述的連接方式積層或多階化而成的晶片堆疊型封裝及疊層封裝（Package On Package，POP）；矽穿孔（Through-Silicon Via，TSV）等亦開始廣泛普及。藉由以立體狀而非平面狀進行配置，可減小封裝，故該些技術多被使用於半導體性能的提高、雜訊減少、安裝面積的削減及在省電化方面亦有效，作為新一代的半導體配線技術而受到關注。 [現有技術文獻] [專利文獻]
[專利文獻1]日本專利特開2008-294382號公報
[發明所欲解決之課題]
於覆晶封裝中，近年來進一步往高功能化及高積體化發展，但隨著高功能化及高積體化而使配線間的間距變窄，故連接可靠性容易降低。
另外，近年來就提高生產性的觀點而言，要求使覆晶封裝的組裝時的壓接時間為短時間。於該情形時，若壓接中半導體用接著劑未充分硬化，則無法充分地保護連接部，於壓接的壓力放開時會產生連接不良。進而，於連接部中使用焊料的情形時，若壓接中半導體用接著劑於較焊料熔融溫度低的溫度範圍內未充分硬化，則壓接時的溫度到達焊料熔融溫度時會產生焊料的飛散或流動而產生連接不良。因此，為了抑制該些連接不良，需尋求優異的連接可靠性。
因此，本發明的目的在於提供一種即便壓接時間為短時間亦連接可靠性優異的半導體用接著劑。另外，本發明的目的在於提供一種即便壓接時間為短時間亦連接可靠性優異的半導體裝置的製造方法。進而，本發明的目的在於提供一種藉由所述半導體裝置的製造方法所得的半導體裝置。 [解決課題之手段]
本發明的半導體用接著劑是於將半導體晶片及配線電路基板各自的連接部彼此電性連接而成的半導體裝置、或將多個半導體晶片各自的連接部彼此電性連接的半導體裝置中，用於所述連接部的密封，並且所述半導體用接著劑含有(甲基)丙烯酸系化合物及硬化劑，於200℃下保持5秒時的硬化反應率為80%以上。
本發明的半導體用接著劑即便壓接時間為短時間亦連接可靠性優異。根據本發明的半導體用接著劑，可實現壓接時間的短時間化，故可提高生產性。另外，根據本發明的半導體用接著劑，可使覆晶封裝容易地高功能化及高積體化。
再者，現有的半導體用接著劑若於半導體用接著劑未充分硬化的狀態下經高溫壓接，則有時產生孔隙（void）。相對於此，根據本發明的半導體用接著劑，因可於短時間內充分地硬化，故可容易地抑制孔隙的產生。
另外，近年來作為連接部的金屬，以低成本化為目的而由不易腐蝕的金等逐漸轉向焊料、銅等。進而，關於配線及凸塊的表面處理，亦以低成本化為目的而由不易腐蝕的金等逐漸轉向焊料、銅、有機可焊性保護層（Organic Solderability Preservative，OSP）處理等。於覆晶封裝中，除了窄間距及多針腳化以外亦推進此種低成本化，故有使用容易腐蝕而絕緣性降低的金屬的傾向，絕緣可靠性容易降低。相對於此，根據本發明的半導體用接著劑，可抑制絕緣可靠性降低。
所述半導體用接著劑較佳為更含有重量平均分子量10000以上的高分子成分。所述半導體用接著劑較佳為所述高分子成分的重量平均分子量為30000以上、且所述高分子成分的玻璃轉移溫度為100℃以下的態樣。
所述半導體用接著劑亦可為膜狀。
所述(甲基)丙烯酸系化合物較佳為於25℃下為固體。
所述硬化劑較佳為熱自由基產生劑。所述硬化劑較佳為過氧化物。
本發明的半導體裝置的製造方法的第1實施形態是使用本發明的半導體用接著劑。根據此種製造方法，可於短時間內製造連接可靠性優異的大量半導體裝置。
本發明的半導體裝置的第1實施形態是藉由第1實施形態的半導體裝置的製造方法而獲得。
本發明的半導體裝置的製造方法的第2實施形態包括以下步驟：經由半導體用接著劑將半導體晶片及配線電路基板彼此連接，並且將所述半導體晶片及所述配線電路基板各自的連接部彼此電性連接，而獲得半導體裝置的步驟；或經由半導體用接著劑將多個半導體晶片彼此連接，並且將所述多個半導體晶片各自的連接部彼此電性連接，而獲得半導體裝置的步驟；並且所述半導體用接著劑含有(甲基)丙烯酸系化合物及硬化劑，於200℃下保持5秒時的所述半導體用接著劑的硬化反應率為80%以上。
第2實施形態的半導體裝置的製造方法即便壓接時間為短時間亦連接可靠性優異。根據此種製造方法，可於短時間內製造連接可靠性優異的大量半導體裝置。另外，根據第2實施形態的半導體裝置的製造方法，可使覆晶封裝容易地高功能化及高積體化。
再者，現有的半導體裝置的製造方法中，若於半導體用接著劑未充分硬化的狀態下進行高溫壓接，則有時會產生孔隙。相對於此，根據第2實施形態的半導體裝置的製造方法，因半導體用接著劑可於短時間內充分硬化，故可容易地抑制孔隙的產生。
另外，近年來作為連接部的金屬，以低成本化為目的而由不易腐蝕的金等逐漸轉向焊料、銅等。進而，關於配線及凸塊的表面處理，亦以低成本化為目的而由不易腐蝕的金等逐漸轉向焊料、銅、有機可焊性保護層（Organic Solderability Preservative，OSP）處理等。覆晶封裝中，除了窄間距及多針腳化以外亦推進此種低成本化，故有使用容易腐蝕而絕緣性降低的金屬的傾向，絕緣可靠性容易降低。相對於此，根據第2實施形態的半導體裝置的製造方法，可抑制絕緣可靠性降低。
第2實施形態的半導體裝置的製造方法中，所述半導體用接著劑較佳為更含有重量平均分子量10000以上的高分子成分。所述半導體用接著劑較佳為所述高分子成分的重量平均分子量為30000以上、且所述高分子成分的玻璃轉移溫度為100℃以下的態樣。所述半導體用接著劑亦可為膜狀。
第2實施形態的半導體裝置的製造方法亦可為藉由金屬接合將所述連接部彼此連接的態樣。
第2實施形態的半導體裝置的製造方法中，所述(甲基)丙烯酸系化合物較佳為於25℃下為固體。
第2實施形態的半導體裝置的製造方法中，所述硬化劑較佳為熱自由基產生劑。所述硬化劑較佳為過氧化物。
本發明的半導體裝置的第2實施形態是藉由第2實施形態的半導體裝置的製造方法而獲得。 [發明的效果]
根據本發明，可提供一種即便壓接時間為短時間亦連接可靠性優異的半導體用接著劑。另外，根據本發明，可提供一種使用此種半導體用接著劑的半導體裝置及其製造方法。根據本發明，可提供一種即便壓接時間為短時間亦連接可靠性優異的半導體裝置的製造方法、及藉由該製造方法所得的半導體裝置。本發明可提供一種於將半導體晶片及配線電路基板各自的連接部彼此電性連接而成的半導體裝置、或將多個半導體晶片各自的連接部彼此電性連接而成的半導體裝置中，將半導體用接著劑用於所述連接部的密封的應用。
以下，對本發明的實施形態加以詳細說明。再者，本說明書中，所謂「(甲基)丙烯酸」是指丙烯酸或與其相對應的甲基丙烯酸。「(甲基)丙烯酸酯」等其他類似的表述亦相同。另外，關於組成物中的各成分的含量，於組成物中存在多種相當於各成分的物質的情形時，只要無特別說明，則是指存在於組成物中的該多種物質的合計量。所謂「A或B」，是指可含有A及B的任一者，亦可一併含有兩者。
＜半導體用接著劑＞ 本實施形態的半導體用接著劑可用作如下半導體密封用接著劑，即，於將半導體晶片及配線電路基板各自的連接部彼此電性連接而成的半導體裝置、或將多個半導體晶片各自的連接部彼此電性連接而成的半導體裝置中，用於所述連接部的密封的半導體密封用接著劑。本實施形態的半導體用接著劑含有（a）(甲基)丙烯酸系化合物及（b）硬化劑。將本實施形態的半導體用接著劑於200℃下保持5秒時的硬化反應率為80%以上。
（（a）成分：(甲基)丙烯酸系化合物） （a）成分只要為於分子內具有一個以上的(甲基)丙烯酸基（(甲基)丙烯醯基）的化合物，則並無特別限制，例如可使用：含有雙酚A型、雙酚F型、萘型、苯酚酚醛清漆型、甲酚酚醛清漆型、苯酚芳烷基型、聯苯型、三苯基甲烷型、二環戊二烯型、茀型、金剛烷型或異三聚氰酸型的骨架的(甲基)丙烯酸系化合物；各種多官能(甲基)丙烯酸系化合物（將含有所述骨架的(甲基)丙烯酸系化合物除外）等。多官能(甲基)丙烯酸系化合物可列舉：季戊四醇三(甲基)丙烯酸酯、二季戊四醇五(甲基)丙烯酸酯、三羥甲基丙烷二(甲基)丙烯酸酯等。就耐熱性優異的觀點而言，（a）成分較佳為含有雙酚A型骨架、雙酚F型骨架、萘型骨架、茀型骨架、金剛烷型骨架、異三聚氰酸型骨架的(甲基)丙烯酸酯。（a）成分可單獨使用一種或併用兩種以上。
就抑制硬化成分變少、容易充分控制硬化後的樹脂流動的觀點而言，以半導體用接著劑的總量（固體成分總體）為基準，（a）成分的含量較佳為10質量%以上，更佳為15質量%以上。就抑制硬化物變得過硬、容易抑制封裝的翹曲變大的傾向的觀點而言，以半導體用接著劑的總量（固體成分總體）為基準，（a）成分的含量較佳為50質量%以下，更佳為40質量%以下。就該些觀點而言，以半導體用接著劑的總量（固體成分總體）為基準，（a）成分的含量較佳為10質量%～50質量%，更佳為15質量%～40質量%。
（a）成分較佳為於室溫（25℃）下為固體。與液狀相比，固體的情況下不易產生孔隙，另外，硬化前（B階）的半導體用接著劑的黏性（tack）小而操作性優異。於室溫（25℃）下為固體的（a）成分可列舉：含有雙酚A型骨架、茀型骨架、金剛烷型骨架、異三聚氰酸骨架的(甲基)丙烯酸酯等。
（a）成分中的(甲基)丙烯酸基的官能基數較佳為3以下。若官能基數為3以下，則抑制官能基數變多，容易充分地進行短時間內的硬化，故容易抑制硬化反應率降低（官能基數多的情況下，硬化的網路（network）急速擴展，有時殘存未反應基）。
（a）成分的平均分子量較佳為小於10000，更佳為5000以下。分子量小的情況下容易反應，反應率高。
（（b）成分：硬化劑） （b）成分只要作為（a）成分的硬化劑而發揮功能，則並無特別限制。硬化系較佳為自由基聚合。（b）成分較佳為自由基產生劑。自由基產生劑可列舉熱自由基產生劑（利用熱的自由基產生劑）、光自由基產生劑（利用光的自由基產生劑）等。就操作性優異的觀點而言，（b）成分較佳為熱自由基產生劑。（b）成分可單獨使用一種或併用兩種以上。
熱自由基產生劑可列舉偶氮化合物、過氧化物（有機過氧化物等）等。就操作性及保存穩定性優異的觀點而言，熱自由基產生劑較佳為過氧化物，更佳為有機過氧化物。有機過氧化物可列舉：過氧化酮、過氧化縮酮、氫過氧化物、二烷基過氧化物、二醯基過氧化物、過氧化二碳酸酯、過氧化酯等。就保存穩定性優異的觀點而言，有機過氧化物較佳為選自由氫過氧化物、二烷基過氧化物及過氧化酯所組成的組群中的至少一種。進而，就耐熱性優異的觀點而言，有機過氧化物較佳為選自由氫過氧化物及二烷基過氧化物所組成的組群中的至少一種。二烷基過氧化物可列舉二枯基過氧化物(Dicumyl peroxide)、二-第三丁基過氧化物等。
就容易充分地進行硬化的觀點而言，相對於（a）成分100質量份，（b）成分的含量較佳為0.5質量份以上，更佳為1質量份以上。就存在如下傾向的觀點而言，即，抑制硬化急遽地進行而使反應點變多的情況，藉此分子鏈變短，以及抑制未反應基殘存，故容易抑制可靠性降低的傾向，相對於（a）成分100質量份，（b）成分的含量較佳為10質量份以下，更佳為5質量份以下。就該些觀點而言，相對於（a）成分100質量份，（b）成分的含量較佳為0.5質量份～10質量份，更佳為1質量份～5質量份。
（（c）成分：高分子成分） 本實施形態的半導體用接著劑可更含有高分子成分（將相當於（a）成分的化合物及相當於（d）成分的化合物除外）。（c）成分可列舉：環氧樹脂、苯氧基樹脂、聚醯亞胺樹脂、聚醯胺樹脂、聚碳二醯亞胺樹脂、氰酸酯樹脂、(甲基)丙烯酸系樹脂、聚酯樹脂、聚乙烯樹脂、聚醚碸樹脂、聚醚醯亞胺樹脂、聚乙烯基縮醛樹脂、胺基甲酸酯樹脂、丙烯酸系橡膠等，其中，就耐熱性及膜形成性優異的觀點而言，較佳為選自由環氧樹脂、苯氧基樹脂、聚醯亞胺樹脂、(甲基)丙烯酸系樹脂、丙烯酸系橡膠、氰酸酯樹脂及聚碳二醯亞胺樹脂所組成的組群中的至少一種，更佳為選自由環氧樹脂、苯氧基樹脂、聚醯亞胺樹脂、(甲基)丙烯酸系樹脂及丙烯酸系橡膠所組成的組群中的至少一種。（c）成分可單獨使用一種或以兩種以上的混合物或共聚物的形式使用。
（c）成分與（a）成分之質量比並無特別限制，較佳為下述範圍。就抑制硬化性降低、容易抑制接著力降低的觀點而言，相對於（c）成分1質量份，（a）成分的含量較佳為0.01質量份以上，更佳為0.05質量份以上，進而佳為0.1質量份以上。就容易抑制膜形成性降低的觀點而言，相對於（c）成分1質量份，（a）成分的含量較佳為10質量份以下，更佳為5質量份以下。就該些觀點而言，相對於（c）成分1質量份，（a）成分的含量較佳為0.01質量份～10質量份，更佳為0.05質量份～5質量份，進而佳為0.1質量份～5質量份。
就半導體用接著劑對基板或晶片的貼附性優異的觀點而言，（c）成分的玻璃轉移溫度（Tg）較佳為120℃以下，更佳為100℃以下，進而佳為85℃以下。於為該些範圍的情形時，有如下傾向：可藉由半導體用接著劑而容易地填埋形成於半導體晶片上的凸塊、形成於基板上的電極或配線圖案等的凹凸（容易抑制硬化反應開始），容易抑制氣泡殘存而產生孔隙的情況。再者，所述Tg為使用示差掃描熱析儀（Differential Scanning Calorimetry，DSC）（帕金艾爾瑪（Perkin Elmer）公司製造，商品名：DSC-7型）於樣品量10 mg、升溫速度10℃/分、測定環境：空氣的條件下測定時的Tg。
（c）成分的重量平均分子量以聚苯乙烯換算計而較佳為10000以上，為了單獨地顯示出良好的膜形成性，更佳為30000以上，進而佳為40000以上，尤佳為50000以上。於重量平均分子量為10000以上的情形時，有容易抑制膜形成性降低的傾向。再者，本說明書中，所謂重量平均分子量，是指使用高效液相層析儀（島津製作所股份有限公司製造，商品名：C-R4A）藉由聚苯乙烯換算進行測定時的重量平均分子量。測定時，例如可使用下述條件。 檢測器：LV4000紫外線（Ultraviolet，UV）檢測器（Detector）（日立製作所股份有限公司製造，商品名） 泵：L6000泵（Pump）（日立製作所股份有限公司製造，商品名） 管柱：吉爾帕（Gelpack）GL-S300MDT-5（共計2根）（日立化成股份有限公司製造，商品名） 溶離液：THF/DMF=1/1（體積比）+LiBr（0.03 mol/L）+H3 PO4 （0.06 mol/L） 流量：1 mL/分
（（d）成分：填料） 本實施形態的半導體用接著劑為了控制黏度或硬化物的物性、及為了進一步抑制將半導體晶片與基板連接時的孔隙的產生或吸濕率，亦可更含有填料。（d）成分可列舉無機填料（無機粒子）、樹脂填料（樹脂粒子）等。無機填料可列舉：玻璃、二氧化矽、氧化鋁、氧化鈦、碳黑、雲母、氮化硼等絕緣性無機填料，其中，較佳為選自由二氧化矽、氧化鋁、氧化鈦及氮化硼所組成的組群中的至少一種，更佳為選自由二氧化矽、氧化鋁及氮化硼所組成的組群中的至少一種。絕緣性無機填料亦可為晶鬚（whisker）。晶鬚可列舉硼酸鋁、鈦酸鋁、氧化鋅、矽酸鈣、硫酸鎂、氮化硼等。樹脂填料可列舉聚胺基甲酸酯、聚醯亞胺等。樹脂填料與無機填料相比，可於260℃等高溫下賦予柔軟性，故適於提高耐回焊性，並且因可賦予柔軟性，故於提高膜形成性的方面亦有效果。（d）成分可單獨使用一種或併用兩種以上。（d）成分的形狀、粒徑及含量並無特別限制。
就絕緣可靠性更優異的觀點而言，（d）成分較佳為絕緣性。本實施形態的半導體用接著劑較佳為不含銀填料、焊料填料等導電性的金屬填料（金屬粒子）。
（d）成分的物性亦可藉由表面處理而適當調整。就分散性或接著力提高的觀點而言，（d）成分較佳為實施了表面處理的填料。表面處理劑可列舉：縮水甘油基系（環氧系）、胺系、苯基系、苯基胺基系、(甲基)丙烯酸系、乙烯基系的化合物等。
就表面處理的容易度而言，表面處理較佳為利用環氧矽烷系、胺基矽烷系、丙烯酸矽烷系等矽烷化合物的矽烷處理。就分散性、流動性及接著力優異的觀點而言，表面處理劑較佳為選自由縮水甘油基系的化合物、苯基胺基系的化合物及(甲基)丙烯酸系的化合物所組成的組群中的至少一種。就保存穩定性優異的觀點而言，表面處理劑較佳為選自由苯基系的化合物及(甲基)丙烯酸系的化合物所組成的組群中的至少一種。
關於（d）成分的平均粒徑，就防止覆晶連接時的卡入的觀點而言，較佳為1.5 μm以下，就視認性（透明性）優異的觀點而言，更佳為1.0 μm以下。
就抑制放熱性降低的觀點，及容易抑制孔隙的產生、吸濕率變大等的傾向的觀點而言，以半導體用接著劑的固體成分總體為基準，（d）成分的含量較佳為30質量%以上，更佳為40質量%以上。就存在容易抑制黏度變高而半導體用接著劑的流動性降低、及產生填料對連接部的卡入（trapping），容易抑制連接可靠性降低的傾向的觀點而言，以半導體用接著劑的固體成分總體為基準，（d）成分的含量較佳為90質量%以下，更佳為80質量%以下。就該些觀點而言，以半導體用接著劑的固體成分總體為基準，（d）成分的含量較佳為30質量%～90質量%，更佳為40質量%～80質量%。
（（e）成分：助熔劑） 本實施形態的半導體用接著劑可更含有助熔劑（即，顯示出助熔活性（將氧化物或雜質去除的活性）的助熔活性劑）。助熔劑可列舉具有非共價電子對的含氮化合物（咪唑類、胺類等）、羧酸類、酚類、醇類等。有機酸（2-甲基戊二酸等羧酸類等）與醇類等相比，更強烈地表現出助熔活性，連接性進一步提高。
本實施形態的半導體用接著劑亦可更含有離子捕獲劑、抗氧化劑、矽烷偶合劑、鈦偶合劑、調平劑等添加劑。該些添加劑可單獨使用一種或併用兩種以上。該些添加劑的含量只要以表現出各添加劑的效果的方式適當調整即可。
將本實施形態的半導體用接著劑於200℃下保持5秒時的硬化反應率為80%以上，較佳為90%以上。若200℃（焊料熔融溫度以下）/5秒的硬化反應率低於80%，則連接時（焊料熔融溫度以上）焊料飛散·流動而連接可靠性降低。硬化反應率可藉由以下方式獲得：將10 mg的未硬化的半導體用接著劑放入至鋁鍋中後，使用DSC（帕金艾爾瑪（Perkin Elmer）公司製造，商品名：DSC-7型）以20℃/min的升溫速度於30℃～300℃的溫度範圍內測定。
若半導體用接著劑含有陰離子聚合性的環氧樹脂（特別是重量平均分子量10000以上的環氧樹脂），則容易將硬化反應率調整為80%以上。較佳為相對於（a）成分80質量份而環氧樹脂的含量為20質量份以下，更佳為不含環氧樹脂。
本實施形態的半導體用接著劑可於200℃以上的高溫下壓接。另外，於使焊料等金屬熔融而形成連接的覆晶封裝中，表現出更優異的硬化性。
就生產性提高的觀點而言，本實施形態的半導體用接著劑較佳為膜狀（膜狀半導體用接著劑）。以下示出膜狀半導體用接著劑的製作方法。
首先，將（a）成分、（b）成分及其他成分添加至有機溶劑中後，藉由攪拌混合、混練等進行溶解或分散而製備樹脂清漆。其後，於實施了脫模處理的基材膜上，使用刀片塗佈機、輥式塗佈機、敷料器（applicator）、模式塗佈機、缺角輪塗佈機（Comma Coater）等塗佈樹脂清漆後，藉由加熱使有機溶劑減少，於基材膜上形成膜狀半導體用接著劑。另外，亦可藉由以下方法而於晶圓上形成膜狀半導體用接著劑，即，於藉由加熱使有機溶劑減少之前，將樹脂清漆旋塗於晶圓等上而形成膜，然後進行溶劑乾燥。
基材膜只要具有可耐受使有機溶劑揮發時的加熱條件的耐熱性，則並無特別限制，可列舉聚酯膜（例如聚對苯二甲酸乙二酯膜）、聚丙烯膜、聚醯亞胺膜、聚醚醯亞胺膜、聚醚萘二甲酸酯膜、甲基戊烯膜等。基材膜不限於包含該些膜中的一種的單層膜，亦可為包含兩種以上的膜的多層膜。
關於使有機溶劑自塗佈後的樹脂清漆中揮發時的條件，具體而言較佳為進行50℃～200℃、0.1分鐘～90分鐘的加熱。只要不對安裝後的孔隙或黏度調整造成影響，則較佳為設定為有機溶劑揮發至1.5質量%以下的條件。
＜半導體裝置＞ 對本實施形態的半導體裝置加以說明。本實施形態的半導體裝置可藉由本實施形態的半導體裝置的製造方法而獲得。本實施形態的半導體裝置可使用本實施形態的半導體用接著劑而製造。本實施形態的半導體裝置的連接部可為凸塊與配線的金屬接合、及凸塊與凸塊的金屬接合的任一種。本實施形態的半導體裝置中，例如可使用經由半導體用接著劑而獲得電性連接的覆晶連接。
本實施形態的半導體裝置的第1態樣具有：彼此相對向的半導體晶片及基板（配線電路基板）、分別配置於半導體晶片及基板的彼此相對向的面上的連接部（配線、凸塊等）、以及配置於半導體晶片及基板間的密封構件，並且所述密封構件將所述連接部密封，且含有本實施形態的半導體用接著劑或其硬化物。第1實施形態的半導體裝置於在半導體晶片及基板的彼此相對向的面上分別配置有配線的情形時，亦可更具有將半導體晶片及基板的所述配線彼此連接的凸塊。
本實施形態的半導體裝置的第2態樣具有：彼此相對向的第1半導體晶片及第2半導體晶片、分別配置於第1半導體晶片及第2半導體晶片的彼此相對向的面上的連接部（配線、凸塊等）、以及配置於第1半導體晶片及第2半導體晶片間的密封構件，並且所述密封構件將所述連接部密封，且含有本實施形態的半導體用接著劑或其硬化物。第2實施形態的半導體裝置於在第1半導體晶片及第2的半導體晶片的彼此相對向的面上分別配置有配線的情形時，亦可更具有將第1半導體晶片及第2半導體晶片的所述配線彼此連接的凸塊。
圖1（a）、圖1（b）為表示半導體裝置的實施形態（半導體晶片及基板的COB型的連接態樣）的示意剖面圖。如圖1（a）所示，半導體裝置100具有：彼此相對向的半導體晶片10及基板（配線電路基板）20、分別配置於半導體晶片10及基板20的彼此相對向的面上的配線15、將半導體晶片10及基板20的配線15彼此連接的連接凸塊30、以及於半導體晶片10及基板20間的空隙中無間隙地填充的半導體用接著劑40。半導體晶片10及基板20是藉由配線15及連接凸塊30而覆晶連接。配線15及連接凸塊30是由半導體用接著劑40密封，而自外部環境阻斷。
如圖1（b）所示，半導體裝置200具有：彼此相對向的半導體晶片10及基板20、分別配置於半導體晶片10及基板20的彼此相對向的面上的凸塊32、以及於半導體晶片10及基板20間的空隙中無間隙地填充的半導體用接著劑40。半導體晶片10及基板20是藉由將相對向的凸塊32彼此連接而覆晶連接。凸塊32是由半導體用接著劑40密封，而自外部環境阻斷。
圖2（a）、圖2（b）為表示半導體裝置的另一實施形態（半導體晶片彼此的COC型的連接態樣）的示意剖面圖。如圖2（a）所示，半導體裝置300除了藉由配線15及連接凸塊30將兩個半導體晶片10覆晶連接的方面以外，與半導體裝置100相同。如圖2（b）所示，半導體裝置400除了藉由凸塊32將兩個半導體晶片10覆晶連接的方面以外，與半導體裝置200相同。
半導體晶片10並無特別限制，可使用：由矽、鍺等同一種類的元素所構成的元素半導體；砷化鎵、磷化銦等化合物半導體等各種半導體。
基板20只要為配線電路基板，則並無特別限制，可使用：將以玻璃環氧化物、聚醯亞胺、聚酯、陶瓷、環氧樹脂、雙馬來醯亞胺三嗪、聚醯亞胺等作為主成分的絕緣基板的表面上形成的金屬層的不需要部位蝕刻去除而形成有配線（配線圖案）的電路基板；於所述絕緣基板的表面上藉由金屬鍍敷等而形成有配線（配線圖案）的電路基板；於所述絕緣基板的表面上印刷導電性物質而形成有配線（配線圖案）的電路基板等。
配線15、凸塊32等連接部含有金、銀、銅、焊料（主成分例如為錫-銀、錫-鉛、錫-鉍及錫-銅）、鎳、錫、鉛等作為主成分，亦可含有多種金屬。
於配線（配線圖案）的表面上，亦可形成有以金、銀、銅、焊料（主成分為例如錫-銀、錫-鉛、錫-鉍及錫-銅）、錫、鎳等作為主成分的金屬層。該金屬層可僅由單一成分構成，亦可由多種成分構成。另外，亦可具有將多個金屬層積層而成的結構。銅及焊料因價廉而通常被使用。
關於被稱為凸塊的導電性凸起的材質，可使用金、銀、銅、焊料（主成分例如為錫-銀、錫-鉛、錫-鉍及錫-銅）、錫、鎳等作為主成分，可僅由單一成分構成，亦可由多種成分構成。另外，亦能以成為該些金屬積層而成的結構的方式形成。凸塊亦可形成於半導體晶片或基板上。銅及焊料因價廉而通常被使用。
另外，亦可將圖1或圖2所示般的半導體裝置（封裝）積層並以金、銀、銅、焊料（主成分例如為錫-銀、錫-鉛、錫-鉍及錫-銅）、錫、鎳等加以電性連接。就因價廉而通常被使用的觀點而言，較佳為銅及焊料。例如亦可如TSV技術中所見般，將半導體用接著劑介於半導體晶片間來進行覆晶連接或積層，形成貫穿半導體晶片的孔而與圖案面的電極連接。
圖3為表示半導體裝置的另一實施形態（半導體晶片積層型的態樣（TSV））的示意剖面圖。圖3所示的半導體裝置500中，形成於內插器（interposer）50上的配線15經由連接凸塊30而與半導體晶片10的配線15連接，藉此將半導體晶片10與內插器50覆晶連接。半導體晶片10與內插器50之間的空隙中，無間隙地填充有半導體用接著劑40。於所述半導體晶片10的與內插器50為相反側的表面上，經由配線15、連接凸塊30及半導體用接著劑40而反覆積層半導體晶片10。半導體晶片10的表背的圖案面的配線15是藉由在貫穿半導體晶片10內部的孔內所填充的貫通電極34而彼此連接。再者，貫通電極34的材質可使用銅、鋁等。
藉由此種TSV技術，可自通常不使用的半導體晶片的背面亦取得信號。進而，因於半導體晶片10內垂直穿通貫通電極34，故可縮短相對向的半導體晶片10間、或半導體晶片10及內插器50間的距離，實現靈活的連接。本實施形態的半導體用接著劑可於此種TSV技術中用作相對向的半導體晶片10間、或半導體晶片10及內插器50間的密封材料。
另外，於面陣列（area bump）晶片技術等自由度高的凸塊形成方法中，不經由內插器而可將半導體晶片直接安裝於母板（mother board）上。本實施形態的半導體用接著劑亦可應用於此種將半導體晶片直接安裝於母板上的情形。再者，本實施形態的半導體用接著劑亦可於將兩個配線電路基板積層的情形時，於將基板間的空隙密封時應用。
＜半導體裝置的製造方法＞ 本實施形態的半導體裝置的製造方法可使用本實施形態的半導體用接著劑將半導體晶片及配線電路基板、或多個半導體晶片彼此連接。本實施形態的半導體裝置的製造方法例如包括以下步驟：經由半導體用接著劑將半導體晶片及配線電路基板彼此連接，並且將所述半導體晶片及所述配線電路基板各自的連接部彼此電性連接，而獲得半導體裝置的步驟；或經由半導體用接著劑將多個半導體晶片彼此連接，並且將所述多個半導體晶片各自的連接部彼此電性連接，而獲得半導體裝置的步驟。
於本實施形態的半導體裝置的製造方法中，可藉由金屬接合將所述連接部彼此連接。即，藉由金屬接合將所述半導體晶片及所述配線電路基板各自的所述連接部彼此連接，或藉由金屬接合將所述多個半導體晶片各自的所述連接部彼此連接。
作為本實施形態的半導體裝置的製造方法的一例，對圖4所示的半導體裝置600的製造方法加以說明。半導體裝置600中，經由半導體用接著劑40，將具有配線（銅配線）15的基板（玻璃環氧基板）60、與具有配線（銅柱（pillar）、銅桿（post））15的半導體晶片10彼此連接。半導體晶片10的配線15與基板60的配線15是藉由連接凸塊（焊料凸塊）30而電性連接。於基板60的形成有配線15的表面上，除了連接凸塊30的形成位置以外亦配置有阻焊劑70。
於半導體裝置600的製造方法中，首先於形成有阻焊劑70的基板60上貼附半導體用接著劑（膜狀半導體用接著劑等）40。貼附可藉由加熱壓製、輥層壓、真空層壓等來進行。半導體用接著劑的供給面積或厚度可根據半導體晶片10或基板60的尺寸、凸塊高度等而適當設定。可將半導體用接著劑40貼附於半導體晶片10上，亦可將半導體用接著劑40貼附於半導體晶圓上後進行切割而分成各個半導體晶片10，藉此製作貼附有半導體用接著劑40的半導體晶片10。將半導體用接著劑40貼附於基板60或半導體晶片10上後，使用覆晶接合機等連接裝置對半導體晶片10的配線15上的連接凸塊30與基板60的配線15進行對位。繼而，於連接凸塊30的熔點以上的溫度下將半導體晶片10與基板60一面加熱一面按壓（於連接部中使用焊料的情形時，較佳為對焊料部分施加240℃以上），從而將半導體晶片10與基板60連接，並且藉由半導體用接著劑40將半導體晶片10與基板60之間的空隙密封填充。連接負荷依存於凸塊數，但需考慮凸塊的高度偏差吸收、或凸塊變形量的控制而設定。就提高生產性的觀點而言，連接時間較佳為短時間。較佳為使焊料熔融而將氧化膜或表面的雜質去除，於連接部形成金屬接合。
所謂短時間的連接時間（壓接時間），是指於連接形成（正式壓接）中對連接部施加240℃以上的時間（例如使用焊料時的時間）為10秒以下。連接時間較佳為5秒以下，更佳為4秒以下，進而佳為3秒以下，尤佳為2秒以下。
亦可於對位後暫時固定，以回焊爐進行加熱處理，藉此使焊料凸塊熔融而將半導體晶片與基板連接，由此製造半導體裝置。暫時固定並不顯著要求必須形成金屬接合，故與所述正式壓接相比，可為低負荷、短時間或低溫度，產生提高生產性、防止連接部的劣化等優點。亦可將半導體晶片與基板連接後，以烘箱等進行加熱處理，使半導體用接著劑硬化。加熱溫度為半導體密封用接著劑進行硬化、較佳為完全硬化的溫度。加熱溫度及加熱時間只要適當設定即可。 [實施例]
以下，使用實施例對本發明加以說明，但本發明不受該些實施例的限制。
＜膜狀接著劑的製作＞ 將用於製作膜狀接著劑的化合物示於以下。
（a）(甲基)丙烯酸系化合物 ·季戊四醇三丙烯酸酯（共榮社化學股份有限公司製造，PE-3A，三官能基） ·季戊四醇四丙烯酸酯（共榮社化學股份有限公司製造，PE-4A，四官能基） ·二季戊四醇六丙烯酸酯（共榮社化學股份有限公司製造，PE-6A，六官能基） ·雙酚A骨架丙烯酸酯（新中村化學工業股份有限公司製造，EA1020） ·乙氧基化異三聚氰酸三丙烯酸酯（新中村化學工業股份有限公司製造，A-9300）
環氧樹脂 ·含三苯酚甲烷骨架的多官能固體環氧樹脂（日本環氧樹脂（Japan Epoxy Resin）股份有限公司製造，EP1032H60） ·雙酚F型液狀環氧樹脂（日本環氧樹脂（Japan Epoxy Resin）股份有限公司製造，YL983U）
（b）硬化劑 ·二枯基過氧化物（日油股份有限公司製造，帕克米（Percumyl）D） ·二-第三丁基過氧化物（日油股份有限公司製造，帕布吉（Perbutyl）D） ·2,4-二胺基-6-[2'-甲基咪唑-(1')]-乙基-s-三嗪三聚氰酸加成物（四國化成股份有限公司製造，2MAOK-PW） （c）高分子成分 苯氧基樹脂（東都化成股份有限公司製造，ZX1356，Tg：約71℃，Mw：約63000）
（d）填料 ·二氧化矽填料（雅都瑪（Admatechs）股份有限公司製造，SE2050，平均粒徑：0.5 μm） ·環氧矽烷表面處理填料（雅都瑪（Admatechs）股份有限公司製造，SE2050SEJ，平均粒徑：0.5 μm） ·甲基丙烯酸表面處理奈米二氧化矽填料（雅都瑪（Admatechs）股份有限公司製造，YA050C-SM，以下記作「SM奈米二氧化矽」，平均粒徑：約50 nm） ·有機填料（樹脂填料，日本羅門哈斯（Rohm and Haas Japan）股份有限公司製造，EXL-2655：核殼型有機微粒子）
（e）助熔劑（羧酸） 2-甲基戊二酸（奧德里奇（Aldrich）製造，熔點：約77℃，以下記作「戊二酸」）
（實施例1） 將表1及表2所示的調配量（單位：質量份）的(甲基)丙烯酸系化合物、無機填料（SE2050、SE2050SEJ、SM奈米二氧化矽）及有機填料以成為NV60%的方式添加至有機溶劑（甲基乙基酮）中。其後，添加與固體成分為相同質量的f1.0 mm、f2.0 mm的珠，利用珠磨機（日本飛馳（Fritsch Japan）股份有限公司，行星式微粉碎機P-7）攪拌30分鐘。其後，添加苯氧基樹脂（ZX1356），再次利用珠磨機攪拌30分鐘。攪拌後，添加硬化劑進行攪拌，藉由過濾將珠去除。利用小型精密塗敷裝置（廉井精機股份有限公司製造）來塗敷所製作的清漆，利用潔淨烘箱（愛斯佩克（ESPEC）製造）進行乾燥（70℃/10 min），獲得膜狀接著劑。
（實施例2～實施例7、比較例1～比較例6） 除了如下述表1及表2所示般變更所使用的材料以外，與實施例1同樣地獲得膜狀接著劑。再者，環氧樹脂是與(甲基)丙烯酸系化合物同時添加，助熔劑是與(甲基)丙烯酸系化合物同時添加。
＜硬化反應率的測定方法＞ 將10 mg的樣品（膜狀接著劑）放入至鋁鍋中後，使用DSC（帕金艾爾瑪（Perkin Elmer）公司製造，商品名：DSC-7型）以20℃/min的升溫速度於30℃～300℃的溫度範圍內進行測定。將測定未處理樣品的情形時的ΔH（J/g）作為「ΔH1」，對在熱板上進行了200℃/5秒的熱處理的樣品進行測定的情形時的ΔH（J/g）作為「ΔH2」，由以下的式子算出硬化反應率。將硬化反應率90%以上示作「A」，80%以上且小於90%示作「B」，小於80%示作「C」。將結果示於表1及表2中。 （ΔH1-ΔH2）/ΔH1×100=硬化反應率（%）
＜評價＞ （孔隙評價） 切取所製作的膜狀接著劑（8 mm×8 mm×0.045 mmt ），貼附於玻璃環氧基板（玻璃環氧基材：420 μm厚，銅配線：9 μm厚）上，利用FCB3（松下（Panasonic）股份有限公司製造）來安裝帶有焊料凸塊的半導體晶片（晶片尺寸：7.3 mm×7.3 mm×0.15 mmt ，凸塊高度：銅柱+焊料共計約45 μm，凸塊數328，間距80 μm，Cu配線與Cu配線的間隔40 μm（間隙））（安裝條件：壓接頭溫度130℃/2秒+200℃/5秒+240℃/3秒，75 N），獲得與圖4相同的半導體裝置A。平台溫度設定為80℃。
切取所製作的膜狀接著劑（8 mm×8 mm×0.045 mmt ），貼附於玻璃環氧基板（玻璃環氧基材：420 μm厚、銅配線：9 μm厚）上，利用FCB3（松下（Panasonic）股份有限公司製造）來安裝帶有焊料凸塊的半導體晶片（晶片尺寸：7.3 mm×7.3 mm×0.15 mmt ，凸塊高度：銅柱+焊料共計約45 μm，凸塊數328，間距80 μm，Cu配線與Cu配線的間隔40 μm（間隙））（安裝條件：壓接頭溫度（1）130℃/1秒+200℃/2秒+250℃/2秒、（2）130℃/2秒+200℃/5秒+250℃/3秒、（3）130℃/2秒+200℃/5秒+250℃/5秒，全部為75 N），獲得與圖4相同的半導體裝置B。平台溫度設定為80℃。
藉由超音波影像診斷裝置（英賽特（Insight）-300，英賽特（Insight）股份有限公司製造）來拍攝所述獲得的半導體裝置的外觀圖像，利用掃描儀GT-9300UF（愛普生（EPSON）公司製造）提取半導體晶片上的半導體用接著劑層的圖像。繼而，使用圖像處理軟體奧多比-圖片商店（Adobe Photoshop）（註冊商標），藉由色調修正及二階化來識別孔隙部分，藉由直方圖（histogram）算出孔隙部分所佔的比例。將半導體晶片上的半導體用接著劑部分的面積設為100%。將孔隙的佔有面積為5%以下的情形評價為「A」，超過5%且為10%以下評價為「B」，超過10%的情形評價為「C」。將「A」及「B」判斷為良好，「C」判斷為不良。將半導體裝置A的結果示於表1中。將半導體裝置B的結果示於表2中。
（連接可靠性評價（焊料飛散·流動評價）） 將所述獲得的半導體裝置研磨後，使用金屬顯微鏡（奧林巴斯（OLYMPUS）股份有限公司製造，BX60）來觀察連接部的剖面。將焊料攀爬至Cu凸塊的側面到Cu凸塊高度的30%以上的情形評價為「B」（不良），小於30%的情形評價為「A」（良好）。將半導體裝置A的結果示於表1中。將半導體裝置B的結果示於表2中。
（絕緣可靠性評價（HAST試驗：Highly Accelerated Storage Test）） 將所述獲得的半導體裝置設置於加速壽命試驗裝置（平山（HIRAYAMA）公司製造，商品名：PL-422R8，條件：130℃/85%RH/100小時，施加5 V）中，獲得絕緣可靠性評價用的樣品。繼而，將樣品研磨後，使用金屬顯微鏡（奧林巴斯（OLYMPUS）股份有限公司製造，BX60）提取連接部的剖面的圖像並進行評價。使用圖像處理軟體奧多比-圖片商店（Adobe Photoshop），藉由色調修正及二階化來識別腐蝕部分，藉由直方圖算出腐蝕部分所佔的比例。將連接部的兩凸塊間的半導體接著部設為100%，藉由與上文所述相同的方法來算出該範圍內的變色部分。將腐蝕部分的佔有率（腐蝕產生率）為20%以下的情形評價為「A」（良好。抑制腐蝕），多於20%的情形評價為「B」（不良）。將半導體裝置A的結果示於表1中。將半導體裝置B的結果示於表2中。
[表1]
[表2]
實施例中，將半導體用接著劑於200℃下保持5秒時的硬化反應率為80%以上，孔隙、連接可靠性及絕緣可靠性任一項的評價結果均良好。另一方面，比較例中，未能獲得良好的連接可靠性及絕緣可靠性。
10‧‧‧半導體晶片 15‧‧‧配線 20、60‧‧‧基板 30‧‧‧連接凸塊 32‧‧‧凸塊 34‧‧‧貫通電極 40‧‧‧半導體用接著劑 50‧‧‧內插器 70‧‧‧阻焊劑 100、200、300、400、500、600‧‧‧半導體裝置
圖1（a）、圖1（b）為表示本發明的半導體裝置的一實施形態的示意剖面圖。 圖2（a）、圖2（b）為表示本發明的半導體裝置的另一實施形態的示意剖面圖。 圖3為表示本發明的半導體裝置的另一實施形態的示意剖面圖。 圖4為表示本發明的半導體裝置的另一實施形態的示意剖面圖。

Claims (18)

  1. 一種半導體用接著劑，其是在將半導體晶片及配線電路基板各自的連接部彼此電性連接而成的半導體裝置、或將多個半導體晶片各自的連接部彼此電性連接而成的半導體裝置中，用於所述連接部的密封，並且 所述半導體用接著劑含有(甲基)丙烯酸系化合物及硬化劑， 於200℃下保持5秒時的硬化反應率為80%以上。
  2. 如申請專利範圍第1項所述的半導體用接著劑，其更含有重量平均分子量10000以上的高分子成分。
  3. 如申請專利範圍第2項所述的半導體用接著劑，其中所述高分子成分的重量平均分子量為30000以上，所述高分子成分的玻璃轉移溫度為100℃以下。
  4. 如申請專利範圍第1項至第3項中任一項所述的半導體用接著劑，其為膜狀。
  5. 如申請專利範圍第1項至第4項中任一項所述的半導體用接著劑，其中所述(甲基)丙烯酸系化合物於25℃下為固體。
  6. 如申請專利範圍第1項至第5項中任一項所述的半導體用接著劑，其中所述硬化劑為熱自由基產生劑。
  7. 如申請專利範圍第1項至第6項中任一項所述的半導體用接著劑，其中所述硬化劑為過氧化物。
  8. 一種半導體裝置的製造方法，其使用如申請專利範圍第1項至第7項中任一項所述的半導體用接著劑。
  9. 一種半導體裝置，其是藉由如申請專利範圍第8項所述的製造方法而獲得。
  10. 一種半導體裝置的製造方法，包括： 經由半導體用接著劑將半導體晶片及配線電路基板彼此連接，並且將所述半導體晶片及所述配線電路基板各自的連接部彼此電性連接，而獲得半導體裝置的步驟；或經由半導體用接著劑將多個半導體晶片彼此連接，並且將所述多個半導體晶片各自的連接部彼此電性連接，而獲得半導體裝置的步驟；並且 所述半導體用接著劑含有(甲基)丙烯酸系化合物及硬化劑， 於200℃下保持5秒時的所述半導體用接著劑的硬化反應率為80%以上。
  11. 如申請專利範圍第10項所述的半導體裝置的製造方法，其中所述半導體用接著劑更含有重量平均分子量10000以上的高分子成分。
  12. 如申請專利範圍第11項所述的半導體裝置的製造方法，其中所述高分子成分的重量平均分子量為30000以上，所述高分子成分的玻璃轉移溫度為100℃以下。
  13. 如申請專利範圍第10項至第12項中任一項所述的半導體裝置的製造方法，其中所述半導體用接著劑為膜狀。
  14. 如申請專利範圍第10項至第13項中任一項所述的半導體裝置的製造方法，其中藉由金屬接合將所述連接部彼此連接。
  15. 如申請專利範圍第10項至第14項中任一項所述的半導體裝置的製造方法，其中所述(甲基)丙烯酸系化合物於25℃下為固體。
  16. 如申請專利範圍第10項至第15項中任一項所述的半導體裝置的製造方法，其中所述硬化劑為熱自由基產生劑。
  17. 如申請專利範圍第10項至第16項中任一項所述的半導體裝置的製造方法，其中所述硬化劑為過氧化物。
  18. 一種半導體裝置，其是藉由如申請專利範圍第10項至第17項中任一項所述的製造方法而獲得。
TW104140706A 2014-12-05 2015-12-04 半導體用接著劑以及半導體裝置及其製造方法 TWI679263B (zh)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
JP2014247278 2014-12-05
JP2014247277 2014-12-05
JP2014-247278 2014-12-05
JP2014-247277 2014-12-05

Publications (2)

Publication Number Publication Date
TW201627439A true TW201627439A (zh) 2016-08-01
TWI679263B TWI679263B (zh) 2019-12-11

Family

ID=56091798

Family Applications (1)

Application Number Title Priority Date Filing Date
TW104140706A TWI679263B (zh) 2014-12-05 2015-12-04 半導體用接著劑以及半導體裝置及其製造方法

Country Status (5)

Country Link
US (1) US10224311B2 (zh)
JP (2) JP6555277B2 (zh)
KR (1) KR101990227B1 (zh)
TW (1) TWI679263B (zh)
WO (1) WO2016088859A1 (zh)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI758594B (zh) * 2018-03-28 2022-03-21 日商東麗工程股份有限公司 轉印基板及使用其之安裝方法、以及圖像顯示裝置之製造方法

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2018141106A (ja) * 2017-02-28 2018-09-13 住友ベークライト株式会社 熱硬化性樹脂組成物、キャリア基材付き樹脂シートおよび半導体装置
KR102351843B1 (ko) * 2017-06-07 2022-01-18 쇼와덴코머티리얼즈가부시끼가이샤 반도체용 필름형 접착제, 반도체 장치의 제조 방법 및 반도체 장치
KR102446861B1 (ko) 2017-09-21 2022-09-23 삼성전자주식회사 적층 패키지 및 그의 제조 방법

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3458477A (en) * 1966-03-15 1969-07-29 Atlas Chem Ind Process for preparing unsaturated polyesters by reacting oxyalkylated phenols with hcho and further reacting the resultant product with unsaturated dicarboxylic acids or anhydrides
US5180757A (en) * 1987-12-16 1993-01-19 Michael Lucey Photopolymerizable compositions used in electronics
JPH05299535A (ja) * 1992-04-23 1993-11-12 Matsushita Electric Works Ltd 半導体装置
US6255367B1 (en) * 1995-03-07 2001-07-03 Landec Corporation Polymeric modifying agents
JP2004035862A (ja) * 2002-07-08 2004-02-05 Polyplastics Co 環状アセタール化合物含有光硬化性樹脂組成物及び硬化物
WO2007129711A1 (ja) * 2006-05-09 2007-11-15 Hitachi Chemical Company, Ltd. 接着シート、これを用いた回路部材の接続構造及び半導体装置
EP2024454B1 (en) 2006-05-16 2012-09-19 Lord Corporation Curable protectant for electronic assemblies
KR101129762B1 (ko) * 2006-06-23 2012-03-26 히다치 가세고교 가부시끼가이샤 반도체 디바이스의 제조 방법
JP5217260B2 (ja) 2007-04-27 2013-06-19 住友ベークライト株式会社 半導体ウエハーの接合方法および半導体装置の製造方法
JP5373192B2 (ja) 2010-09-30 2013-12-18 日立化成株式会社 接着剤組成物、半導体装置の製造方法及び半導体装置

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI758594B (zh) * 2018-03-28 2022-03-21 日商東麗工程股份有限公司 轉印基板及使用其之安裝方法、以及圖像顯示裝置之製造方法

Also Published As

Publication number Publication date
JP2019137866A (ja) 2019-08-22
TWI679263B (zh) 2019-12-11
US20170345797A1 (en) 2017-11-30
JP6555277B2 (ja) 2019-08-07
KR101990227B1 (ko) 2019-06-17
WO2016088859A1 (ja) 2016-06-09
JPWO2016088859A1 (ja) 2017-08-31
KR20170081208A (ko) 2017-07-11
US10224311B2 (en) 2019-03-05

Similar Documents

Publication Publication Date Title
TW201726863A (zh) 半導體用接著劑、製造半導體裝置的方法
TWI721150B (zh) 半導體裝置的製造方法
JP2019137866A (ja) 半導体用接着剤、並びに、半導体装置及びその製造方法
JP7380926B2 (ja) 半導体用フィルム状接着剤、半導体装置の製造方法及び半導体装置
JP2017220519A (ja) 半導体装置の製造方法
JP2017122193A (ja) 半導体用接着剤及び半導体装置の製造方法
JP6859708B2 (ja) 半導体装置を製造する方法
JP6544146B2 (ja) 半導体装置及びそれを製造する方法
JP7210849B2 (ja) 接着剤組成物及び半導体装置の製造方法
JP2017098463A (ja) 半導体用接着剤、半導体装置の製造方法及び半導体装置
JP2017171817A (ja) 半導体用接着剤、半導体装置、及び半導体装置の製造方法
JP2021024963A (ja) 半導体用接着剤、それを用いた半導体用接着剤フィルムの製造方法及び半導体装置の製造方法
JP2017203138A (ja) 半導体用接着剤、並びに、半導体装置及びその製造方法
JP2017103289A (ja) 半導体用接着剤、半導体装置、及び半導体装置の製造方法
TW202410369A (zh) 半導體用膜狀接著劑、半導體裝置的製造方法及半導體裝置
JP2017103304A (ja) 半導体用接着剤、半導体装置、及び半導体装置の製造方法