TW201611688A - Method for fabricating conductive wiring - Google Patents

Method for fabricating conductive wiring Download PDF

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TW201611688A
TW201611688A TW103131763A TW103131763A TW201611688A TW 201611688 A TW201611688 A TW 201611688A TW 103131763 A TW103131763 A TW 103131763A TW 103131763 A TW103131763 A TW 103131763A TW 201611688 A TW201611688 A TW 201611688A
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conductive
pattern
conductive layer
sacrificial
layer
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TW103131763A
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Chinese (zh)
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TWI568326B (en
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張啟民
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欣興電子股份有限公司
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  • Manufacturing Of Printed Wiring (AREA)

Abstract

A method for fabricating conductive wiring includes the steps of: providing a substrate having a conductive layer on the upper surface of the substrate; executing a patterning process for the conductive layer to form a conductive pattern on the upper surface of the substrate, where the conductive pattern has a first recess formed on the side-walls thereof, and the portion of the conductive layer in the first recess remains a residual thickness; forming a sacrificial pattern on the conductive layer and into the first recess, where the sacrificial pattern is protruded from the upper surface of the conductive pattern, and the sacrificial pattern has a second recess formed on the side-walls thereof for exposing the conductive pattern; executing a plating process for the conductive layer, so as to increase the thickness of the conductive pattern; and removing the sacrificial pattern and the portion of the conductive layer in the first recess.

Description

導電配線的製作方法 Conductive wiring manufacturing method

本發明係有關於一種導電配線的製作方法,尤指一種厚膜導電配線的製作方法。 The invention relates to a method for manufacturing a conductive wiring, in particular to a method for manufacturing a thick film conductive wiring.

近年隨電子技術的進展,供搭載諸如半導體元件、積體電路、電子零件等之用的配線基板,除輕薄短小化(Miniaturization)之外,亦朝高積體化、高輸出化及高速化急速進展。尤其,上述的配線基板的製程亦朝金屬配線細微化開發。例如,當在基材上形成諸如銅等金屬配線之際,一般可以採用濺鍍成膜與電解電鍍等製程。 In recent years, with the advancement of electronic technology, wiring boards for mounting semiconductor devices, integrated circuits, and electronic components have been rapidly integrated, high-output, and high-speed, in addition to miniaturization. progress. In particular, the above-described wiring board process has also been developed to miniaturize metal wiring. For example, when a metal wiring such as copper is formed on a substrate, a process such as sputtering film formation and electrolytic plating can be generally employed.

當以習知技術在基材上製作厚膜金屬配線時,因金屬配線的厚度會影響蝕刻能力,往往因蝕刻不潔影響產品製作良率,甚至無法製作出預期銅厚、配線間距的產品。 When a thick film metal wiring is formed on a substrate by a conventional technique, the thickness of the metal wiring affects the etching ability, and the etching yield is often affected by the uncleanness of the product, and it is impossible to produce a product having an expected copper thickness and wiring pitch.

本發明實施例在於提供一種厚膜導電配線的製作方法。 Embodiments of the present invention provide a method of fabricating a thick film conductive wiring.

本發明其中一實施例所提供的一種導電配線的製作方法,提供一基材,所述基材的上表面形成有一導電層。接著,將所述導電層進行圖案化處理,以形成至少一導電圖案於所述基材的上表面,其中兩兩所述導電圖案之間形成一第一凹槽區域,所述第一凹槽區域的深度小於所述導電層的厚度,在所述第一凹槽區域內殘留有部分的導電層。然後,於所述導電層上形成至少一第一犧牲圖案,其中所述第一犧牲圖案至少填入所述第一凹槽區域內,所述第一犧牲圖案在厚度方向上凸出於所述導電 圖案的上表面,兩兩所述第一犧牲圖案之間形成一第二凹槽區域,且所述第二凹槽區域暴露至少一部分的所述導電圖案。然後,將所述導電層進行電鍍處理,使所述第二凹槽區域所暴露的所述導電圖案增厚。最後,移除所述第一犧牲圖案,並且,移除所述第一凹槽區域內所殘留的所述導電層。 A method for fabricating a conductive wiring according to an embodiment of the present invention provides a substrate having a conductive layer formed on an upper surface thereof. Then, the conductive layer is patterned to form at least one conductive pattern on the upper surface of the substrate, wherein a first groove region is formed between the two conductive patterns, the first groove The depth of the region is less than the thickness of the conductive layer, and a portion of the conductive layer remains in the first recess region. Forming at least one first sacrificial pattern on the conductive layer, wherein the first sacrificial pattern is filled in at least the first recessed region, the first sacrificial pattern protruding in the thickness direction Conductive An upper surface of the pattern forms a second recessed region between the two first sacrificial patterns, and the second recessed region exposes at least a portion of the conductive pattern. Then, the conductive layer is subjected to a plating treatment to thicken the conductive pattern exposed by the second recessed region. Finally, the first sacrificial pattern is removed, and the conductive layer remaining in the first recessed region is removed.

透過本發明實施例所提供的導電配線的製作方法,可不受限於蝕刻能力而製作出配線密度高、配線寬度窄的厚膜導電配線。 According to the method for fabricating the conductive wiring according to the embodiment of the present invention, the thick film conductive wiring having a high wiring density and a narrow wiring width can be produced without being limited to the etching ability.

為使能更進一步瞭解本發明的特徵及技術內容,請參閱以下有關本發明的詳細說明與附圖,然而所附圖式僅提供參考與說明用,並非用來對本發明加以限制者。 For a better understanding of the features and technical aspects of the present invention, reference should be made to the accompanying drawings.

1‧‧‧基材 1‧‧‧Substrate

101‧‧‧基材的上表面 101‧‧‧ Upper surface of the substrate

2、2’‧‧‧導電層 2, 2'‧‧‧ conductive layer

21、21’‧‧‧導電圖案 21, 21'‧‧‧ conductive patterns

201、201’‧‧‧上表面 201, 201'‧‧‧ upper surface

3、3’‧‧‧第一凹槽區域 3, 3'‧‧‧ first groove area

4‧‧‧第一犧牲層 4‧‧‧First Sacrifice Layer

41‧‧‧第一犧牲圖案 41‧‧‧First Sacrifice Pattern

401‧‧‧上表面 401‧‧‧ upper surface

5‧‧‧第二凹槽區域 5‧‧‧second groove area

6‧‧‧蝕刻阻擋層 6‧‧‧ etching barrier

7‧‧‧第二犧牲圖案 7‧‧‧Second sacrificial pattern

H1、H3‧‧‧高度 H1, H3‧‧‧ height

H2‧‧‧厚度 H2‧‧‧ thickness

S1~S6‧‧‧步驟 S1~S6‧‧‧Steps

圖1A至圖1H顯示本發明一實施例之導電配線的製作方法的步驟流程。 1A to 1H show the flow of steps of a method of fabricating a conductive wiring according to an embodiment of the present invention.

圖2為本發明另一實施例之導電配線的製作方法的步驟流程圖。 2 is a flow chart showing the steps of a method of fabricating a conductive wiring according to another embodiment of the present invention.

請參閱圖1A至圖1H,圖1A至圖1H為本發明一實施例之具有導電配線的基板在製作過程中的側視示意圖,並且,圖1A至圖1H顯示本發明一實施例之導電配線的製作方法的步驟流程。 1A to FIG. 1H, FIG. 1A to FIG. 1H are schematic side views of a substrate having conductive wirings in a manufacturing process according to an embodiment of the present invention, and FIGS. 1A to 1H show conductive wirings according to an embodiment of the present invention. The step flow of the production method.

請參考圖1A,首先,提供一個基材1。基材1的種類可依據實際需求而選擇。例如,當所述導電配線的製作方法是應用於半導體領域中,基材1可為含矽的半導體晶圓;在其它應用上,基材1可以是線路基板,而基材1的材料可以是聚碳酸酯(polycarbonate,PC)、聚碳酸酯與丙烯腈-丁二烯-苯乙烯共聚物(Acrylonitrile Butadiene Styrene,ABS)或含有玻璃纖維的材料。基材1也可以是玻璃基材。 Referring to FIG. 1A, first, a substrate 1 is provided. The type of the substrate 1 can be selected according to actual needs. For example, when the manufacturing method of the conductive wiring is applied to the semiconductor field, the substrate 1 may be a germanium-containing semiconductor wafer; in other applications, the substrate 1 may be a circuit substrate, and the material of the substrate 1 may be Polycarbonate (PC), polycarbonate and acrylonitrile butadiene-styrene (ABS) or glass fiber-containing materials. The substrate 1 may also be a glass substrate.

如圖1A所示,基材1的上表面101形成有導電層2。形成導電層2的方式可採用例如銅膏印刷、噴塗(Spray coating)、無電鍍製程(electroless plating)或濺鍍製程(Sputtering)等常見的導電材 料塗佈製程,也可採用黏貼導電膠帶或銅箔等方式,但不以此為限。 As shown in FIG. 1A, the upper surface 101 of the substrate 1 is formed with a conductive layer 2. The conductive layer 2 can be formed by a common conductive material such as copper paste printing, spray coating, electroless plating or sputtering. The coating process may also be carried out by adhering conductive tape or copper foil, but not limited thereto.

接著,為了將導電層2進行圖案化處理,以形成導電圖案21於所述基材1的上表面101,可對導電層2進行第一次的蝕刻處理。所述蝕刻處理可以採濕式蝕刻的方式。詳細而言,參考圖1A至圖1C,可先於導電層2上形成犧牲圖案,例如圖1B所示的第二犧牲圖案7。第二犧牲圖案7可使用乾墨,而形成第二犧牲圖案7的方式例如包括曝光及顯影等程序。 Next, in order to pattern the conductive layer 2 to form the conductive pattern 21 on the upper surface 101 of the substrate 1, the conductive layer 2 may be subjected to a first etching treatment. The etching process can be performed by wet etching. In detail, referring to FIGS. 1A through 1C, a sacrificial pattern such as the second sacrificial pattern 7 shown in FIG. 1B may be formed on the conductive layer 2. The second sacrificial pattern 7 may use dry ink, and the manner in which the second sacrificial pattern 7 is formed includes, for example, exposure and development.

然後,透過所述第二犧牲圖案7蝕刻導電層2,也就是說,針對導電層2沒有被第二犧牲圖案7覆蓋而裸露出來的部分進行蝕刻(例如進行咬銅處理),以圖案化導電層2。最後,再移除第二犧牲圖案7。值得一提的是,在上述蝕刻導電層2的步驟中,裸露出來的導電層2僅有一部分的厚度被蝕刻,也就是說,裸露出來的導電層2仍然殘留有一部分的厚度。 Then, the conductive layer 2 is etched through the second sacrificial pattern 7, that is, the exposed portion of the conductive layer 2 that is not covered by the second sacrificial pattern 7 is etched (for example, a copper bite process) to pattern the conductive Layer 2. Finally, the second sacrificial pattern 7 is removed. It is worth mentioning that in the above step of etching the conductive layer 2, only a part of the thickness of the exposed conductive layer 2 is etched, that is, the exposed conductive layer 2 still has a part of the thickness remaining.

綜上,導電圖案21可形成於所述基材1的上表面101,如圖1C所示,兩兩導電圖案21之間可形成第一凹槽區域3,所述第一凹槽區域3的深度小於導電層2的厚度,在第一凹槽區域3內殘留有部分的導電層2。形成於基材1上表面101的導電層2可藉由第一凹槽區域3內所殘留有的厚度而全面導通,以利後續的電鍍處理。 In summary, the conductive pattern 21 may be formed on the upper surface 101 of the substrate 1. As shown in FIG. 1C, a first recessed region 3 may be formed between the two conductive patterns 21, and the first recessed region 3 The depth is smaller than the thickness of the conductive layer 2, and a part of the conductive layer 2 remains in the first recessed region 3. The conductive layer 2 formed on the upper surface 101 of the substrate 1 can be fully turned on by the thickness remaining in the first recessed region 3 for subsequent plating treatment.

於本發明另一未繪示的實施例中,所述蝕刻處理可以採乾式蝕刻的方式,以雷射燒蝕導電層2,進而將所述導電層2進行圖案化處理。具體而言,可依據實際需求,例如依據導電層2的材質、導電層2的初始厚度或者導電層2於所述第一凹槽區域3內的殘留厚度H2等,對雷射能量與雷射的掃描時間做調整,以避免雷射燒蝕過量而使第一凹槽區域3暴露出基材1的上表面101,或避免雷射能量不足而使第一凹槽區域3未達到預期的深度。 In another embodiment of the present invention, the etching process may dry-etch a conductive layer 2 by laser etching, and then pattern the conductive layer 2. Specifically, depending on actual needs, for example, depending on the material of the conductive layer 2, the initial thickness of the conductive layer 2, or the residual thickness H2 of the conductive layer 2 in the first recessed region 3, etc., the laser energy and the laser The scan time is adjusted to avoid excessive laser ablation to expose the first recessed region 3 to the upper surface 101 of the substrate 1, or to avoid insufficient laser energy such that the first recessed region 3 does not reach the desired depth. .

接著,參考圖1D,於導電層2上形成第一犧牲圖案41,第一犧牲圖案41是至少填入第一凹槽區域3內,並且,第一犧牲圖案41在厚度方向上是凸出於導電圖案21的上表面201。亦即,第一犧牲圖案41在厚度方向上的高度H3是大於導電圖案21在厚度方向上的高度H1。第一犧牲圖案41在厚度方向上的高度H3亦為第一犧牲圖案41的上表面401至基材1的上表面101的垂直距離,而導電圖案21在厚度方向上的高度H1亦為導電圖案21的上表面201至基材1的上表面101的垂直距離。此外,第一犧牲圖案41的側壁形成第二凹槽區域5,所述第二凹槽區域5可暴露出一部分的導電圖案21。 Next, referring to FIG. 1D, a first sacrificial pattern 41 is formed on the conductive layer 2, the first sacrificial pattern 41 is filled into at least the first recessed region 3, and the first sacrificial pattern 41 is protruded in the thickness direction. The upper surface 201 of the conductive pattern 21. That is, the height H3 of the first sacrificial pattern 41 in the thickness direction is greater than the height H1 of the conductive pattern 21 in the thickness direction. The height H3 of the first sacrificial pattern 41 in the thickness direction is also the vertical distance from the upper surface 401 of the first sacrificial pattern 41 to the upper surface 101 of the substrate 1, and the height H1 of the conductive pattern 21 in the thickness direction is also a conductive pattern. The vertical distance of the upper surface 201 of 21 to the upper surface 101 of the substrate 1. Further, the sidewall of the first sacrificial pattern 41 forms a second recessed region 5, which may expose a portion of the conductive pattern 21.

以下詳細說明於導電層2上形成所述第一犧牲圖案41的實施方式。舉例來說,可先於導電層2上整面性地形成一層第一犧牲層4,其中第一犧牲層4可填滿第一凹槽區域3。然後,將第一犧牲層4進行圖案化處理,使第一犧牲層4形成所述第一犧牲圖案41。第一犧牲層4可使用乾墨,而圖案化第一犧牲圖案41的方式例如包括曝光及顯影等程序。 An embodiment in which the first sacrificial pattern 41 is formed on the conductive layer 2 will be described in detail below. For example, a first sacrificial layer 4 may be formed over the entire surface of the conductive layer 2, wherein the first sacrificial layer 4 may fill the first recess region 3. Then, the first sacrificial layer 4 is patterned to form the first sacrificial layer 4 into the first sacrificial pattern 41. The first sacrificial layer 4 may use dry ink, and the manner of patterning the first sacrificial pattern 41 includes, for example, exposure and development processes.

藉此,第一犧牲圖案41可對應於第一凹槽區域3而形成於第一凹槽區域3內所殘留的導電層2上。如圖1D所示,本實施例中,第一犧牲圖案41可填滿第一凹槽區域3,且第一犧牲圖案41的側壁與導電圖案21的側壁可部分切齊,換言之,第二凹槽區域5可暴露出導電圖案21。另一方面而言,第一犧牲圖案41與導電圖案21為正負互補,但發明並不以此為限。 Thereby, the first sacrificial pattern 41 can be formed on the conductive layer 2 remaining in the first recessed region 3 corresponding to the first recessed region 3 . As shown in FIG. 1D, in the embodiment, the first sacrificial pattern 41 may fill the first recessed region 3, and the sidewall of the first sacrificial pattern 41 may be partially aligned with the sidewall of the conductive pattern 21, in other words, the second recess. The groove region 5 may expose the conductive pattern 21. On the other hand, the first sacrificial pattern 41 and the conductive pattern 21 are positive and negative complementary, but the invention is not limited thereto.

接著,參考圖1D至圖1E,將導電層2進行電鍍處理,使第二凹槽區域5所暴露的導電圖案21增厚。於本實施例中,導電圖案21是增厚至第一犧牲圖案41在厚度方向上的高度H3。換言之,經增厚的導電圖案21’在厚度方向上的高度可與第一犧牲圖案41在厚度方向上的高度H3相同。經增厚的導電圖案21’在厚度方向上的高度亦為導電圖案21’的上表面201’至基材1的上表 面101的垂直距離。 Next, referring to FIG. 1D to FIG. 1E, the conductive layer 2 is subjected to a plating treatment to thicken the conductive pattern 21 exposed by the second recess region 5. In the present embodiment, the conductive pattern 21 is thickened to a height H3 of the first sacrificial pattern 41 in the thickness direction. In other words, the height of the thickened conductive pattern 21' in the thickness direction may be the same as the height H3 of the first sacrificial pattern 41 in the thickness direction. The height of the thickened conductive pattern 21' in the thickness direction is also the upper surface 201' of the conductive pattern 21' to the upper surface of the substrate 1. The vertical distance of the face 101.

然後,為了移除第一犧牲圖案41及移除導電層2’在第一凹槽區域3’內所殘留的部分,可於導電圖案21’上形成一層蝕刻阻擋層6,以保護導電圖案21’。蝕刻阻擋層6的材料例如包括錫及鉛。接著,在蝕刻阻擋層6的保護下,以去墨方式移除第一犧牲圖案41,如圖1F所示。所述去墨方式例如是利用溶劑浸泡第一犧牲圖案41或是利用電漿體將第一犧牲圖案41剝除。 Then, in order to remove the first sacrificial pattern 41 and remove the remaining portion of the conductive layer 2' in the first recessed region 3', an etch stop layer 6 may be formed on the conductive pattern 21' to protect the conductive pattern 21. '. The material of the etching stopper layer 6 includes, for example, tin and lead. Next, under the protection of the etch barrier layer 6, the first sacrificial pattern 41 is removed by deinking, as shown in FIG. 1F. The deinking method is, for example, immersing the first sacrificial pattern 41 with a solvent or stripping the first sacrificial pattern 41 with a plasma.

接著,參考圖1G,為了移除導電層2’在第一凹槽區域3’內所殘留的部分,可在蝕刻阻擋層6的保護下,對導電層2’進行第二次的蝕刻處理。相似於第一次的蝕刻處理,所述第二次的蝕刻處理同樣可以採濕式咬銅的方式或是乾式雷射燒蝕的方式。導電層2’在第一凹槽區域3’內所殘留的部分僅具有部分厚度H2,導電層2’的所述部分厚度H2例如是小於5微米,因此,不論是使用濕式蝕刻的方式或是乾式蝕刻的方式,導電層2’在第一凹槽區域3’內所殘留的部分皆可被輕易去除。 Next, referring to Fig. 1G, in order to remove the remaining portion of the conductive layer 2' in the first recessed region 3', the conductive layer 2' may be subjected to a second etching treatment under the protection of the etching stopper layer 6. Similar to the first etching process, the second etching process can also be a wet copper bite or a dry laser ablation. The portion of the conductive layer 2' remaining in the first recessed region 3' has only a partial thickness H2, and the portion of the thickness H2 of the conductive layer 2' is, for example, less than 5 micrometers, thus, whether by wet etching or It is a dry etching method, and the remaining portion of the conductive layer 2' in the first recessed region 3' can be easily removed.

最後,如圖1H所示,只要移除蝕刻阻擋層6,即可完成導電配線的製作,而獲得厚膜導電配線,例如厚銅配線。於本發明一實施例中,所述厚銅配線的厚度(亦即,導電圖案21’的厚度)可大於50微米,且所述厚銅配線的配線間距可達到小於50微米的等級。如圖1A至圖1H所示的實施利中,所述厚銅配線的配線間距亦為第一凹槽區域3、3’的寬度。 Finally, as shown in FIG. 1H, as long as the etching stopper layer 6 is removed, fabrication of the conductive wiring can be completed, and thick film conductive wiring such as thick copper wiring can be obtained. In an embodiment of the invention, the thickness of the thick copper wiring (i.e., the thickness of the conductive pattern 21') may be greater than 50 micrometers, and the wiring pitch of the thick copper wiring may be less than 50 micrometers. In the implementation shown in Figs. 1A to 1H, the wiring pitch of the thick copper wiring is also the width of the first recessed regions 3, 3'.

上述實施例可歸納出本發明另一實施例之導電配線的製作方法,請參照圖2之流程圖。首先,提供一基材,所述基材的上表面形成有一導電層(步驟S1);接著,將所述導電層進行圖案化處理,以形成至少一導電圖案於所述基材的上表面,其中兩兩所述導電圖案之間形成一第一凹槽區域,所述第一凹槽區域的深度小於所述導電層的厚度,在所述第一凹槽區域內殘留有部分的導電層(步驟S2);然後,於所述導電層上形成至少一第一犧牲圖案, 其中所述第一犧牲圖案至少填入所述第一凹槽區域內,所述第一犧牲圖案在厚度方向上凸出於所述導電圖案的上表面,兩兩所述第一犧牲圖案之間形成一第二凹槽區域,且所述第二凹槽區域暴露至少一部分的所述導電圖案(步驟S3);接著,將所述導電層進行電鍍處理,使所述第二凹槽區域所暴露的所述導電圖案增厚(步驟S4);然後,移除所述第一犧牲圖案(步驟S5);以及,移除所述第一凹槽區域內所殘留的所述導電層(步驟S6)。 The above embodiment can be summarized as a method for fabricating a conductive wiring according to another embodiment of the present invention. Please refer to the flowchart of FIG. First, a substrate is provided, and a conductive layer is formed on an upper surface of the substrate (step S1); then, the conductive layer is patterned to form at least one conductive pattern on an upper surface of the substrate, A first groove region is formed between the two conductive patterns, the depth of the first groove region is smaller than the thickness of the conductive layer, and a part of the conductive layer remains in the first groove region ( Step S2); then forming at least one first sacrificial pattern on the conductive layer, Wherein the first sacrificial pattern is filled in at least the first recessed region, the first sacrificial pattern protrudes from the upper surface of the conductive pattern in a thickness direction, between the two first sacrificial patterns Forming a second recessed region, and the second recessed region exposing at least a portion of the conductive pattern (step S3); then, the conductive layer is subjected to a plating process to expose the second recessed region The conductive pattern is thickened (step S4); then, the first sacrificial pattern is removed (step S5); and the conductive layer remaining in the first recessed region is removed (step S6) .

綜上所述,本發明實施例提供一種導電配線的製作方法,其利用對導電層2所進行的第一次蝕刻處理,以圖案化導電層2,再利用對增厚的導電層2’所進行的第二次蝕刻處理,以移除第一凹槽區域3、3’內所殘留的導電層厚度。所述導電配線的製作方法藉由此兩段式的蝕刻方式來進行導電配線的製作,可不受限於蝕刻能力,進而避免因蝕刻不完全所造成的導電良率不佳的問題。 In summary, the embodiments of the present invention provide a method for fabricating a conductive wiring, which utilizes a first etching process performed on the conductive layer 2 to pattern the conductive layer 2, and then utilizes the thickened conductive layer 2'. A second etching process is performed to remove the thickness of the conductive layer remaining in the first recessed regions 3, 3'. In the method of fabricating the conductive wiring, the conductive wiring is formed by the two-stage etching method, and the etching capability is not limited, thereby avoiding the problem of poor conductivity due to incomplete etching.

此外,所述導電配線的製作方法利用基材1之上表面101所形成的導電圖案21,可建立厚膜導電配線(例如厚銅配線)的第一階段高度,再利用凸出於導電圖案21之上表面201的第一犧牲圖案41,可建立厚膜導電配線(例如厚銅配線)的第二階段高度。所述導電配線的製作方法可以製作出配線密度高、配線寬度窄的導電配線。 In addition, the manufacturing method of the conductive wiring utilizes the conductive pattern 21 formed on the upper surface 101 of the substrate 1, and the first stage height of the thick film conductive wiring (for example, thick copper wiring) can be established, and the conductive pattern 21 is used again. The first sacrificial pattern 41 of the upper surface 201 can establish a second stage height of thick film conductive wiring (eg, thick copper wiring). In the method of manufacturing the conductive wiring, a conductive wiring having a high wiring density and a narrow wiring width can be produced.

以上所述僅為本發明的較佳可行實施例,非因此侷限本發明的專利範圍,故舉凡運用本發明說明書及圖式內容所做的等效技術變化,均包含於本發明的保護範圍內。 The above description is only a preferred embodiment of the present invention, and is not intended to limit the scope of the present invention. Therefore, equivalent technical changes made by using the present specification and the contents of the drawings are included in the protection scope of the present invention. .

S1~S6‧‧‧步驟 S1~S6‧‧‧Steps

Claims (9)

一種導電配線的製作方法,包括:提供一基材,所述基材的上表面形成有一導電層;將所述導電層進行圖案化處理,以形成至少一導電圖案於所述基材的上表面,其中兩兩所述導電圖案之間形成一第一凹槽區域,所述第一凹槽區域的深度小於所述導電層的厚度,在所述第一凹槽區域內殘留有部分的所述導電層;於所述導電層上形成至少一第一犧牲圖案,其中所述第一犧牲圖案至少填入所述第一凹槽區域內,所述第一犧牲圖案在厚度方向上凸出於所述導電圖案的上表面,兩兩所述第一犧牲圖案之間形成一第二凹槽區域,且所述第二凹槽區域暴露至少一部分的所述導電圖案;將所述導電層進行電鍍處理,使所述第二凹槽區域所暴露的所述導電圖案增厚;移除所述第一犧牲圖案;以及移除所述第一凹槽區域內所殘留的所述導電層。 A method of fabricating a conductive wiring, comprising: providing a substrate, wherein a conductive layer is formed on an upper surface of the substrate; and patterning the conductive layer to form at least one conductive pattern on an upper surface of the substrate Forming a first groove region between the two conductive patterns, the first groove region having a depth smaller than a thickness of the conductive layer, and a portion of the first groove region remaining a conductive layer; forming at least one first sacrificial pattern on the conductive layer, wherein the first sacrificial pattern is filled in at least the first recess region, and the first sacrificial pattern protrudes in a thickness direction a second recessed region is formed between the first and second sacrificial patterns, and the second recessed region exposes at least a portion of the conductive pattern; and the conductive layer is plated And thickening the conductive pattern exposed by the second recessed region; removing the first sacrificial pattern; and removing the conductive layer remaining in the first recessed region. 如請求項第1項所述之導電配線的製作方法,其中將所述導電層進行電鍍處理的步驟之後及移除所述第一犧牲圖案的步驟之前,更進一步包括:於所述導電圖案上形成一蝕刻阻擋層。 The method of manufacturing the conductive wiring of claim 1, wherein the step of performing the plating process on the conductive layer and before the step of removing the first sacrificial pattern further comprises: on the conductive pattern An etch stop layer is formed. 如請求項第2項所述之導電配線的製作方法,其中移除所述第一凹槽區域內所殘留的所述導電層的步驟之後,更進一步包括:移除所述蝕刻阻擋層。 The method of fabricating the conductive wiring of claim 2, wherein the step of removing the conductive layer remaining in the first recessed region further comprises: removing the etch stop layer. 如請求項第1項所述之導電配線的製作方法,其中於所述導電層上形成所述第一犧牲圖案的步驟中,更進一步包括: 整面性地形成一第一犧牲層於所述導電層上,其中所述第一犧牲層填滿所述第一凹槽區域;以及將所述第一犧牲層進行圖案化處理,使所述第一犧牲層形成所述第一犧牲圖案於所述導電層上。 The method of manufacturing the conductive wiring of claim 1, wherein the step of forming the first sacrificial pattern on the conductive layer further comprises: Forming a first sacrificial layer on the conductive layer, wherein the first sacrificial layer fills the first recess region; and patterning the first sacrificial layer to cause the The first sacrificial layer forms the first sacrificial pattern on the conductive layer. 如請求項第1項所述之導電配線的製作方法,其中將所述導電層進行圖案化處理的步驟中,更進一步包括:形成一第二犧牲圖案於所述導電層上;透過所述第二犧牲圖案蝕刻所述導電層;以及移除所述第二犧牲圖案。 The method of fabricating the conductive wiring of claim 1, wherein the step of patterning the conductive layer further comprises: forming a second sacrificial pattern on the conductive layer; a sacrificial pattern etching the conductive layer; and removing the second sacrificial pattern. 如請求項第1項所述之導電配線的製作方法,其中將所述導電層進行圖案化處理的步驟中,更進一步包括:以雷射燒蝕所述導電層。 The method for fabricating a conductive wiring according to claim 1, wherein the step of patterning the conductive layer further comprises: ablating the conductive layer with a laser. 如請求項第1項所述之導電配線的製作方法,其中所述導電圖案是增厚至所述第一犧牲圖案在厚度方向上的高度。 The method of fabricating the conductive wiring of claim 1, wherein the conductive pattern is thickened to a height of the first sacrificial pattern in a thickness direction. 如請求項第1項所述之導電配線的製作方法,其中所述導電圖案與所述第一犧牲圖案為正負互補。 The method of fabricating the conductive wiring of claim 1, wherein the conductive pattern is positively and negatively complementary to the first sacrificial pattern. 如請求項第1項所述之導電配線的製作方法,其中所述第一犧牲圖案的一側壁與所述導電圖案的一側壁部分切齊。 The method of fabricating the conductive wiring of claim 1, wherein a sidewall of the first sacrificial pattern is aligned with a sidewall portion of the conductive pattern.
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