KR100772432B1 - Method of manufacturing printed circuit board - Google Patents

Method of manufacturing printed circuit board Download PDF

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Publication number
KR100772432B1
KR100772432B1 KR1020060080837A KR20060080837A KR100772432B1 KR 100772432 B1 KR100772432 B1 KR 100772432B1 KR 1020060080837 A KR1020060080837 A KR 1020060080837A KR 20060080837 A KR20060080837 A KR 20060080837A KR 100772432 B1 KR100772432 B1 KR 100772432B1
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KR
South Korea
Prior art keywords
forming
copper foil
dry film
copper
electrolytic
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KR1020060080837A
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Korean (ko)
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조원진
고영주
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대덕전자 주식회사
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    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/10Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/18Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/11Printed elements for providing electric connections to or between printed circuits
    • H05K1/111Pads for surface mounting, e.g. lay-out
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/11Printed elements for providing electric connections to or between printed circuits
    • H05K1/115Via connections; Lands around holes or via connections
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/10Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/20Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by affixing prefabricated conductor pattern
    • H05K3/205Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by affixing prefabricated conductor pattern using a pattern electroplated or electroformed on a metallic carrier
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/22Secondary treatment of printed circuits
    • H05K3/26Cleaning or polishing of the conductive pattern

Abstract

A manufacturing method of a PCB(Printed Circuit Board) is provided to prevent the short between adjacent pads by forming a bonding pad through electrolytic copper plating after nickel electrolytic plating. A manufacturing method of a PCB includes the steps of: forming dry film patterns on upper/lower surfaces of a copper foil carrier of predetermined thickness; performing electrolytic nickel coating(120) on the copper foil carrier pattern; performing electrolytic copper coating(130) on the electrolytic nickel coating layer; exfoliating the dry film pattern, and laminating a prepreg(150) and a copper foil single surface; forming a through hole by laser processing, and forming an electrolytic copper pattern on the copper foil single surface; masking the electrolytic copper pattern with the dry film, and etching the copper foil carrier; performing electroless gold coating(121) on the exposed nickel surface; and exfoliating the dry film and forming a solder resist(250) for wire bonding.

Description

인쇄 회로 기판 제조 방법{METHOD OF MANUFACTURING PRINTED CIRCUIT BOARD}Printed circuit board manufacturing method {METHOD OF MANUFACTURING PRINTED CIRCUIT BOARD}

도1a 내지 도1i는 종래 기술에 따른 패키지 인쇄 회로 기판 제조 방법을 나타낸 도면.1A-1I illustrate a method for manufacturing a packaged printed circuit board according to the prior art.

도2a 및 도2b는 피치 길이가 미세화된 경우 종래 기술에 따라 제작된 본딩 패드의 단면을 나타낸 도면.2A and 2B are cross-sectional views of bonding pads manufactured according to the prior art when the pitch length is miniaturized.

도면 3a 내지 3l는 본 발명에 따른 패키지 기판 제조 방법을 상세히 설명한 도면.3a to 3l illustrate a method for manufacturing a package substrate according to the present invention in detail.

<도면의 주요 부분에 대한 부호의 설명><Explanation of symbols for main parts of the drawings>

10 : 레진 절연층10: resin insulation layer

11, 12 : 동박11, 12: copper foil

13 : 관통홀13: through hole

14, 15 : 드라이 필름 패턴 14, 15: dry film pattern

16, 17, 18 : 본딩 패드16, 17, 18: bonding pad

110 : 드라이 필름110: dry film

120 : 니켈 도금120: nickel plated

130 : 동도금130: copper plating

150 : 프리프레그150: prepreg

160 : 동박 포일 편면160: copper foil foil one side

170 : 비아홀170: via hole

200 : 전기동 패턴200: electrophoretic pattern

250 : 솔더링 레지스트250 soldering resist

본 발명은 인쇄 회로 기판 제조 방법에 관한 것으로, 특히 본딩 패드의 피치 길이가 미세화된 초박판 패키지 인쇄 회로 기판의 제조 방법에 관한 것이다. BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a printed circuit board, and more particularly, to a method of manufacturing an ultra-thin package printed circuit board having a fine pitch length of a bonding pad.

최근 들어, 인쇄 회로 기판이 초박판화 되어짐에 따라, 와이어 본딩 패드의 피치 길이가 80㎛ 이하가 요구되고 0.04t, 3㎛ 동박 포일의 초박판이 적용되고 있다.In recent years, as a printed circuit board becomes ultra thin, the pitch length of a wire bonding pad requires 80 micrometers or less, and the ultra thin plate of 0.04t and 3 micrometers copper foils is applied.

도1a 내지 도1i는 종래 기술에 따른 패키지 인쇄 회로 기판 제조 방법을 나타낸 도면이다. 도1a를 참조하면, 프리프레그(PREPREG) 또는 동박 도포층(CCL; copper cladded layer) 등과 같이 레진 절연층(10) 상하면에 동박(11, 12)이 도포된 기판을 가공해서 동박의 두께를 12㎛에서 3㎛ 정도로 얇게 연마한다. 1A to 1I illustrate a method of manufacturing a package printed circuit board according to the prior art. Referring to FIG. 1A, a substrate having copper foils 11 and 12 coated on top and bottom surfaces of a resin insulating layer 10, such as a prepreg or a copper claded layer (CCL), may be used to reduce the thickness of the copper foil. Polish as thin as 3 μm to μm.

이어서 도1b에 도시된 바와 같이, 레이저가공을 통해 관통 홀(13)을 가공하고 드라이 필름 패턴(14, 15)을 형성함으로 와이어 본딩 패드가 제작될 부위를 패턴 형성한다. Subsequently, as shown in FIG. 1B, the through hole 13 is processed through laser processing and the dry film patterns 14 and 15 are formed to pattern the site where the wire bonding pad is to be manufactured.

도1c를 참조하면, 동도금 과정을(흔히, SAP 도금이라 칭하며, SAP는 semi- additive plating을 의미함) 통해 본딩 패드(16, 17, 18)를 형성한다. 도1d를 참조하면, 동도금 진행 과정에서 마스크로 사용되었던 드라이 필름(14, 15)을 박리하고 플래시 에칭을 통해 동박 표면을 약간 에칭한다. 이어서, 도1e를 참조하면 레진이 도포된 동박(RCC; 20) 기판을 상하면에 가압 적층하여 라미네이트 한다. Referring to FIG. 1C, bonding pads 16, 17, and 18 are formed through a copper plating process (commonly referred to as SAP plating, where SAP stands for semi-additive plating). Referring to FIG. 1D, the dry films 14 and 15, which were used as masks in the copper plating process, are peeled off and the copper foil surface is slightly etched through flash etching. Subsequently, referring to FIG. 1E, the resin-coated copper foil (RCC) 20 substrate is pressed and laminated on the upper and lower surfaces.

이어서, 도1f를 참조하면 드라이 필름 패턴(21, 22)을 형성하여 동박을 오픈하고 플라즈마 식각 과정을 거친다. 도1g를 참조하면, 화학동 급전회로를 형성하고, 이어서 도1h 과정에서 Ni/Au를 소프트 에칭하고 드라이 필름을 박리한다. 마지막으로, 도1i에 도시한 대로 플라즈마 에칭을 통해 표면을 클리닝하여 패키지 완성된다.Subsequently, referring to FIG. 1F, the dry film patterns 21 and 22 are formed to open the copper foil and undergo a plasma etching process. Referring to FIG. 1G, a chemical copper feed circuit is formed, followed by soft etching Ni / Au and peeling dry film in the process of FIG. 1H. Finally, the package is completed by cleaning the surface through plasma etching as shown in FIG. 1I.

그런데, 전술한 종래기술에 따라 패키지 인쇄 회로 기판을 제작하는 경우에 본딩 패드의 피치 길이가 미세화되면서 문제점이 발생한다.However, when fabricating a package printed circuit board according to the above-described prior art, a problem arises as the pitch length of the bonding pad becomes smaller.

도2a 및 도2b는 피치 길이가 미세화된 경우 종래 기술에 따라 제작된 본딩 패드의 단면을 나타낸 도면이다. 가령, 피치 길이가 80㎛인 디자인 룰에서 본딩 패드의 길이가 55㎛인 경우 인접하는 본딩 패드 사이의 간격은 약 25㎛ 정도가 된다. 도2a를 참조하면, 종래 기술의 경우 패드 상부 에칭 보완을 위하여 패드를 보강하게 되는데 이때에 인접하는 패드(17, 18) 사이에 전기적으로 단락될 위험이 있다. 또한, 도2b를 참조하면 기판에 SAP 도금을 형성한 후 드라이 필름을 박리하고 플래시 에칭을 하는 과정에서 에치 팩터(etch factor)로 인하여 패드의 단면이 경사지게 되므로 후속하는 전해 소프트 Ni/Au 도금 단계에서 전기적 단락의 위험이 있다.2A and 2B are cross-sectional views of bonding pads manufactured according to the prior art when the pitch length is miniaturized. For example, in a design rule having a pitch length of 80 μm, when the length of the bonding pad is 55 μm, the distance between adjacent bonding pads is about 25 μm. Referring to FIG. 2A, in the prior art, a pad is reinforced to supplement pad top etching, and there is a risk of an electrical short between adjacent pads 17 and 18. In addition, referring to FIG. 2B, after the SAP plating is formed on the substrate, the cross section of the pad is inclined due to an etch factor in the process of peeling off the dry film and performing flash etching in the subsequent electrolytic soft Ni / Au plating step. There is a risk of an electrical short.

따라서, 본 발명의 제1 목적은 본딩 패드 사이의 피치 길이가 미세화된 패키지 인쇄 회로 기판을 제조하는 방법을 제공하는 데 있다.Accordingly, a first object of the present invention is to provide a method of manufacturing a package printed circuit board having a fine pitch length between bonding pads.

본 발명의 제2 목적은 상기 제1 목적에 부가하여, 초박판 인쇄 회로 기판에 적용될 수 있는 패키지 인쇄 회로 기판을 제조하는 방법을 제공하는 데 있다.A second object of the present invention is to provide a method of manufacturing a package printed circuit board which can be applied to an ultra-thin printed circuit board in addition to the first object.

본 발명의 제3 목적은 상기 제1 목적에 부가하여, 본딩 패드를 위한 전해 Ni/Au 도금 인입선 회로 형성 공정이 필요하지 않은 패키지 인쇄 회로 기판 제조 방법을 제공하는 데 있다.A third object of the present invention is to provide a package printed circuit board manufacturing method in which, in addition to the first object, an electrolytic Ni / Au plating lead-in circuit forming process for a bonding pad is not required.

상기 목적을 달성하기 위하여, 본 발명은 본딩 패드를 구비한 패키지 인쇄 회로 기판을 제작하는 방법에 있어서 (a) 선정된 두께의 동박 캐리어 상하면에 드라이 필름을 패턴 형성하는 단계; (b) 동박이 드라이 필름 패턴에 대해 노출된 부위 위에 전해 니켈 도금을 형성하는 단계; (c) 상기 전해 니켈 도금 층 위에 전해 동도금을 형성하는 단계; (d) 패턴 형성된 드라이 필름을 모두 박리 제거하고 프리프레그 및 동박 포일 편면을 적층하는 단계; (e) 레이저가공으로 관통 홀을 형성하고 동박 포일 편면에 전기동 패턴을 형성하는 단계; (f) 상기 전기동 패턴을 드라이 필름으로 마스크하고 상기 동박 캐리어를 식각 제거하는 단계; (g) 상기 단계 (f) 결과 노출된 니켈 표면에 무전해 금도금을 수행하는 단계; 및 (h) 드라이 필름을 박리하고 와이어 본딩을 위한 솔더 레지스트를 형성하는 단계를 포함하는 패키지 인쇄 회로 기판 제조 방법을 제공한다. In order to achieve the above object, the present invention provides a method for manufacturing a package printed circuit board having a bonding pad (a) forming a dry film on the upper and lower surfaces of a copper foil carrier of a predetermined thickness; (b) forming an electrolytic nickel plating on the portions where the copper foil is exposed to the dry film pattern; (c) forming an electrolytic copper plating on the electrolytic nickel plating layer; (d) peeling off all the patterned dry films and laminating the prepreg and one side of the copper foil; (e) forming a through hole by laser processing and forming an electrophoretic pattern on one side of the copper foil; (f) masking the copper copper pattern with a dry film and etching away the copper foil carrier; (g) performing electroless gold plating on the exposed nickel surface as a result of step (f); And (h) peeling off the dry film and forming a solder resist for wire bonding.

이하에서는, 첨부 도면 도3a 내지 도3l를 참조하여 본 발명에 따른 패키지 기판 제조 방법을 상세히 설명한다. 도3a를 참조하면, 두께 300㎛ 동박(100)을 준비하여 드라이 필름(110)을 도3b와 같이 패턴 형성한다. 도3c를 참조하면, 드라이 필름으로 패턴 형성된 동박(100) 위에 전해 니켈 도금(120)을 약 5 ~ 10㎛ 정도 수행한다. 도3d를 참조하면, 전해 Ni이 도금이 수행된 기판에 전해 동도금(130)을 10 ~ 20㎛ 정도 추가로 진행한다. Hereinafter, a method for manufacturing a package substrate according to the present invention will be described in detail with reference to FIGS. 3A to 3L. Referring to FIG. 3A, a 300 μm thick copper foil 100 is prepared to form a dry film 110 as shown in FIG. 3B. Referring to FIG. 3C, electrolytic nickel plating 120 is performed on the copper foil 100 patterned with a dry film about 5 to 10 μm. Referring to FIG. 3D, the electrolytic copper plating 130 is further processed to about 10 to 20 μm on the substrate on which the electrolytic Ni is plated.

도3e를 참조하면, 드라이 필름을 박리하여 제거한다. 이어서, 도3f를 참조하면 Ni 전해 도금 층(120)과 전해 동도금(130)으로 형성된 본딩 패드 위에, 예를 들어 0.04 ~ 0.1t의 프리프레그(150) 및 동박 포일 편면(160)을 적층 한다. Referring to Figure 3e, the dry film is peeled off. Subsequently, referring to FIG. 3F, a prepreg 150 and a copper foil foil 160 having a thickness of, for example, 0.04 to 0.1t are stacked on the bonding pad formed of the Ni electrolytic plating layer 120 and the electrolytic copper plating 130.

도3g를 참조하면, 레이저 가공을 통해 비아 홀(170)을 형성하고 전기동 패턴(200)을 형성한다. 도3h를 참조하면, 드라이 필름(210) 마스크 작업을 하고, 동박 캐리어(100)를 에칭한다. 이어서, 도3i를 참조하면, 무전해 금도금(121)을 진행하고, 바람직하게는 약 1㎛ 정도 피복 한다. Referring to FIG. 3G, via holes 170 may be formed through laser processing, and electrophoretic patterns 200 may be formed. Referring to FIG. 3H, the dry film 210 is masked and the copper foil carrier 100 is etched. Next, referring to FIG. 3I, the electroless gold plating 121 is advanced, and preferably about 1 μm is coated.

도3j를 참조하면, 드라이 필름을 박리하고 솔더링 레지스트(250)를 형성한다. 이어서, 도3k 및 도3l을 참조하면 SOSP(selective organic solderable preservative) 또는 드라이 필름 마스크 및 ENIG(electroless nickel immersion gold)를 통해 솔더면(251)을 마무리 처리하고 플라즈마 클리닝을 진행한다.Referring to FIG. 3J, the dry film is peeled off to form a soldering resist 250. Subsequently, referring to FIGS. 3K and 3L, the solder surface 251 is finished and plasma cleaned through a selective organic solderable preservative (SOSP) or dry film mask and electroless nickel immersion gold (ENIG).

전술한 내용은 후술할 발명의 특허 청구 범위를 더욱 잘 이해할 수 있도록 본 발명의 특징과 기술적 장점을 다소 폭넓게 개선하였다. 본 발명의 특허 청구 범위를 구성하는 부가적인 특징과 장점들이 이하에서 상술 될 것이다. 개시된 본 발명의 개념과 특정 실시예는 본 발명과 유사 목적을 수행하기 위한 다른 구조의 설계나 수정의 기본으로서 즉시 사용될 수 있음이 당해 기술 분야의 숙련된 사람들에 의해 인식되어야 한다. The foregoing has somewhat broadly improved the features and technical advantages of the present invention to better understand the claims that follow. Additional features and advantages that make up the claims of the present invention will be described below. It should be appreciated by those skilled in the art that the conception and specific embodiments of the invention disclosed may be readily used as a basis for designing or modifying other structures for carrying out similar purposes to the invention.

또한, 본 발명에서 개시된 발명 개념과 실시예가 본 발명의 동일 목적을 수행하기 위하여 다른 구조로 수정하거나 설계하기 위한 기초로서 당해 기술 분야의 숙련된 사람들에 의해 사용될 수 있을 것이다. 또한, 당해 기술 분야의 숙련된 사람에 의한 그와 같은 수정 또는 변경된 등가 구조는 특허 청구 범위에서 기술한 발명의 사상이나 범위를 벗어나지 않는 한도 내에서 다양한 진화, 치환 및 변경이 가능하다. In addition, the inventive concepts and embodiments disclosed herein may be used by those skilled in the art as a basis for modifying or designing other structures for carrying out the same purposes of the present invention. In addition, such modifications or altered equivalent structures by those skilled in the art may be variously evolved, substituted and changed without departing from the spirit or scope of the invention described in the claims.

이상과 같이, 본원 발명은 니켈 전해 도금 후 전해 동도금을 진행하여 본딩 패드를 형성하므로 종래 기술에서 겪었던 패드 크기의 축소 문제가 발생하지 않으며, 그 결과 인접하는 패드 사이에 서로 단락되는 문제를 해결할 수 있다. As described above, since the present invention forms a bonding pad by performing electrolytic copper plating after nickel electroplating, the problem of reduction in pad size experienced in the prior art does not occur, and as a result, a problem of shorting between adjacent pads can be solved. .

또한, 본원 발명의 경우 300㎛ 정도의 동박 캐리어 상하면에 패드를 제작하므로 기판의 두께가 300㎛ 이상 확보되어 기존의 설비를 그대로 사용할 수 있는 장점이 있다. 더욱이, 본원 발명의 경우 독립 패드 전에 Ni/Au 도금을 위한 별도의 와이어링 공정이 생략되는 장점이 있다.In addition, in the case of the present invention, since the pad is manufactured on the upper and lower surfaces of the copper foil carrier of about 300 μm, the thickness of the substrate is secured to 300 μm or more, and thus there is an advantage that existing equipment can be used as it is. Furthermore, in the present invention, there is an advantage that a separate wiring process for Ni / Au plating is omitted before the independent pad.

Claims (1)

본딩 패드를 구비한 패키지 인쇄 회로 기판을 제작하는 방법에 있어서,In the method of manufacturing a package printed circuit board having a bonding pad, (a) 선정된 두께의 동박 캐리어 상하면에 드라이 필름을 패턴 형성하는 단계;(a) pattern-forming a dry film on upper and lower surfaces of a copper foil carrier of a selected thickness; (b) 동박이 드라이 필름 패턴에 대해 노출된 부위 위에 전해 니켈 도금을 형성하는 단계;(b) forming an electrolytic nickel plating on the portions where the copper foil is exposed to the dry film pattern; (c) 상기 전해 니켈 도금 층 위에 전해 동도금을 형성하는 단계;(c) forming an electrolytic copper plating on the electrolytic nickel plating layer; (d) 패턴 형성된 드라이 필름을 모두 박리 제거하고 프리프레그 및 동박 포일 편면을 적층하는 단계;(d) peeling off all the patterned dry films and laminating the prepreg and one side of the copper foil; (e) 레이저가공으로 관통 홀을 형성하고 동박 포일 편면에 전기동 패턴을 형성하는 단계;(e) forming a through hole by laser processing and forming an electrophoretic pattern on one side of the copper foil; (f) 상기 전기동 패턴을 드라이 필름으로 마스크하고 상기 동박 캐리어를 식각 제거하는 단계;(f) masking the copper copper pattern with a dry film and etching away the copper foil carrier; (g) 상기 단계 (f) 결과 노출된 니켈 표면에 무전해 금도금을 수행하는 단계; 및(g) performing electroless gold plating on the exposed nickel surface as a result of step (f); And (h) 드라이 필름을 박리하고 와이어 본딩을 위한 솔더 레지스트를 형성하는 단계(h) peeling off the dry film and forming a solder resist for wire bonding 를 포함하는 패키지 인쇄 회로 기판 제조 방법.Package printed circuit board manufacturing method comprising a.
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KR101420499B1 (en) * 2012-07-26 2014-07-16 삼성전기주식회사 Multi-layer type coreless substrate and Method of manufacturing the same
KR101580472B1 (en) * 2014-06-27 2016-01-12 대덕전자 주식회사 Method for manufacturing a circuit board
KR20160029899A (en) * 2014-09-05 2016-03-16 대덕전자 주식회사 Printed circuit board and manufacturing method thereof
CN109041414A (en) * 2017-06-09 2018-12-18 同泰电子科技股份有限公司 Circuit board structure and its preparation method

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JP2006049587A (en) 2004-08-05 2006-02-16 Cmk Corp Printed wiring board and its manufacturing method

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KR20030039553A (en) * 2001-11-13 2003-05-22 엘지전자 주식회사 Wire bonding pad structure of semiconductor package pcb
KR20030095688A (en) * 2002-06-14 2003-12-24 삼성전기주식회사 Printed circuit board and plating method thereof
JP2006049587A (en) 2004-08-05 2006-02-16 Cmk Corp Printed wiring board and its manufacturing method

Cited By (7)

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Publication number Priority date Publication date Assignee Title
CN101460017B (en) * 2007-12-11 2011-10-12 比亚迪股份有限公司 Thru-hole electroplating method for printed circuit board
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KR101640751B1 (en) 2014-09-05 2016-07-20 대덕전자 주식회사 Printed circuit board and manufacturing method thereof
CN109041414A (en) * 2017-06-09 2018-12-18 同泰电子科技股份有限公司 Circuit board structure and its preparation method
CN109041414B (en) * 2017-06-09 2022-05-10 同泰电子科技股份有限公司 Circuit board structure and manufacturing method thereof

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