KR100934107B1 - Printed circuit board manufacturing method providing fine pitch metal bumps - Google Patents

Abstract

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to the manufacture of printed circuit boards applied to the flip chip method, and to a method of manufacturing bumps of fine pitch used in flip chip connection. The present invention employs a tin plating process instead of the expensive metal sputtering process used in the past, and does not use a dry film exposure process to form a pattern of the metal bumps, and thus, when the pitch length of the metal bumps is miniaturized This does not peel off can prevent the problem that the product defects occur. Furthermore, the present invention has the advantage of excellent flatness of the gold plating layer formed on the tin plating surface to facilitate flip chip mounting.

Description

METHODS OF FABRICATING PRINTED CIRCUIT BOARD WITH FINE PITCH METAL BUMP}

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to the manufacture of a printed circuit board (PCB) applied to a flip chip method, and to manufacturing a printed circuit board having a fine pitch length of metal bumps during flip chip connection. It is about a method.

In order to miniaturize and reduce electronic products, flip chip technology, in which a semiconductor chip is directly mounted on a substrate, has been applied. In order to flip-chip a semiconductor chip onto a substrate, solder balls or bumps are required for electrical connection.

1A to 1F illustrate a process of forming a metal bump for a flip chip according to the related art. Figure 1a shows one embodiment of a typical multilayer printed circuit board. As a conventional technique for forming a metal pump on a substrate, referring to FIG. 1B, a metal sputter process is performed on a surface of a substrate to form a metal 1 on the surface.

Referring to FIG. 1C, the dry film 2 is closely adhered to the face of the substrate, and the exposure and development processes are performed according to a given predetermined circuit pattern to selectively expose the sputtered metal layer. Subsequently, when nickel and gold electroplating are performed as shown in FIG. 1D, the nickel plating layer 3 and the gold plating layer 4 are formed only at the portions where the sputtered metal layer is exposed. Subsequently, the dry film 2 is peeled off as shown in FIG. 1E (at this time, dry film peeling is difficult when the pitch length is minute), and when the sputter metal layer is etched, it is composed of nickel and gold plating as shown in FIG. 1F. Metal bumps are formed.

However, in the prior art, there is a disadvantage that an expensive metal sputtering process is required, and when the width of the metal bump to be manufactured is reduced to several tens of micrometers during the dry film adhesion, exposure, and development process of FIG. 1C, dry film peeling is not easy. There is a disadvantage.

Accordingly, a first object of the present invention is to provide a printed circuit board manufacturing method capable of miniaturizing the pitch of metal bumps for flip chip mounting.

A second object of the present invention is to provide a printed circuit board manufacturing method which can omit an expensive metal sputtering process for forming metal bumps in addition to the first object.

In order to achieve the above object, the present invention provides a tin / copper (Sn / Cu) plating on a carrier of a copper foil / intermediate layer / copper structure, such as copper-aluminum-copper (CAC). After forming a circuit pattern, a trench structure is uniformly formed by alkali etching, bumps are formed inside the trench by Au / Ni plating, and electroless copper plating is performed. After forming, the dry film is patterned to selectively expose the electroless copper plating layer and subjected to electrocopper plating, and then the dry film is peeled off and removed, the lamination process is repeated if necessary, and the finally made substrate is centered on the carrier's center layer. By peeling off copper foil of both surfaces, a laminated structure is divided up and down and a coreless board | substrate is obtained. Subsequently, by repeating alkali etching, tin etching, and alkali etching, it is characterized by the process of exposing the bump inside.

When forming the metal bumps for flip chip mounting by applying the present invention, unlike the prior art, expensive conductive layer sputter formation process is not required, and the dry film suffers when the pitch length is reduced to tens of micrometers or less and is miniaturized. It has the effect of solving the problem of incompleteness of poetry. Moreover, when applying the tin (Sn) plating proposed by the present invention, there is an advantage that the surface flatness of the plated gold (Au) is much better than the conventional coreless process.

The present invention provides a method for manufacturing a printed circuit board, comprising: (a) tin-plating layer on the entire copper foil upper / lower copper surface of a copper foil / middle layer / copper structure formed so as to peel off copper foil coated on both sides from a center layer; Forming a copper plating layer; (b) forming an etch resist pattern on the surface of the copper plating layer according to a predetermined circuit pattern, selectively etching the copper plating layer exposed by the etch resist pattern to selectively expose the tin plating layer according to the etch resist pattern, and Electroplating and nickel electroplating to form a gold plating layer and a nickel plating layer on the surface of the selectively exposed tin plating layer, and forming an electroless copper plating layer on the entire surface of the substrate; (c) forming a dry film pattern to selectively expose the electroless copper plating layer by applying a dry film on the electroless copper plating layer and performing exposure, development, and etching processes according to a predetermined circuit pattern; (d) electroplating to form the electroplating layer only at the portions where the electroless copper plating layer is selectively exposed by the dry film pattern, peeling off the dry film and performing flash etching to leave the electroless remaining on the surface. Removing the copper plating layer; (e) Cutting and cutting all the substrates laminated up and down on the copper foil of the carrier individually, and peeling and separating the center layer constituting the carrier of the copper foil / middle layer / copper structure from each of the cut substrates from the double-sided copper foil, Forming a bisected coreless substrate; And (f) removing the copper foil layer / tin layer / copper foil layer by sequentially performing alkali etching / tin peel etching / alkali etching on the two bisected coreless substrates, thereby forming a nickel and gold plating layer between the etch resists. Provided is a method of manufacturing a printed circuit board comprising the step of exposing the metal bumps.

DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, preferred embodiments of the metal bump manufacturing method according to the present invention will be described in detail with reference to the accompanying drawings, FIGS. 2A to 2P.

Referring to FIG. 2A, a copper-aluminum-copper (CAC) carrier 10 is shown centered on aluminum 10a. In the present specification, as a preferred embodiment of the present invention, the idea of the present invention is described with a CAC carrier, but the present invention is not necessarily limited to the CAC carrier. Any carrier structure of a copper foil / middle layer / copper foil structure which can be produced is possible.

First, tin (Sn) plating is performed on the entire surface of the cut CAC carrier 10 to form a tin plating layer 20 (Fig. 2B). Subsequently, referring to FIG. 2C, copper plating is performed on the entire surface such as the upper and lower surfaces and the side surfaces of the CAC carrier 10 coated with the tin plating layer 20 to form the copper plating layer 30. Here, the appearance of the plating layer on the carrier side of the drawings of FIGS. 2A to 2C is a symbolic representation of the cross section of the entire substrate to be processed, and finally, when the cutting substrate is cut and cut for each device, the plating layer on the side disappears.

Referring to FIG. 2D, a photosensitive etch resist such as PSR (Photo-Sensitive-Resist) is applied to the upper and lower surfaces of the CAC carrier 10, and exposure, development, and etching are performed according to a predetermined circuit pattern. The resist pattern 40 is formed.

When alkali etching is performed on the CAC carrier 10 selectively covering the copper plating layer 30 by the etch resist pattern 40, all of the exposed copper plating layers are etched away as shown in FIG. 2E, and the tin plating layer 20 is removed. It is selectively exposed in accordance with this etch resist pattern 40.

Referring to FIG. 2F, gold / nickel (Au / Ni) plating is performed in a state where the tin plating layer 20 is selectively exposed, thereby sequentially depositing the gold plating layer 50 only on the exposed surface portion of the tin plating layer 20. And nickel plating layer 60 is formed to form a metal bump.

Referring to FIG. 2G, electroless copper plating is performed on the entire upper and lower surfaces of the substrate on which the Au / Ni plating layers 50 and 60 are formed only on the surface of the tin plating layer 20 selectively exposed together with the etch resist pattern 40. The chemical copper 70 is formed.

The dry film is closely formed on the chemical copper 70 coated on the entire surface of the structure on the CAC carrier, and the exposure, development, and etching processes are performed in accordance with a predetermined circuit pattern to dry film pattern 80 as shown in FIG. 2H. ). At this time, the dry film pattern 80 masks the chemical copper 70 applied to the nickel plating layer 60, and when the subsequent electrocopper plating is performed, the dry film pattern 80 masks as shown in FIG. Instead, the copper plating layer 90 is formed only on the exposed chemical copper 70.

Subsequently, when the dry film which forms the pattern is peeled off and removed, a copper foil circuit is formed with the copper plating layer 90 which remains on the etch resist 40 and the nickel plating layer 60 like FIG. 2G. At this time, the chemical copper 70 remaining on the substrate surface after the dry film is peeled off is removed through a flash etching process as shown in FIG. 2K. Subsequently, the insulating layer 100 coated with copper foil is laminated and laminated to form laminated substrates on both sides of the copper foil of the CAC carrier 10 as shown in FIG. 2L. Then, according to the existing method, a dry film is covered, a copper foil circuit is formed according to a predetermined circuit pattern, and micro via holes etc. are formed as needed.

Subsequently, if necessary, the multilayer lamination process is repeated to form a multilayer substrate, and then the entire substrate is cut and cut by individual elements, and peeled from each other between the copper layer and the aluminum layer with respect to the central CAC layer for each substrate. When applying a peel off process by applying a force, the upper copper foil and the lower copper foil 10b are peeled off from each other with the aluminum layer 10a interposed therebetween, as shown in FIG. ) Into a coreless substrate.

This will be described as follows. After stacking the insulating layer 100 coated with a copper foil such as Resin Coated Copper (RCC) as shown in FIG. 2L and forming a circuit pattern through an image operation, the laminated substrate is completed several times. As shown by reference numeral 110, a structure in which two laminated circuit boards are formed on both the upper and lower sides of the CAC carrier 10 is obtained.

By the way, since the structure shown by the reference numeral 110 of FIG. 2M is repeatedly formed in the whole process board | substrate, when cutting and cutting individually, the individual board | substrate shown by the reference numeral 110 can be obtained. At this time, when the substrate is cut, the tin-plated layer side protrusion shown by reference numeral 110 in FIG. 2M does not actually appear.

Therefore, when the aluminum foil layer 10a is pressed against the central CAC carrier of the substrate indicated by reference numeral 110 in FIG. 2M and the copper foil layers 10b can be peeled off from each other, as shown in FIG. It can be separated into three parts, represented by 200 and 300.

Subsequently, alkali etching is performed on the divided and divided substrates 200 and 300 to peel off and remove the exposed copper foil 10b (not shown). As shown in FIG. 2N, when the wet etching is performed to remove the tin plating layer 20, the tin plating layer may be peeled off. Subsequently, when the alkali etching is performed, the copper plating layer 30 exposed on the substrate surface is peeled off and the metal bump 500 formed of the nickel plating layer 60 and the gold plating layer 50 between the etch resists 40 as shown in FIG. 2P. )

In the above, as a preferred embodiment of the present invention, a method of manufacturing a coreless printed circuit board using a CAC carrier as a starting substrate has been described, but it is not necessary to use a CAC carrier and the upper and lower nutrients are mainly centered on the intermediate layer in the process step shown in FIG. In order to do this, a structure capable of peeling off the substrate is sufficient. In a preferred embodiment of the present invention, a resin insulator layer coated with copper foil on both sides may be used instead of the CAC carrier.

The foregoing has somewhat broadly improved the features and technical advantages of the present invention to better understand the claims that follow. Additional features and advantages that make up the claims of the present invention will be described below. It should be appreciated by those skilled in the art that the conception and specific embodiments of the invention disclosed may be readily used as a basis for designing or modifying other structures for carrying out similar purposes to the invention.

In addition, the inventive concepts and embodiments disclosed herein may be used by those skilled in the art as a basis for modifying or designing other structures for carrying out the same purposes of the present invention. In addition, such modifications or altered equivalent structures by those skilled in the art may be variously evolved, substituted and changed without departing from the spirit or scope of the invention as described in the claims.

As described above, the present invention, unlike the prior art, instead of forming a metal layer for electroplating by performing a metal sputtering process, tin plating is performed on a substrate, thereby enabling a low-cost process to be carried out, and furthermore, a metal bump by a dry film exposure process. Since it does not define the position of the fine pitch pattern, the problem that the dry film does not peel off can be eliminated at the source. The present invention is applicable to flip chip surface mounting by making it possible to manufacture metal bumps of low cost and high reliability.

1A-1F illustrate a process of forming a metal bump for a flip chip according to the prior art.

Figure 2a to 2p shows a metal bump manufacturing method according to the present invention.

<Explanation of symbols for the main parts of the drawings>

 10: metal

 20: dry film

 30: nickel plated

 40: etch resist pattern

 50: gold plated layer

 60: nickel plated layer

 70: copper copper layer

 80: dry film pattern

 90: copper plating layer

100: insulating layer coated with copper foil

500: metal bump

Claims (1)

In the metal bump manufacturing method of a printed circuit board, (a) With respect to the carrier of the first copper foil / middle layer / first copper foil structure formed to peel off the copper foil coated on both sides from the center layer, the upper and lower surfaces of the first copper foil and the whole side surface of the carrier Forming a tin plating layer on the tin plating layer, and performing copper plating on the tin plating layer to form a second copper foil; (b) forming the etch resist pattern on the surface of the second copper foil formed on the upper and lower surfaces of the carrier according to a predetermined circuit pattern, and selectively etching the second copper foil selectively exposed by the etch resist pattern. The plating layer is selectively exposed according to the etch resist pattern, gold electroplating and nickel electroplating are performed to sequentially form a gold plating layer and a nickel plating layer on the surface of the selectively exposed tin plating layer, and electroless copper is applied to the entire surface of the substrate. Performing plating to form a third copper foil; (c) applying a dry film on the third copper foil and performing exposure, development, and etching processes according to a predetermined circuit pattern to form a dry film pattern to selectively expose the third copper foil; (d) electroforming copper plating on the third copper foil selectively masked by the dry film to form a fourth copper foil only on the exposed third copper foil, peeling off the dry film and performing flash etching on the surface. Removing the exposed third copper foil; (e) laminating the first insulating layer and the fifth copper foil on the upper and lower surfaces of the structure as a result of the step (d), selectively etching the fifth copper foil according to a predetermined circuit pattern, and plating the copper foil circuit and the interlayer electricity. Forming a connection via hole; (f) cut and cut the entire processed substrate individually so that the side of each cut individual substrate is exposed to the side of the center layer and the first copper foil, and the carrier center for each cut substrate Peeling and separating the layer from the first copper foil on both sides to form a bisected coreless substrate; And (g) alkali-etching the two bisected coreless substrates without the core as a result of the step (f) to remove the exposed first copper foil, etching exfoliating and exposing the exposed tin, and removing the tin layer to expose Etching away the second copper foil to form a metal bump formed of nickel and gold plating layers between the etch resists. Metal bump manufacturing method of a printed circuit board comprising a.

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