KR20100110454A - Method of fabricating a solder on pad for fine-pitch printed circuit board - Google Patents

Abstract

PURPOSE: A method for fabricating solder-on-pad with a fine-pitch is provided to implement a conduct process and an electrolyte solder-plate process using an existing copper foil by forming metal solder bumps on the external layer of a printed circuit board. CONSTITUTION: An electric copper plating trench is formed along a circuit pattern on both copper foils of a carrier. Solder-plating(160) is filled in the trench. Electric copper plating and the solder plating are polished to match the heights of the electric copper plating and the solder plating. Solder mask(170) and pad(180) are respectively formed on the electric copper plating and the solder plating. A multi-layered copper foil circuit is formed on an outer layer. Ni-Au plating is formed on the pad. The carrier is separated. The exposed carrier copper foil and the electric copper plating are eliminated.

Description

METHOD OF FABRICATING A SOLDER ON PAD FOR FINE-PITCH PRINTED CIRCUIT BOARD}

The present invention relates to an ultra-fine pitch length solder on pad (SOP) method for making a pitch of a copper foil circuit on a printed circuit board to several tens of micrometers, and the present invention relates to a metal solder bump of a printed circuit board. It is related with the technique formed in an outer layer.

The present invention relates to a method for making the pitch of the copper foil circuit on the printed circuit board to a level of several tens of micrometers or less than one hundred fifty micrometers, and the conventional solder-on-pad method by plating is expensive equipment such as sputter equipment. Compared to the process that requires the present invention, the present invention, despite the use of expensive sputter equipment or coining equipment, the problem of non-uniformity of the pitch (pitch length) due to the deviation of the solder plating that the prior art has Provide innovative technology to solve the problem.

In recent years, as electronic devices become smaller and slimmer, such as the thickness of portable terminals such as mobile phones and laptops being reduced to several millimeters, technology for miniaturizing copper foil circuit patterns of printed circuit boards is required.

In general, a process of forming a solder on pad (SOP) on a printed circuit board is as follows. 1A-1I illustrate a method of forming solder on a pad according to the prior art. Referring to FIGS. 1A and 1B, a metal sputter process is performed on a substrate on which a multilayer circuit is formed of a copper foil 20 and an insulating layer 10 to form a metal seed 30 on the surface of the substrate. .

Subsequently, as shown in FIG. 1C, the dry film (D / F) 40 is closely adhered to the substrate surface, and an exposure / development / etch process is performed according to a selected circuit pattern to solder the sputter deposited metal seed 30 on the substrate surface. The plating 50 exposes the desired site area. Subsequently, when the electrolytic copper plating process is performed, as shown in FIG. 1D, the solder plating 50 is formed only at the exposed portions not covered with the dry film 40.

On the other hand, after the solder plating 50 is completed for the desired portion, the dry film is peeled off and removed as shown in FIG. 1E, and the sputtered metal seed 30 remaining on the surface is etched and removed (FIG. 1F). Subsequently, a reflow process is performed to round the surface of the solder plating 50 to form a ball-shaped solder 50 '. Then, by gently pressing down the reflowed solder 50 'with the lubricant coated metal plate in the process step of FIG. 1h, the upper surface of the solder is slightly flattened to uniform the height of the solder formed on each pad. Coining process is performed.

However, the prior art proceeds with the sputter process to form a metal seed for electrolytic copper plating on the surface of the substrate, as shown in Figure 1b, in this step, expensive sputter equipment and targets are required, so the cost of manufacturing a printed circuit board It becomes the factor causing the rise. Furthermore, as shown in FIG. 1D, there may be structural differences in the size and shape of the solder formed by electrolytic copper plating, which makes it difficult to control the pitch.

Furthermore, in the case of the prior art, the coining process is performed to uniformly raise and lower the height of the solder by uniformly lowering the plate coated with lubricating oil in order to make the height of the solder ball manufactured as shown in FIG. 1H uniform. The coining process also results in high cost, which increases production costs.

Accordingly, a first object of the present invention is to provide a solder on pad (SOP) manufacturing method capable of uniformly controlling the pitch length of a copper foil circuit in a fine pattern.

A second object of the present invention is to provide a solder on pad (SOP) manufacturing method that solves the difficulty of pitch control due to the size deviation of the solder ball in addition to the first object.

A third object of the present invention is to provide a solder on pad (SOP) manufacturing method that can omit a sputtering process for electrolytic copper plating or a coining process for controlling the height deviation of solder balls in addition to the first object. have.

 The present invention can omit the sputtering process for electrolytic copper plating by generating an electroplating trench in a peelable carrier, filling and forming a solder plating in the electroplating trench, and performing surface polishing. Using the embossed dry film (D / F) to fill the electroplating trenches with solder plating, the shape of the solder is defined, allowing precise control of fine pitch lengths of tens of micrometers. The present invention finally reveals the solder bumps by peeling off the carrier and then etching away copper plating.

The present invention can omit the sputtering process for electrolytic copper plating by utilizing a peelable carrier, and precisely control the pitch length by defining the shape of the solder by using an embossed dry film (D / F). . In addition, the present invention is to form a solder by producing a copper plating bump, it is possible to maintain a constant height of the solder.

The present invention is characterized by forming solder by performing solder plating on a trench defined as a dry film. In addition, the present invention can be controlled to have a certain height through the surface polishing process. The present invention exposes the solder bumps by peeling off the carriers and then etching away copper plating.

In the present invention, since the metal solder bumps are formed on the outer layer of the printed circuit board, current and copper solder plating may be performed using existing copper foil without expensive sputter equipment and copper targets. The present invention solves the structural variation of the electrolytic solder plating through surface polishing. The present invention can form the same height as the height of the copper foil layer for each pad, so no expensive coining process is required. In addition, the present invention makes it possible to refine the pitch size because the size and shape of the solder is the same for all the pads, thereby reducing the risk of short circuit between adjacent solders in minimizing the pitch size.

The present invention relates to a method for manufacturing a printed circuit board, comprising: (a) electroplating according to a circuit pattern selected on both copper foil surfaces of a peelable carrier on which copper foils formed on both surfaces of an insulating layer may be peeled off and peeled; Forming a trench; (b) filling the inside of the trench with solder plating by applying a resist to the surface of the electroplating trench and performing solder plating; (c) polishing the surface of the electroplating and the electroplating filled with the solder plating to uniform the height of the solder plating and the electroplating; (d) forming a solder mask on the electrocopper plating and forming a pad on the solder plating; (e) laminating insulating layers on both surfaces of the carrier and repeating the hole processing and plating processes once or several times to form a multilayer copper foil circuit on the outer layer; (f) forming an outer layer solder resist and forming a nickel / gold plating on the pad; (g) pressing the insulating layer of the carrier to separate the carrier into two parts, an upper layer and a lower layer, the substrate structure having a structure formed up and down around the carrier insulating layer; (i) providing a method of manufacturing a printed circuit board comprising performing an etching process to etch away the carrier copper foil and the electrocopper plating exposed by the carrier separation.

Hereinafter, a preferred embodiment of the solder-on-pad forming method according to the present invention will be described in detail with reference to the accompanying drawings, FIGS. 2A to 2Q.

Referring to FIG. 2A, in the present invention, copper foils 110 are formed on both surfaces of an insulating layer 100 such as a prepreg, and copper foils 110 on both surfaces are slightly removed from the insulating layer 100. It is characterized by starting with a peelable carrier 101 which can be peeled off as if due to physical force.

Dry films (D / F) are coated on both surfaces of the peelable carrier 101 and subjected to an exposure / development / etch process to form a dry film bump 120 as shown in FIG. 2B. Subsequently, referring to FIG. 2C, the electrolytic plating is performed on the entire surface of the peelable carrier having the dry film bump 120 formed on the surface thereof, thereby filling the surface space not covered by the dry film bump 120 with the copper plating 130. To form (Fig. 2C).

Next, referring to FIG. 2D, when the dry film bumps 120 are peeled off and removed, trench-shaped electrocopper plating bumps are formed on both surfaces of the peelable carrier 101. Then, by adhering the dry film on both surfaces of the carrier and selectively removing the dry film 140, the dry film window is formed to expose only a desired area such as an electroplating trench as shown in FIG. 2E, and an intermetallic compound (IMC) resist layer. 150 is formed.

Thereafter, solder plating is performed to form solder plating 160 on the IMC resist layer 150 formed on the surface of the electroplating trench (FIG. 2F). Referring to FIG. 2G, when the dry film 140 is peeled off, only the solder plating 160 remains on the IMC resist layer 150 on the electroplating 130. At this time, the width of the solder plating 160 is determined by the width of the electroplating trench can ensure a uniform pitch length.

Subsequently, by performing a surface grinding process as shown in FIG. 2H, the height of the solder plating 160 is controlled to have a constant size. Thus, unlike the prior art, there is no need for a coining process in subsequent processes. Referring to FIG. 2I, the solder mask 170 according to the pad position is formed. Next, referring to FIG. 2J, a pad 180 may be formed on the solder plating 160 by gold plating, copper plating, or a combination thereof between the solder masks 170.

2K and 2L, an interlayer via hole is formed by stacking an insulating layer on both sides of a carrier substrate and performing a normal dry film processing, copper plating, laser processing, or the like to fabricate a multilayer circuit. Subsequently, as shown in FIG. 2M, a circuit is formed by laminating as many insulating layers as necessary and repeatedly performing hole processing.

Thereafter, as shown in FIG. 2N, a solder resist 200 is formed on the outer layer. Subsequently, nickel / gold plating is performed on the pad 210 to form a plating layer 220 (FIG. 2O). Then, the substrate is separated into two by peeling off by applying a force to the insulating layer 100 of the carrier 101 as shown in Figure 2p.

Finally, the alkali etching of the two separated substrates removes the copper foil 110 and the electroplated copper 130 forming the carrier substrate, and the solder plating 160 is uniform on the pad 180 as shown in FIG. It will be formed in one size and shape.

Referring to Figure 2q, the present invention allows the solder bumps to be exposed by removing copper plating after carrier removal, so that the shape of adjacent solder on pads (SOPs) is uniform and the pitch length between solders is controlled uniformly. It becomes possible. In addition, the present invention facilitates pitch control because the surface polishing process is performed to uniform the size of the solder bumps as shown in FIG. 2H.

The foregoing has somewhat broadly improved the features and technical advantages of the present invention to better understand the claims that follow. It should be appreciated by those skilled in the art that the conception and specific embodiments of the invention disclosed may be readily used as a basis for designing or modifying other structures for carrying out similar purposes to the invention.

In addition, the inventive concepts and embodiments disclosed herein may be used by those skilled in the art as a basis for modifying or designing other structures for carrying out the same purposes of the present invention. In addition, such modifications or altered equivalent structures by those skilled in the art may be variously evolved, substituted and changed without departing from the spirit or scope of the invention described in the claims.

In the present invention, since the metal solder bumps are formed on the outer layer of the printed circuit board, current and copper solder plating may be performed using existing copper foil without expensive sputter equipment and copper targets. The present invention solves the structural variation of the electrolytic solder plating through surface polishing. The present invention can form the same height as the height of the copper foil layer for each pad, so no expensive coining process is required. In addition, since the size and shape of the solder is the same for all pads, the present invention makes it possible to refine the pitch size since the risk of short circuit between adjacent solders is reduced when the pitch size is refined.

1A-1H illustrate a method for forming a solder on pad according to the prior art.

2A-2Q illustrate a method for forming a solder on pad in accordance with the present invention.

<Explanation of symbols for the main parts of the drawings>

10: insulation layer

20: copper foil

40: dry film

50: solder plating

100: insulation layer

101: peelable carrier

160: solder plating

170: solder mask

Claims (5)

In the method of manufacturing a printed circuit board, (a) forming an electroplating trench in accordance with a circuit pattern selected on both copper foil surfaces of a peelable carrier, on which copper foils formed on both surfaces of the insulating layer may be peeled off and peeled off; (b) filling the inside of the trench with solder plating by applying a resist to the surface of the electroplating trench and performing solder plating; (c) polishing the surface of the electroplating and the electroplating filled with the solder plating to uniform the height of the solder plating and the electroplating; (d) forming a solder mask on the electrocopper plating and forming a pad on the solder plating; (e) laminating insulating layers on both surfaces of the carrier and repeating the hole processing and plating processes once or several times to form a multilayer copper foil circuit on the outer layer; (f) forming an outer layer solder resist and forming a nickel / gold plating on the pad; (g) pressing the insulating layer of the carrier to separate the carrier into two parts, an upper layer and a lower layer, the substrate structure having a structure formed up and down around the carrier insulating layer; And (i) performing alkali etching to etch away the carrier copper foil and electric copper plating exposed by carrier separation; Printed circuit board manufacturing method comprising a. The method of claim 1, wherein step (a) Forming a dry film bump that selectively exposes the copper foil surface by closely contacting and selectively etching the dry film on both copper foil surfaces of a peelable carrier that may be peeled off and peeled off. ; Performing electrocopper plating on the surface of the copper foil of the carrier selectively exposed by the dry film bump and peeling off the dry film to form an electrocopper plating trench; Printed circuit board manufacturing method comprising a. The method of claim 1, wherein the pad of step (d) is gold plated, copper plated, or a combination thereof. The method of claim 1, wherein the resist of step (b) comprises an intermetallic resist (IMC resist). The method of claim 1, wherein the filling of the electroplating trench in the step (b) comprises forming a dry film window to expose the electrocopper plating trench by closely attaching and selectively etching the dry film on both surfaces of the carrier. The method of manufacturing a printed circuit board, characterized in that the resist is applied to the exposed surface of the copper plating and then solder plating.

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