TW201603212A - 積體電路元件及其封裝結構 - Google Patents

積體電路元件及其封裝結構 Download PDF

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TW201603212A
TW201603212A TW103123104A TW103123104A TW201603212A TW 201603212 A TW201603212 A TW 201603212A TW 103123104 A TW103123104 A TW 103123104A TW 103123104 A TW103123104 A TW 103123104A TW 201603212 A TW201603212 A TW 201603212A
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bump
active surface
integrated circuit
electrical
circuit component
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TW103123104A
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TWI557856B (zh
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吳雅慈
楊玉林
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立錡科技股份有限公司
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Priority to US14/520,354 priority patent/US20160005674A1/en
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    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
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Abstract

一種積體電路元件及其封裝構造，包括：一晶片，具有一主動面及一由半導體製程所形成之電子元件；一電性凸塊，經由該主動面電性連接至該電子元件；一散熱凸塊，連接至該主動面；一引線框，電性連接於該電性凸塊；以及，一密封膠，包覆該晶片、該引線框、以及該電性凸塊，並使該引線框的一部分以及該散熱凸塊外露。其中，該散熱凸塊相對於該主動面的高度，不等於該電性凸塊相對於該主動面的高度。

Description

積體電路元件及其封裝結構
本發明係關於一種積體電路元件及其封裝構造，特別是一種適用於散熱型覆晶封裝構造的積體電路元件及其封裝構造。
現今的電子產品由於功能強大，需要具備高速的運算處理能力，再者電子產品尺寸漸趨縮小以便於攜帶，因此裝置中電子元件的擺放密度高，而造成散熱設計上的挑戰。在積體電路的製造上，晶片尺寸封裝(Chip-Scale Package，CSP)即是為了因應電子產品尺寸縮小，而發展出來的積體電路封裝技術，其中的覆晶封裝(Flip-Chip Package)為目前相當流行的封裝技術。
請參考中華民國發明專利I254433(以下稱前案I)。前案I揭露了一種散熱型覆晶裝置，具有一晶片，並在晶片的主動面形成突塊(bump)，再透過基板上的引線連接到外部的銲球。而在晶片的背面則連接到一散熱片以提供主要的散熱路徑。前案I所揭露的散熱型覆晶裝置，由於其散熱片堆疊在晶片之上方，因此不易達到積體電路薄型化的目的，在縮小裝置高度的目的上將有其極限。
請參考中華民國發明專利I283447(以下稱前案II)。前案II揭露了一種覆晶薄膜封裝構造，具有一覆晶晶片設置於一可撓性基板的上 表面，一散熱片設置於可撓性基板的下表面，覆晶晶片係藉由貫穿可撓性基板的上表面以及下表面的導熱通孔，連接到散熱片。根據前案II的揭露，散熱片可以用濺鍍的方式設置於可撓性基板。由於以濺鍍方式形成的金屬層可以相當的薄，可達微米(micro-meter，um)的數量級，因此相較於前案I，前案II的覆晶封裝可以在高度上有進一步的改善。然而從其結構上分析，覆晶晶片至少需經過引線層以及導熱通孔等異質性的材料，才能到達外露的散熱片，再者導熱通孔的大小也有一定的限制，這些因素都影響了前案II所揭露的覆晶封裝構造的散熱效率。
鑒於以上的問題，本發明主要係提供一種積體電路元件及其封裝構造，特別是一種適用於散熱型覆晶封裝構造的積體電路元件及其封裝構造。
為了達到以上目的，本發明提供一種積體電路元件，包括一晶片、一電性凸塊、以及一散熱凸塊。該晶片具有一主動面及一由半導體製程所形成之電子元件，以及。該電性凸塊經由該主動面電性連接至該電子元件。該散熱凸塊連接至該主動面。其中，該散熱凸塊相對於該主動面的高度，不等於該電性凸塊相對於該主動面的高度。
又，為了達到以上目的，本發明又提供一種積體電路元件封裝結構，包括一晶片、一電性凸塊、一散熱凸塊、一引線框、以及一密封膠。該晶片包括以半導體製程所形成之一電子元件，以及一主動面。該電性凸塊經由該主動面電性連接至該電子元件。該散熱凸塊連接至該主動面。該引線框包括一引線，該引線電性連接於該電性凸塊。該密封膠包覆 該晶片、該引線框、以及該電性凸塊，並使該引線框的一部分以及該散熱凸塊外露。其中，該散熱凸塊相對於該主動面的高度，不等於該電性凸塊相對於該主動面的高度。
本發明一實施例中，其中該散熱凸塊相對於該主動面的高度，大於該電性凸塊相對於該主動面的高度。
本發明一實施例中，其中該散熱凸塊的體積大於該電性凸塊的體積。
本發明一實施例中，其中更包含一外接突塊，連接於該引線框外露於該密封膠的部分，並且電性連接於該引線。
本發明一實施例中，其中該晶片具有相對於該主動面的一背面，且該背面外露於該密封膠。
本發明一實施例中，其中該引線框包括有一引線層。
本發明的功效在於，本發明所揭露的積體電路元件及其封裝結構中，散熱凸塊與晶片的連接關係，形成了直接對外部的散熱路徑，因此能配合外部的散熱機構設計而達到良好的散熱效率。而且，由於本發明所揭露的積體電路元件封裝結構本身在結構上的精簡，使得其高度能夠進一步降低，有助於其應用裝置之薄形化，因此相當適用於可攜式電子裝置之中。
有關本發明的特徵、實作與功效，茲配合圖式作最佳實施例詳細說明如下。
100‧‧‧積體電路元件
110‧‧‧晶片
111‧‧‧主動面
115‧‧‧電子元件
116‧‧‧背面
120‧‧‧電性凸塊
121‧‧‧導電體
130‧‧‧散熱凸塊
131‧‧‧導熱體
200‧‧‧積體電路元件封裝結構
240‧‧‧引線框
245‧‧‧引線層
250‧‧‧密封膠
260‧‧‧外接突塊
第1圖：本發明所揭露之積體電路元件的截面示意圖。
第2圖：本發明所揭露一實施例之積體電路元件封裝結構的截面示意圖。
第3圖：本發明所揭露另一實施例之積體電路元件封裝結構的截面示意圖。
第4圖：本發明所揭露之積體電路元件封裝結構的上視透視圖。
第1圖為本發明所揭露之積體電路元件100的截面示意圖。積體電路元件100包含晶片110、電性凸塊120、以及散熱凸塊130。晶片110具有一主動面111以及由半導體製程所形成之一電子元件115。電性凸塊120經由主動面111而電性連接電子元件115。散熱凸塊130連接主動面111。其中，散熱凸塊130相對於主動面111的高度，不等於電性凸塊120相對於主動面111的高度。
本發明所揭露之積體電路元件100，係適用於後續所介紹之覆晶封裝結構，使得所形成的積體電路封裝具有高度低、散熱佳的優點。其中晶片110係為以任何半導體製程所形成之積體電路晶片，可以包含任何主動元件，例如場效電晶體(Field-Effect Transistor，FET)、雙載子接面電晶體(Bipolar Junction Transistor，BJT)等等，或是包含任何被動元件例如電阻、電容、電感、二極體等等。電性凸塊120係作為傳遞電性訊號之用，使得晶片110上的電路可以跟外部電路進行電性上的溝通。散熱凸塊130則用來作為晶片110的散熱路徑，使得晶片110所產生的工作熱源可藉由散熱凸塊130而有效率地散逸至外部。
另外，為了使積體電路元件100的散熱更有效率，散熱凸塊130相對於主動面111的高度，不等於電性凸塊120相對於主動面111的高度。例如在第1圖所揭露的實施例中，設計散熱凸塊130至主動面111的高度或距離，大於電性凸塊120至主動面111的高度或距離，如此當積體電路元件100的覆晶封裝的結構形成時，散熱凸塊130將直接外露於封裝結構的表面，並連接於覆晶封裝外部所設計的散熱機構，使得散熱片可以和積體電路元件100在電路板上平行放置，進而縮小整體電子裝置的厚度。
而為了使散熱凸塊130以及電性凸塊120相對於主動面111的高度(或距離)不相同，散熱凸塊130可以藉由一導熱體131連接於晶片110之主動面111，而電性凸塊120則可以藉由一導電體121連接於主動面111。導熱體131係由導熱性質良好的物質所形成，例如金屬。導電體121係由導電性質良好的物質所形成，例如金屬。利用導熱體131以及導電體121所形成的高度差，即可使散熱凸塊130以及電性凸塊120相對於主動面111的高度(或距離)不同。而由於導熱體131以及散熱凸塊130直接形成晶片110對外部的散熱路徑，因此具有良好的散熱效率。導熱體131以及導電體121的形成可以利用一般半導體製程所習知的蝕刻、濺鍍、曝光顯影等等方法來形成，此為本領域具有通常知識者，在充份了解本發明所揭露的精神之後，可利用本領域的習知技術並根據其應用上的需求加以實現和完成者，故在此不另贅述。
另外，於本發明又一實施例中，散熱凸塊130以及電性凸塊120亦可直接連接於晶片110之主動面111上，藉由散熱凸塊130以及電性凸塊120體積大小的不同而形成兩者不同的高度，例如散熱凸塊130的體積 大於電性凸塊120的體積，並使得散熱凸塊130以及電性凸塊120相對於主動面111的高度不同。
第2圖為本發明所揭露一實施例之積體電路元件封裝結構200的截面示意圖。積體電路元件封裝結構200包含晶片110、電性凸塊120、散熱凸塊130、引線框(lead frame)240、以及密封膠250。晶片110包括以半導體製程所形成之一電子元件115以及一主動面111。電性凸塊120經由主動面111電性連接至電子元件115。散熱凸塊130連接至主動面111。引線框240電性連接於電性凸塊120。密封膠250包覆晶片110、引線框240、以及電性凸塊120，並使引線框240的一部分以及散熱凸塊130外露。其中，散熱凸塊130相對於主動面111的高度，不等於電性凸塊120相對於主動面111的高度。
晶片110、電性凸塊120、以及散熱凸塊130所形成的結構即為第1圖所揭露之積體電路元件100。密封膠250可以利用例如模塑成型(molding)的方式形成，用以保護晶片110免於濕氣、氧化或是直接的碰撞，並將晶片110、電性凸塊120、散熱凸塊130、以及引線框240形成一體的結構。
另外，在本發明又一實施例中，積體電路元件封裝結構200可進一步包括一外接突塊260，連接於引線框240外露於密封膠250的部分。外接突塊260可以方便與外部電路進行電性連接，例如利用銲接的方式，使得晶片110上的電路可以跟外部電路進行電性上的溝通。
在本發明又一實施例中，其引線框240係包括有一引線層245(如第3圖所示)。
第3圖為本發明所揭露另一實施例之積體電路元件封裝結構300的截面示意圖。積體電路元件封裝結構300與第2圖所示之積體電路元件封裝結構200之不同者，在於積體電路元件封裝結構300中，晶片110具有相對於主動面115的一背面116，且背面116外露於密封膠250。晶片110的背面116外露於密封膠250，可以方便在積體電路元件封裝結構300的外部進一步加上散熱片，加強散熱的功能，因此有助於高功率電路應用的小型化。
第4圖為本發明所揭露之積體電路元件封裝結構200的上視透視圖。在本實施例中，電性突塊120可各別連接於一組引線框240，電性突塊120可直接連接於引線框240，或者是藉由一引線層245而電性連接引線框240。而積體電路元件封裝結構200的底部未被引線框240重疊的部分，即可製作散熱突塊130，以形成一導熱路徑。散熱突塊130則可依據製程技術的能力，製作成各種形狀，例如製作成方形等等。值得注意的是，第4圖所揭露之結構，僅作為說明本發明的精神之用，並不用以限制本發明的範圍。本領域具有通常知識者，在充分了解本發明的精神後，可以根據其應用上的需求來進行不同的變化設計，例如外接突塊260的排列設計，或是將複數個電性突塊120共用同一引線框240等等，故在此不另贅述。
本發明所揭露的積體電路元件封裝結構200中，散熱凸塊130與晶片110的連接關係，形成了晶片110直接對外部的散熱路徑，因此能配合外部的散熱機構設計而達到良好的散熱效率。而且，由於積體電路元件封裝結構200本身在結構上的精簡，省略了習知覆晶封裝中的基板元件，使得積體電路元件封裝結構200之高度能夠進一步降低，有助於其應 用裝置之薄形化，因此相當適用於可攜式電子裝置之中。
雖然本發明之實施例揭露如上所述，然並非用以限定本發明，任何熟習相關技藝者，在不脫離本發明之精神和範圍內，舉凡依本發明申請範圍所述之形狀、構造、特徵及數量當可做些許之變更，因此本發明之專利保護範圍須視本說明書所附之申請專利範圍所界定者為準。
200‧‧‧積體電路元件封裝結構
110‧‧‧晶片
111‧‧‧主動面
120‧‧‧電性凸塊
130‧‧‧散熱凸塊
240‧‧‧引線框
250‧‧‧密封膠
260‧‧‧外接突塊

Claims (11)

  1. 一種積體電路元件，包含：一晶片，具有一主動面及一由半導體製程所形成之電子元件；一電性凸塊，經由該主動面電性連接至該電子元件；以及一散熱凸塊，連接至該主動面；其中，該散熱凸塊相對於該主動面的高度，不等於該電性凸塊相對於該主動面的高度。
  2. 如請求項第1項所述之積體電路元件，其中該散熱凸塊相對於該主動面的高度大於該電性凸塊相對於該主動面的高度。
  3. 如請求項第1或2項所述之積體電路元件，其中該散熱凸塊的體積係大於該電性凸塊的體積。
  4. 如請求項第1或2項所述之積體電路元件，其中該散熱凸塊藉由一導熱體連接該主動面，且該電性凸塊藉由一導電體連接於該主動面。
  5. 如請求項第4項所述之積體電路元件，其中該導熱體以及該導電體的材質為金屬。
  6. 一種積體電路元件封裝結構，包含：一晶片，具有一主動面及一由半導體製程所形成之電子元件；一電性凸塊，經由該主動面電性連接至該電子元件；一散熱凸塊，連接至該主動面； 一引線框，電性連接於該電性凸塊；以及一密封膠，包覆該晶片、該引線框、以及該電性凸塊，並使該引線框的一部分以及該散熱凸塊外露；其中，該散熱凸塊相對於該主動面的高度，不等於該電性凸塊相對於該主動面的高度。
  7. 如請求項第6項所述之積體電路元件封裝結構，其中該散熱凸塊相對於該主動面的高度大於該電性凸塊相對於該主動面的高度。
  8. 如請求項第6或7項所述之積體電路元件封裝結構，其中該散熱凸塊的體積係大於該電性凸塊的體積。
  9. 如請求項第6或7項所述之積體電路元件封裝結構，更包含一外接突塊，連接於該引線框外露於該密封膠的部分。
  10. 如請求項第6或7項所述之積體電路元件封裝結構，其中該晶片具有相對於該主動面的一背面，且該背面外露於該密封膠。
  11. 如請求項第6項所述之積體電路元件封裝結構，其中該引線框包括有一引線層。
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