TW201441331A - 底部塡充片、背面硏磨用帶一體型底部塡充片、切割帶一體型底部塡充片及半導體裝置之製造方法 - Google Patents

底部塡充片、背面硏磨用帶一體型底部塡充片、切割帶一體型底部塡充片及半導體裝置之製造方法 Download PDF

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TW201441331A
TW201441331A TW103105328A TW103105328A TW201441331A TW 201441331 A TW201441331 A TW 201441331A TW 103105328 A TW103105328 A TW 103105328A TW 103105328 A TW103105328 A TW 103105328A TW 201441331 A TW201441331 A TW 201441331A
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Taiwan
Prior art keywords
underfill sheet
underfill
sheet
resin
tape
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TW103105328A
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English (en)
Inventor
Kosuke Morita
Naohide Takamoto
Hiroyuki Hanazono
Akihiro Fukui
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Nitto Denko Corp
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Publication of TW201441331A publication Critical patent/TW201441331A/zh

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    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
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    • H01L21/563Encapsulation of active face of flip-chip device, e.g. underfilling or underencapsulation of flip-chip, encapsulation preform on chip or mounting substrate
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    • C09J133/04Homopolymers or copolymers of esters
    • C09J133/06Homopolymers or copolymers of esters of esters containing only carbon, hydrogen and oxygen, the oxygen atom being present only as part of the carboxyl radical
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    • H01L21/683Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
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    • H01L23/00Details of semiconductor or other solid state devices
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    • H01L24/10Bump connectors ; Manufacturing methods related thereto
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    • H01L24/14Structure, shape, material or disposition of the bump connectors prior to the connecting process of a plurality of bump connectors
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    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L24/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
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    • H01L24/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B32LAYERED PRODUCTS
    • B32BLAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B2264/00Composition or properties of particles which form a particulate layer or are present as additives
    • B32B2264/10Inorganic particles
    • B32B2264/102Oxide or hydroxide
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B32LAYERED PRODUCTS
    • B32BLAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
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    • C08J2333/00Characterised by the use of homopolymers or copolymers of compounds having one or more unsaturated aliphatic radicals, each having only one carbon-to-carbon double bond, and only one being terminated by only one carboxyl radical, or of salts, anhydrides, esters, amides, imides, or nitriles thereof; Derivatives of such polymers
    • C08J2333/04Characterised by the use of homopolymers or copolymers of compounds having one or more unsaturated aliphatic radicals, each having only one carbon-to-carbon double bond, and only one being terminated by only one carboxyl radical, or of salts, anhydrides, esters, amides, imides, or nitriles thereof; Derivatives of such polymers esters
    • C08J2333/06Characterised by the use of homopolymers or copolymers of compounds having one or more unsaturated aliphatic radicals, each having only one carbon-to-carbon double bond, and only one being terminated by only one carboxyl radical, or of salts, anhydrides, esters, amides, imides, or nitriles thereof; Derivatives of such polymers esters of esters containing only carbon, hydrogen, and oxygen, the oxygen atom being present only as part of the carboxyl radical
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    • C08J2333/00Characterised by the use of homopolymers or copolymers of compounds having one or more unsaturated aliphatic radicals, each having only one carbon-to-carbon double bond, and only one being terminated by only one carboxyl radical, or of salts, anhydrides, esters, amides, imides, or nitriles thereof; Derivatives of such polymers
    • C08J2333/04Characterised by the use of homopolymers or copolymers of compounds having one or more unsaturated aliphatic radicals, each having only one carbon-to-carbon double bond, and only one being terminated by only one carboxyl radical, or of salts, anhydrides, esters, amides, imides, or nitriles thereof; Derivatives of such polymers esters
    • C08J2333/06Characterised by the use of homopolymers or copolymers of compounds having one or more unsaturated aliphatic radicals, each having only one carbon-to-carbon double bond, and only one being terminated by only one carboxyl radical, or of salts, anhydrides, esters, amides, imides, or nitriles thereof; Derivatives of such polymers esters of esters containing only carbon, hydrogen, and oxygen, the oxygen atom being present only as part of the carboxyl radical
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    • C08J2333/12Homopolymers or copolymers of methyl methacrylate
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    • C08J2361/00Characterised by the use of condensation polymers of aldehydes or ketones; Derivatives of such polymers
    • C08J2361/04Condensation polymers of aldehydes or ketones with phenols only
    • C08J2361/06Condensation polymers of aldehydes or ketones with phenols only of aldehydes with phenols
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    • C08J2433/00Characterised by the use of homopolymers or copolymers of compounds having one or more unsaturated aliphatic radicals, each having only one carbon-to-carbon double bond, and only one being terminated by only one carboxyl radical, or of salts, anhydrides, esters, amides, imides, or nitriles thereof; Derivatives of such polymers
    • C08J2433/04Characterised by the use of homopolymers or copolymers of compounds having one or more unsaturated aliphatic radicals, each having only one carbon-to-carbon double bond, and only one being terminated by only one carboxyl radical, or of salts, anhydrides, esters, amides, imides, or nitriles thereof; Derivatives of such polymers esters
    • C08J2433/06Characterised by the use of homopolymers or copolymers of compounds having one or more unsaturated aliphatic radicals, each having only one carbon-to-carbon double bond, and only one being terminated by only one carboxyl radical, or of salts, anhydrides, esters, amides, imides, or nitriles thereof; Derivatives of such polymers esters of esters containing only carbon, hydrogen, and oxygen, the oxygen atom being present only as part of the carboxyl radical
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    • C08J2433/00Characterised by the use of homopolymers or copolymers of compounds having one or more unsaturated aliphatic radicals, each having only one carbon-to-carbon double bond, and only one being terminated by only one carboxyl radical, or of salts, anhydrides, esters, amides, imides, or nitriles thereof; Derivatives of such polymers
    • C08J2433/04Characterised by the use of homopolymers or copolymers of compounds having one or more unsaturated aliphatic radicals, each having only one carbon-to-carbon double bond, and only one being terminated by only one carboxyl radical, or of salts, anhydrides, esters, amides, imides, or nitriles thereof; Derivatives of such polymers esters
    • C08J2433/06Characterised by the use of homopolymers or copolymers of compounds having one or more unsaturated aliphatic radicals, each having only one carbon-to-carbon double bond, and only one being terminated by only one carboxyl radical, or of salts, anhydrides, esters, amides, imides, or nitriles thereof; Derivatives of such polymers esters of esters containing only carbon, hydrogen, and oxygen, the oxygen atom being present only as part of the carboxyl radical
    • C08J2433/10Homopolymers or copolymers of methacrylic acid esters
    • C08J2433/12Homopolymers or copolymers of methyl methacrylate
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    • C08J2433/00Characterised by the use of homopolymers or copolymers of compounds having one or more unsaturated aliphatic radicals, each having only one carbon-to-carbon double bond, and only one being terminated by only one carboxyl radical, or of salts, anhydrides, esters, amides, imides, or nitriles thereof; Derivatives of such polymers
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    • C08J2463/00Characterised by the use of epoxy resins; Derivatives of epoxy resins
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    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
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    • H01L2224/13001Core members of the bump connector
    • H01L2224/13099Material
    • H01L2224/131Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
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    • H01L2224/131Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
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Abstract

本發明提供一種底部填充片,其可良好地覆蓋半導體元件之電路面之凹凸,可將半導體元件之端子與被接著體之端子良好地連接,可減少逸氣。本發明係關於一種底部填充片,其於150℃、0.05~0.20轉/分鐘時之黏度為1000~10000 Pa‧s,於100~200℃、0.3~0.7轉/分鐘時之最低黏度為100 Pa‧s以上。

Description

底部填充片、背面研磨用帶一體型底部填充片、切割帶一體型底部填充片及半導體裝置之製造方法
本發明係關於一種底部填充片、背面研磨用帶一體型底部填充片、切割帶一體型底部填充片及半導體裝置之製造方法。
近年來,由電子機器之小型、薄型化帶來之高密度安裝之要求急遽地增加。因此,關於半導體封裝,適於高密度安裝之表面安裝型代替先前之插件型成為主流。
於表面安裝後,為了確保半導體元件表面之保護或半導體元件與基板之間之連接可靠性,而對半導體元件與基板之間之空間進行液狀之密封樹脂之填充。然而,於窄間距之半導體裝置之製造中,若使用液狀之密封樹脂,則有產生空隙(氣泡)之情形。因此,亦提出使用片狀之密封樹脂(底部填充片)填充半導體元件與基板之間之空間的技術(專利文獻1)。
[先前技術文獻] [專利文獻]
[專利文獻1]日本專利第4438973號
一般而言,使用底部填充片之製程中,將設置有端子(凸塊等)之半導體元件之電路面與底部填充片貼合,故而對於底部填充片要求追 隨電路面之凹凸而密接。然而,若底部填充片之黏度較高,則有無法充分覆蓋凹凸而產生空隙之情形。又,於將半導體元件之端子與被接著體之端子連接時,有該等端子間之底部填充材料未讓出空隙而介隔底部填充材料發生連接不良之虞。另一方面,若底部填充片之黏度較低,則有於產生逸氣(於連接時或熱硬化時產生之氣體)時形成空隙之情形。
本發明係鑒於上述問題而完成者,其目的在於提供一種底部填充片,其可良好地覆蓋凹凸,可將半導體元件之端子與被接著體之端子良好地連接,可減少產生由逸氣形成之空隙。又,本發明之目的在於提供一種背面研磨用帶一體型底部填充片、切割帶一體型底部填充片及半導體裝置之製造方法。
本申請案發明者發現藉由採用下述構成可解決上述課題,從而完成本發明。
即,本發明係關於一種底部填充片,其於150℃、0.05~0.20轉/分鐘時之黏度為1000~10000Pa‧s,於100~200℃、0.3~0.7轉/分鐘時之最低黏度為100Pa‧s以上。
通常於使用底部填充片之半導體裝置之製造製程中,於加熱條件下,經由底部填充片而將半導體元件固定於被接著體。本發明之底部填充片於150℃、0.05~0.20轉/分鐘時之黏度為1000~10000Pa‧s,故而加熱條件下之底部填充片之流動性成為最佳範圍,可良好地覆蓋半導體元件表面之凹凸。又,端子間之底部填充材料良好地讓出空隙,故而可將半導體元件之端子與被接著體之端子良好地連接。
又,本發明之底部填充片於100~200℃、0.3~0.7轉/分鐘時之最低黏度為100Pa‧s以上,故而可減少產生由逸氣形成之空隙。
本發明之底部填充片較佳為包含平均粒徑0.01~10μm之二氧化 矽填料15~70重量%、丙烯酸系樹脂2~30重量%。藉此,可良好地達成上述黏度。
本發明之底部填充片較佳為於175℃下進行1小時熱硬化處理後之儲藏彈性模數E'[MPa]及熱膨脹係數α[ppm/K]於25℃下滿足下述式(1):E'×α<250000[Pa/K]‧‧‧(1)。
若底部填充片於熱硬化後之儲藏彈性模數E'[MPa]及熱膨脹係數α[ppm/K]滿足上述式(1),則可緩和半導體元件與被接著體之熱響應行為之差,而可獲得接合部之破斷受到抑制之連接可靠性較高之半導體裝置。於上述式(1)中,儲藏彈性模數E'與熱膨脹係數α成反比例關係。若儲藏彈性模數E'升高,則可提高底部填充片本身之剛性而吸收或分散應力。此時,熱膨脹係數α降低,底部填充片本身之熱膨脹行為受到抑制,故而可降低對鄰接之構件(即,半導體元件或被接著體)之機械損傷。另一方面,若儲藏彈性模數E'降低,則可提高底部填充片本身之柔軟性,而吸收鄰接之構件、尤其是被接著體之熱響應行為。此時,熱膨脹係數α升高,使底部填充片之熱響應行為與被接著體之熱響應行為同步,且因儲藏彈性模數E'之降低而對半導體元件之影響受到抑制,整體上使應力緩和。如此,可謀求半導體元件、被接著體、及底部填充片相互之應力之最佳緩和,故而亦可抑制連接構件(凸塊)之破斷,其結果為,可提高半導體裝置之連接可靠性。再者,儲藏彈性模數E'及熱膨脹係數α之測定方法係根據實施例之記載。
較佳為,上述儲藏彈性模數E'為100~10000[MPa],且上述熱膨脹係數α為10~200[ppm/K]。藉由使儲藏彈性模數E'及熱膨脹係數α分別為此種範圍,可有效率地緩和整個系統之應力。
較佳為,上述儲藏彈性模數E'[MPa]與上述熱膨脹係數α[ppm/K]滿足下述式(2): 10000<E'×α<250000[Pa/K]‧‧‧(2)。
藉由使儲藏彈性模數E'及熱膨脹係數α滿足上述式(2),可更容易地謀求半導體元件、被接著體、及底部填充片相互之應力之最佳緩和。
本發明之底部填充片較佳為包含熱硬化性樹脂。又,上述熱硬化性樹脂較佳為包含環氧樹脂與酚樹脂。藉此,可良好地達成上述黏度,並且可容易地達成底部填充片之上述式(1)之充分性。
又,本發明係關於一種背面研磨用帶一體型底部填充片,其具備:背面研磨用帶、及積層於上述背面研磨用帶上之上述底部填充片。藉由將背面研磨用帶與底部填充片一體地使用,可提高製造效率。
又,本發明係關於一種切割帶一體型底部填充片,其具備:切割帶,及積層於上述切割帶上之上述底部填充片。藉由將背面研磨用帶與底部填充片一體地使用,可提高製造效率。
又,本發明係關於一種半導體裝置之製造方法,其包括:經由上述底部填充片將半導體元件固定於被接著體之步驟。
1‧‧‧背面研磨用帶
1a‧‧‧基材
1b‧‧‧黏著劑層
2‧‧‧底部填充片
3‧‧‧半導體晶圓
3a‧‧‧半導體晶圓之電路面
3b‧‧‧半導體晶圓之與電路面相反側之面
4‧‧‧連接構件(凸塊)
5‧‧‧半導體晶片
6‧‧‧被接著體
7‧‧‧導通材料
10‧‧‧背面研磨用帶一體型底部填充片
11‧‧‧切割帶
11a‧‧‧基材
11b‧‧‧黏著劑層
20‧‧‧積層體
30‧‧‧半導體裝置
41‧‧‧切割帶
41a‧‧‧基材
41b‧‧‧黏著劑層
42‧‧‧底部填充片
43‧‧‧半導體晶圓
44‧‧‧連接構件(凸塊)
45‧‧‧半導體晶片
46‧‧‧被接著體
47‧‧‧導通材料
50‧‧‧切割帶一體型底部填充片
60‧‧‧積層體
70‧‧‧半導體裝置
圖1係背面研磨用帶一體型底部填充片之剖面模式圖。
圖2A係表示使用背面研磨用帶一體型底部填充片之半導體裝置之製造方法之一步驟的圖。
圖2B係表示使用背面研磨用帶一體型底部填充片之半導體裝置之製造方法之一步驟的圖。
圖2C係表示使用背面研磨用帶一體型底部填充片之半導體裝置之製造方法之一步驟的圖。
圖2D係表示使用背面研磨用帶一體型底部填充片之半導體裝置之製造方法之一步驟的圖。
圖2E係表示使用背面研磨用帶一體型底部填充片之半導體裝置之製造方法之一步驟的圖。
圖2F係表示使用背面研磨用帶一體型底部填充片之半導體裝置之製造方法之一步驟的圖。
圖2G係表示使用背面研磨用帶一體型底部填充片之半導體裝置之製造方法之一步驟的圖。
圖3係切割帶一體型底部填充片之剖面模式圖。
圖4A係表示使用切割帶一體型底部填充片之半導體裝置之製造方法之一步驟的圖。
圖4B係表示使用切割帶一體型底部填充片之半導體裝置之製造方法之一步驟的圖。
圖4C係表示使用切割帶一體型底部填充片之半導體裝置之製造方法之一步驟的圖。
圖4D係表示使用切割帶一體型底部填充片之半導體裝置之製造方法之一步驟的圖。
[底部填充片]
本發明之底部填充片於150℃、0.05~0.20轉/分鐘時之黏度為1000Pa‧s以上,較佳為2000Pa‧s以上。由於底部填充片於150℃、0.05~0.20轉/分鐘時之黏度為1000Pa‧s以上,故而可防止加壓時因溢出之樹脂導致加壓裝置之污染。
又,於150℃、0.05~0.20轉/分鐘時之黏度為10000Pa‧s以下,較佳為8000Pa‧s以下。由於150℃、0.05~0.20轉/分鐘時之黏度為10000Pa‧s以下,故而加熱條件下之底部填充片之流動性成為最佳範圍,可良好地覆蓋半導體元件表面之凹凸。又,端子間之底部填充材料良好地讓出空隙,故而可將半導體元件之端子與被接著體之端子 良好地連接。
150℃、0.05~0.20轉/分鐘時之黏度可藉由二氧化矽填料之粒徑、二氧化矽填料之含量、丙烯酸系樹脂之含量、丙烯酸系樹脂之分子量、熱硬化性樹脂之含量等而進行控制。
例如,藉由減小二氧化矽填料之粒徑,增大二氧化矽填料之含量,增大丙烯酸系樹脂之含量,增大丙烯酸系樹脂之分子量,減少熱硬化性樹脂之含量,可提高150℃、0.05~0.20轉/分鐘時之黏度。
又,本發明之底部填充片於100~200℃、0.3~0.7轉/分鐘時之最低黏度為100Pa‧s以上,較佳為500Pa‧s以上。由於底部填充片於100~200℃、0.3~0.7轉/分鐘時之黏度為100Pa‧s以上,故而可減少產生由逸氣形成之空隙。
又,100~200℃、0.3~0.7轉/分鐘時之最低黏度較佳為10000Pa‧s以下,更佳為8000Pa‧s以下。若100~200℃、0.3~0.7轉/分鐘時之黏度為10000Pa‧s以下,則加熱條件下之底部填充片之流動性成為最佳範圍,可良好地覆蓋半導體元件表面之凹凸。又,端子間之底部填充材料良好地讓出空隙,故而可將半導體元件之端子與被接著體之端子良好地連接。
100~200℃、0.3~0.7轉/分鐘時之最低黏度可藉由二氧化矽填料之粒徑、二氧化矽填料之含量、丙烯酸系樹脂之含量、丙烯酸系樹脂之分子量、熱硬化性樹脂之含量等而進行控制。
例如,藉由減小二氧化矽填料之粒徑,增大二氧化矽填料之含量,增大丙烯酸系樹脂之含量,增大丙烯酸系樹脂之分子量,減少熱硬化性樹脂之含量,可提高100~200℃、0.3~0.7轉/分鐘時之最低黏度。
再者,150℃、0.05~0.20轉/分鐘時之黏度、及100~200℃、0.3~0.7轉/分鐘時之最低黏度可使用流變儀進行測定。具體而言,可藉 由實施例中記載之方法進行測定。
本發明之底部填充片較佳為於175℃下進行1小時熱硬化處理後之儲藏彈性模數E'[MPa]及熱膨脹係數α[ppm/K]於25℃下滿足下述式(1):E'×α<250000[Pa/K]‧‧‧(1)。
藉由滿足上述式(1),可緩和半導體元件與被接著體之熱響應行為之差,可獲得接合部之破斷受到抑制之連接可靠性較高之半導體裝置。又,可謀求半導體元件、被接著體、及底部填充片相互作用之應力之最佳緩和,故而亦可抑制連接構件之破斷,可提高半導體裝置之連接可靠性。
較佳為,上述儲藏彈性模數E'為100~10000[MPa],且上述熱膨脹係數α為10~200[ppm/K]。藉由使儲藏彈性模數E'及熱膨脹係數α分別成為此種範圍,可有效率地緩和半導體裝置整體之系統應力。
較佳為,上述儲藏彈性模數E'[MPa]與上述熱膨脹係數α[ppm/K]滿足下述式(2):10000<E'×α<250000[Pa/K]‧‧‧(2)。
藉由使熱硬化後之底部填充片之儲藏彈性模數E'及熱膨脹係數α滿足上述式(2),可更容易地謀求半導體元件、被接著體、及底部填充片相互之應力之最佳緩和。
對底部填充片於175℃下進行1小時熱硬化處理後之玻璃轉移溫度(Tg)較佳為100~180℃,更佳為130~170℃。藉由將熱硬化後之底部填充片之玻璃轉移溫度設為上述範圍,可抑制熱循環可靠性試驗之溫度範圍內之急遽物性變化,可期待更進一步之可靠性之提高。
再者,熱硬化前之底部填充片於溫度23℃、濕度70%之條件下之吸水率較佳為1重量%以下,更佳為0.5重量%以下。藉由使底部填充片具有如上所述之吸水率,而向底部填充片之水分之吸收受到抑制, 可更有效率地抑制半導體元件於安裝時產生空隙。再者,上述吸水率之下限越小越佳,較佳為實質上0重量%,更佳為0重量%。
作為底部填充片之構成材料,就離子性雜質較少且耐熱性較高、可確保半導體元件之可靠性方面而言,較佳為使用丙烯酸系樹脂。
作為上述丙烯酸系樹脂,並無特別限定,可列舉:以1種或2種以上具有碳數30以下、尤其是碳數4~18之直鏈或支鏈之烷基的丙烯酸或甲基丙烯酸之酯作為成分之聚合物等。作為上述烷基,例如可列舉:甲基、乙基、丙基、異丙基、正丁基、第三丁基、異丁基、戊基、異戊基、己基、庚基、環己基、2-乙基己基、辛基、異辛基、壬基、異壬基、癸基、異癸基、十一烷基、月桂基、十三烷基、十四烷基、硬脂基、十八烷基、或十二烷基等。
又,作為形成上述聚合物之其他單體,並無特別限定,例如可列舉:如丙烯腈之含氰基單體,如丙烯酸、甲基丙烯酸、丙烯酸羧基乙酯、丙烯酸羧基戊酯、伊康酸、順丁烯二酸、反丁烯二酸或丁烯酸等之含羧基單體,如順丁烯二酸酐或伊康酸酐之各種酸酐單體,如(甲基)丙烯酸2-羥基乙酯、(甲基)丙烯酸2-羥基丙酯、(甲基)丙烯酸4-羥基丁酯、(甲基)丙烯酸6-羥基己酯、(甲基)丙烯酸8-羥基辛酯、(甲基)丙烯酸10-羥基癸酯、(甲基)丙烯酸12-羥基月桂酯或丙烯酸(4-羥基甲基環己基)-甲酯等之含羥基單體,如苯乙烯磺酸、烯丙基磺酸、2-(甲基)丙烯醯胺-2-甲基丙磺酸、(甲基)丙烯醯胺丙磺酸、(甲基)丙烯酸磺丙酯或(甲基)丙烯醯氧基萘磺酸等之含磺酸基單體,或如2-羥基乙基丙烯醯基磷酸酯等之含磷酸基單體。
底部填充片中之丙烯酸系樹脂之含量較佳為2重量%以上,更佳為5重量%以上。若丙烯酸系樹脂之含量為2重量%以上,則可良好地調整為上述最低黏度。又,底部填充片中之丙烯酸系樹脂之含量較佳 為30重量%以下,更佳為25重量%以下。若丙烯酸系樹脂之含量為30重量%以下,則容易成為上述150℃下之黏度範圍,可良好地覆蓋半導體元件表面之凹凸。又,端子間之底部填充材料良好地讓出空隙,故而可將半導體元件之端子與被接著體之端子良好地連接。
作為底部填充片之構成材料,較佳為使用熱硬化性樹脂。
作為上述熱硬化性樹脂,可列舉:酚樹脂、胺基樹脂、不飽和聚酯樹脂、環氧樹脂、聚胺基甲酸酯樹脂、聚矽氧樹脂、或熱硬化性聚醯亞胺樹脂等。該等樹脂可單獨使用或併用2種以上。尤其就腐蝕半導體元件之離子性雜質等含有較少方面而言,就可抑制切割之切斷面上底部填充片之糊溢出、且可抑制切斷面彼此之再附著(黏連)方面而言,較佳為環氧樹脂。又,作為環氧樹脂之硬化劑,較佳為酚樹脂。
上述環氧樹脂只要為通常用作接著劑組合物者,則並無特別限定,例如可使用:雙酚A型、雙酚F型、雙酚S型、溴化雙酚A型、氫化雙酚A型、雙酚AF型、聯苯型、萘型、茀型、苯酚酚醛清漆型、鄰甲酚酚醛清漆型、三羥基苯基甲烷型、四酚基乙烷型等二官能環氧樹脂或多官能環氧樹脂,或乙內醯脲型、異氰尿酸三縮水甘油酯型或縮水甘油胺型等環氧樹脂。該等可單獨使用或併用2種以上。該等環氧樹脂中,尤佳為:酚醛清漆型環氧樹脂、聯苯型環氧樹脂、三羥基苯基甲烷型樹脂或四酚基乙烷型環氧樹脂。其原因在於:該等環氧樹脂富有與作為硬化劑之酚樹脂之反應性,耐熱性等優異。
進而,上述酚樹脂係作為上述環氧樹脂之硬化劑發揮作用者,例如可列舉:苯酚酚醛清漆樹脂、苯酚芳烷基樹脂、甲酚酚醛清漆樹脂、第三丁基苯酚酚醛清漆樹脂、壬基苯酚酚醛清漆樹脂等酚醛清漆型酚樹脂,可溶酚醛型酚樹脂、聚對羥基苯乙烯等聚羥基苯乙烯等。該等可單獨使用或併用2種以上。該等酚樹脂中,尤佳為苯酚酚醛清 漆樹脂、苯酚芳烷基樹脂。其原因在於可提高半導體裝置之連接可靠性。
關於上述環氧樹脂與酚樹脂之調配比率,例如,較佳為以相對於上述環氧樹脂成分中之環氧基每1當量而酚樹脂中之羥基成為0.5~2.0當量之方式進行調配。更佳為0.8~1.2當量。若偏離上述範圍,則無法進行充分之硬化反應,而底部填充片之特性容易劣化。
底部填充片中之熱硬化性樹脂之含量較佳為10重量%以上,更佳為20重量%以上。若熱硬化性樹脂之含量為10重量%以上,則硬化後之熱特性提高,容易保持可靠性。又,底部填充片中之熱硬化性樹脂之含量較佳為80重量%以下,更佳為70重量%以下。若熱硬化性樹脂之含量為80重量%以下,則容易緩和應力,容易保持可靠性。
作為環氧樹脂與酚樹脂之熱硬化促進觸媒,並無特別限定,可自公知之熱硬化促進觸媒中適當選擇而使用。熱硬化促進觸媒可單獨使用或組合2種以上使用。作為熱硬化促進觸媒,例如可使用:胺系硬化促進劑、磷系硬化促進劑、咪唑系硬化促進劑、硼系硬化促進劑、磷-硼系硬化促進劑等。
熱硬化促進觸媒之含量係相對於環氧樹脂及酚樹脂之合計含量100重量份,較佳為0.1重量份以上。若熱硬化促進觸媒之含量為0.1重量份以上,則可使利用熱處理之硬化時間變短而提高生產性。又,熱硬化促進觸媒之含量較佳為5重量份以下。若熱硬化促進觸媒之含量為5重量份以下,則可提高熱硬化性樹脂之保存性。
為了去除焊錫凸塊表面之氧化膜而使半導體元件之安裝變得容易,亦可於底部填充片中添加助焊劑。作為助焊劑,並無特別限制,可使用先前公知之具有助焊作用之化合物,例如可列舉:雙酚酸、己二酸、乙醯水楊酸、苯甲酸、二苯乙醇酸、壬二酸、苄基苯甲酸、丙二酸、2,2-雙(羥基甲基)丙酸、水楊酸、鄰甲氧基苯甲酸、間羥基苯 甲酸、丁二酸、2,6-二甲氧基甲基對甲酚、苯甲酸醯肼、碳醯肼、丙二酸二醯肼、丁二酸二醯肼、戊二酸二醯肼、水楊酸醯肼、亞胺基二乙酸二醯肼、伊康酸二醯肼、檸檬酸三醯肼、硫卡肼、二苯甲酮腙、4,4'-氧基雙苯磺醯肼及己二酸二醯肼等。助焊劑之添加量只要為發揮上述助焊作用之程度即可,通常相對於底部填充片中所含之樹脂成分(丙烯酸系樹脂、熱硬化性樹脂等之樹脂成分)100重量份為0.1~20重量份左右。
底部填充片亦可視需要進行著色。於底部填充片中,藉由著色所呈現之色並無特別限制,例如較佳為:黑色、藍色、紅色、綠色等。於進行著色時,可自顏料、染料等公知之著色劑中適當選擇而使用。
於使底部填充片預先某種程度交聯之情形時,製作時,可添加與聚合物之分子鏈末端之官能基等反應之多官能性化合物作為交聯劑。藉此,可提高高溫下之接著特性而謀求耐熱性之改善。
作為上述交聯劑,尤其更佳為:甲苯二異氰酸酯、二苯基甲烷二異氰酸酯、對苯二異氰酸酯、1,5-萘二異氰酸酯、多元醇與二異氰酸酯之加成物等聚異氰酸酯化合物。交聯劑之含量可適當設定,例如,相對於樹脂成分(丙烯酸系樹脂、熱硬化性樹脂等樹脂成分)100重量份較佳為1重量份以上,更佳為5重量份以上。若交聯劑之含量為1重量份以上,則可良好地調整為上述最低黏度。又,交聯劑之含量較佳為50重量份以下,更佳為20重量份以下。若交聯劑之含量為50重量份以下,則可保持流動性並且謀求耐熱性之改善。
較佳為,於底部填充片中調配平均粒徑0.01~10μm之二氧化矽填料。藉此,可調整黏度範圍、儲藏彈性模數。又,可提高導電性或導熱性。作為二氧化矽填料,並無特別限定,可較佳地使用熔融二氧化矽。
二氧化矽填料之平均粒徑較佳為0.01μm以上,更佳為0.05μm以上。若二氧化矽填料之平均粒徑為0.01μm以上,則可抑制由填料之表面積對片材可撓性產生影響。二氧化矽填料之平均粒徑較佳為10μm以下,更佳為1μm以下。若二氧化矽填料之平均粒徑為10μm以下,則可高效率地填充於晶片與基板之間之間隙。
再者,平均粒徑係利用光度式粒度分佈計(HORIBA製造,裝置名:LA-910)求出之值。
底部填充片中之二氧化矽填料之含量較佳為15重量%以上,進而較佳為40重量%以上。若二氧化矽填料之含量為15重量%以上,則容易保持高溫時之樹脂之黏度。又,底部填充片中之二氧化矽填料之含量較佳為70重量%以下。若二氧化矽填料之含量為70重量%以下,則可保持150℃下之熱硬化性樹脂之流動性,提高對凹凸之覆蓋性。
再者,可於底部填充片中視需要適當地調配其他添加劑。作為其他添加劑,例如可列舉:阻燃劑、矽烷偶合劑或離子捕捉劑等。作為上述阻燃劑,例如可列舉:三氧化二銻、五氧化二銻、溴化環氧樹脂等。該等可單獨使用或併用2種以上。作為上述矽烷偶合劑,例如可列舉:β-(3,4-環氧基環己基)乙基三甲氧基矽烷、γ-縮水甘油氧基丙基三甲氧基矽烷、γ-縮水甘油氧基丙基甲基二乙氧基矽烷等。該等化合物可單獨使用或併用2種以上。作為上述離子捕捉劑,例如可列舉:水滑石類、氫氧化鉍等。該等可單獨使用或併用2種以上。
底部填充片例如可以如下之方式製作。首先,調配作為底部填充片之形成材料之上述各成分,使其等溶解或分散於溶劑(例如甲基乙基酮、乙酸乙酯等)中而製備塗佈液。其次,將所製備之塗佈液以成為特定厚度之方式塗佈於基材分隔件上而形成塗佈膜後,將該塗佈膜於特定條件下進行乾燥,而形成底部填充片。
底部填充片之厚度只要考慮半導體元件與被接著體間之間隙或 連接構件之高度而適當設定即可。厚度較佳為10~100μm。
底部填充片較佳為受分隔件保護。分隔件具有作為於供於實用前保護底部填充片之保護材料的功能。分隔件係於在底部填充片上貼合半導體元件時被剝去。作為分隔件,亦可使用經聚對苯二甲酸乙二酯(PET)、聚乙烯、聚丙烯、或氟系剝離劑、丙烯酸長鏈烷基酯系剝離劑等剝離劑進行過表面塗佈的塑膠膜或紙等。
可使用本發明之底部填充片利用通常之方法製造半導體裝置。具體而言,於加熱條件下經由底部填充片而將半導體元件固定於被接著體,藉此可製造半導體裝置。
作為加熱條件,並無特別限定,較佳為200~300℃。本發明之底部填充片具有上述黏度特性,故而於上述加熱條件下,流動性成為最佳範圍,可良好地覆蓋半導體元件表面之凹凸,可將端子間良好地連接。又,亦可減少產生由逸氣形成之空隙。
作為半導體元件,可列舉半導體晶圓、半導體晶片等。作為被接著體,可列舉:配線電路基板、撓性基板、內插器(interposer)、半導體晶圓、半導體晶片等。
[背面研磨用帶一體型底部填充片]
本發明之背面研磨用帶一體型底部填充片具備:背面研磨用帶、及上述底部填充片。
圖1係背面研磨用帶一體型底部填充片10之剖面模式圖。如圖1所示,背面研磨用帶一體型底部填充片10具備:背面研磨用帶1、及積層於背面研磨用帶上之底部填充片2。再者,底部填充片2可如圖1所示般積層於背面研磨用帶1之整個面,亦可以充分之尺寸設置為與半導體晶圓3(參照圖2A)貼合。
(背面研磨用帶)
背面研磨用帶1具備:基材1a、及積層於基材1a上之黏著劑層 1b。再者,底部填充片2係積層於黏著劑層1b上。
上述基材1a係成為背面研磨用帶一體型底部填充片10之強度母體者。例如,可列舉:低密度聚乙烯、直鏈狀聚乙烯、中密度聚乙烯、高密度聚乙烯、超低密度聚乙烯、無規共聚聚丙烯、嵌段共聚聚丙烯、均聚丙烯、聚丁烯、聚甲基戊烯等聚烯烴,乙烯-乙酸乙烯酯共聚物、離子聚合物樹脂、乙烯-(甲基)丙烯酸共聚物、乙烯-(甲基)丙烯酸酯(無規、交替)共聚物、乙烯-丁烯共聚物、乙烯-己烯共聚物、聚胺基甲酸酯、聚對苯二甲酸乙二酯、聚萘二甲酸乙二酯等聚酯,聚碳酸酯、聚醯亞胺、聚醚醚酮、聚醯亞胺、聚醚醯亞胺、聚醯胺、全芳香族聚醯胺、聚苯硫醚、芳族聚醯胺(紙)、玻璃、玻璃布、氟樹脂、聚氯乙烯、聚偏二氯乙烯、纖維素系樹脂、聚矽氧樹脂、金屬(箔)、紙等。於黏著劑層1b為紫外線硬化型之情形時,基材1a較佳為對紫外線具有穿透性。
亦可對基材1a之表面實施慣用之表面處理。
上述基材1a可適當地選擇而使用同種或異種者,可視需要使用摻合有複數種者。又,為了對基材1a賦予防靜電能力,可於上述基材1a上設置包含金屬、合金、該等之氧化物等之厚度為30~500Å左右之導電性物質的蒸鍍層。基材1a可為單層或2種以上之複數層。
基材1a之厚度可適當地決定,通常為約5μm以上且200μm以下,較佳為35μm以上且120μm以下。
再者,於基材1a中,亦可於無損本發明之效果等之範圍內,包含各種添加劑(例如,著色劑、填充劑、塑化劑、抗老化劑、抗氧化劑、界面活性劑、阻燃劑等)。
用於形成黏著劑層1b之黏著劑只要為於切割時經由底部填充片而牢固地保持半導體晶圓或半導體晶片、於拾取時能可剝離地控制附底部填充片之半導體晶片者,則並無特別限制。例如可使用丙烯酸系 黏著劑、橡膠系黏著劑等通常之感壓性接著劑。作為上述感壓性接著劑,就半導體晶圓或玻璃等避忌污染之電子零件的利用超純水或醇等有機溶劑之潔淨洗淨性等方面而言,較佳為以丙烯酸系聚合物作為基礎聚合物之丙烯酸系黏著劑。
作為上述丙烯酸系聚合物,可列舉將丙烯酸酯用作主單體成分者。作為上述丙烯酸酯,例如可列舉將1種或2種以上(甲基)丙烯酸烷基酯(例如,甲酯、乙酯、丙酯、異丙酯、丁酯、異丁酯、第二丁酯、第三丁酯、戊酯、異戊酯、己酯、庚酯、辛酯、2-乙基己酯、異辛酯、壬酯、癸酯、異癸酯、十一烷基酯、十二烷基酯、十三烷基酯、十四烷基酯、十六烷基酯、十八烷基酯、二十烷基酯等烷基之碳數為1~30、尤其是碳數為4~18之直鏈狀或支鏈狀之烷基酯等)及(甲基)丙烯酸環烷基酯(例如,環戊酯、環己酯等)用作單體成分之丙烯酸系聚合物等。再者,所謂(甲基)丙烯酸酯,係指丙烯酸酯及/或甲基丙烯酸酯,本發明之(甲基)全為相同之含義。
為了凝集力、耐熱性等之改質,上述丙烯酸系聚合物亦可視需要包含對應可與上述(甲基)丙烯酸烷基酯或環烷基酯共聚合之其他單體成分之單元。作為此種單體成分,例如可列舉:丙烯酸、甲基丙烯酸、(甲基)丙烯酸羧基乙酯、(甲基)丙烯酸羧基戊酯、伊康酸、順丁烯二酸、反丁烯二酸、丁烯酸等含羧基單體;順丁烯二酸酐、伊康酸酐等酸酐單體;(甲基)丙烯酸2-羥基乙酯、(甲基)丙烯酸2-羥基丙酯、(甲基)丙烯酸4-羥基丁酯、(甲基)丙烯酸6-羥基己酯、(甲基)丙烯酸8-羥基辛酯、(甲基)丙烯酸10-羥基癸酯、(甲基)丙烯酸12-羥基月桂酯、(甲基)丙烯酸(4-羥基甲基環己基)甲酯等含羥基單體;苯乙烯磺酸、烯丙基磺酸、2-(甲基)丙烯醯胺-2-甲基丙磺酸、(甲基)丙烯醯胺丙磺酸、(甲基)丙烯酸磺丙酯、(甲基)丙烯醯氧基萘磺酸等含磺酸基單體;2-羥基乙基丙烯醯基磷酸酯等含磷酸基單體;丙烯醯胺、丙烯 腈等。該等可共聚合之單體成分可使用1種或2種以上。該等可共聚合之單體之使用量較佳為全部單體成分之40重量%以下。
進而,為了進行交聯,上述丙烯酸系聚合物亦可視需要含有多官能性單體等作為共聚合用單體成分。作為此種多官能性單體,例如可列舉:己二醇二(甲基)丙烯酸酯、(聚)乙二醇二(甲基)丙烯酸酯、(聚)丙二醇二(甲基)丙烯酸酯、新戊二醇二(甲基)丙烯酸酯、季戊四醇二(甲基)丙烯酸酯、三羥甲基丙烷三(甲基)丙烯酸酯、季戊四醇三(甲基)丙烯酸酯、二季戊四醇六(甲基)丙烯酸酯、環氧(甲基)丙烯酸酯、(甲基)丙烯酸聚酯、(甲基)丙烯酸胺基甲酸酯等。該等多官能性單體可使用1種或2種以上。多官能性單體之使用量就黏著特性等方面而言,較佳為全部單體成分之30重量%以下。
上述丙烯酸系聚合物可藉由將單一單體或2種以上單體混合物供於聚合而獲得。聚合可以溶液聚合、乳化聚合、塊狀聚合、懸濁聚合等任一種方式進行。就防止對潔淨被接著體之污染等方面而言,較佳為低分子量物質之含量較小。就該方面而言,丙烯酸系聚合物之數量平均分子量較佳為30萬以上,進而較佳為40萬~300萬左右。
又,上述黏著劑中,為了提高作為基礎聚合物之丙烯酸系聚合物等之數量平均分子量,亦可適當地採用外部交聯劑。作為外部交聯方法之具體方法,可列舉添加聚異氰酸酯化合物、環氧化合物、氮丙啶化合物、三聚氰胺系交聯劑等所謂之交聯劑而進行反應之方法。於使用外部交聯劑之情形時,其使用量係根據其與應交聯之基礎聚合物之平衡、進而根據作為黏著劑之使用用途而適當決定。一般而言,相對於上述基礎聚合物100重量份,較佳為調配約5重量份以下,進而較佳為調配0.1~5重量份。進而,黏著劑中除上述成分以外,亦可視需要使用先前公知之各種黏著賦予劑、抗老化劑等添加劑。
黏著劑層1b可由放射線硬化型黏著劑而形成。放射線硬化型黏 著劑可藉由紫外線等放射線之照射而增大交聯度,從而容易地降低其黏著力,可容易地進行拾取。作為放射線,可列舉:X射線、紫外線、電子束、α射線、β射線、中子射線等。
放射線硬化型黏著劑可無特別限制地使用具有碳-碳雙鍵等放射線硬化性之官能基且顯示黏著性者。作為放射線硬化型黏著劑,例如可例示於上述丙烯酸系黏著劑、橡膠系黏著劑等通常之感壓性黏著劑中調配有放射線硬化性之單體成分或低聚物成分的添加型放射線硬化性黏著劑。
作為調配之放射線硬化性之單體成分,例如可列舉:胺基甲酸酯低聚物、(甲基)丙烯酸胺基甲酸酯、三羥甲基丙烷三(甲基)丙烯酸酯、四羥甲基甲烷四(甲基)丙烯酸酯、季戊四醇三(甲基)丙烯酸酯、季戊四醇四(甲基)丙烯酸酯、二季戊四醇單羥基五(甲基)丙烯酸酯、二季戊四醇六(甲基)丙烯酸酯、1,4-丁二醇二(甲基)丙烯酸酯等。又,放射線硬化性之低聚物成分可列舉:胺基甲酸酯系、聚醚系、聚酯系、聚碳酸酯系、聚丁二烯系等各種低聚物,較合適為其重量平均分子量為100~30000左右之範圍者。放射線硬化性之單體成分或低聚物成分之調配量可根據上述黏著劑層之種類而適當地決定可降低黏著劑層之黏著力之量。一般而言,相對於構成黏著劑之丙烯酸系聚合物等基礎聚合物100重量份,例如為5~500重量份,較佳為40~150重量份左右。
又,作為放射線硬化型黏著劑,除上述說明之添加型放射線硬化性黏著劑以外,亦可列舉使用在聚合物側鏈或主鏈中或主鏈末端具有碳-碳雙鍵者作為基礎聚合物的內在型放射線硬化性黏著劑。內在型放射線硬化性黏著劑並非必須含有作為低分子成分之低聚物成分等,或含量不大,故而並無低聚物成分等經過一段時間於黏著劑中移動,可形成層結構穩定之黏著劑層,故而較佳。
上述具有碳-碳雙鍵之基礎聚合物,可無特別限制地使用具有碳-碳雙鍵、且具有黏著性者。作為此種基礎聚合物,較佳為以丙烯酸系聚合物作為基本骨架者。作為丙烯酸系聚合物之基本骨架,可列舉上述例示之丙烯酸系聚合物。
向上述丙烯酸系聚合物導入碳-碳雙鍵之方法並無特別限制,可採用各種方法,但將碳-碳雙鍵導入至聚合物側鏈中時分子設計較為容易。例如可列舉如下方法:預先使具有官能基之單體共聚合成丙烯酸系聚合物,此後使具有可與該官能基反應之官能基及碳-碳雙鍵之化合物維持碳-碳雙鍵之放射線硬化性而進行縮合或加成反應。
作為該等官能基之組合之例,可列舉:羧酸基與環氧基、羧酸基與氮丙啶基、羥基與異氰酸酯基等。於該等官能基之組合中,就追蹤反應之容易性而言,較佳為羥基與異氰酸酯基之組合。又,若為如藉由該等官能基之組合而生成上述具有碳-碳雙鍵之丙烯酸系聚合物的組合,則官能基可位於丙烯酸系聚合物與上述化合物之任一側,於上述較佳之組合中,較佳為丙烯酸系聚合物具有羥基、上述化合物具有異氰酸酯基之情形。於該情形時,作為具有碳-碳雙鍵之異氰酸酯化合物,例如可列舉:甲基丙烯醯基異氰酸酯、2-甲基丙烯醯氧基乙基異氰酸酯、間-異丙烯基-α,α-二甲基苄基異氰酸酯等。又,作為丙烯酸系聚合物,可使用使上述例示之含羥基單體或2-羥基乙基乙烯醚、4-羥基丁基乙烯醚、二乙二醇單乙烯醚之醚系化合物等共聚合而成者。
上述內在型放射線硬化性黏著劑可單獨使用上述具有碳-碳雙鍵之基礎聚合物(尤其是丙烯酸系聚合物),亦可於不使特性劣化之程度調配上述放射線硬化性之單體成分或低聚物成分。放射線硬化性之低聚物成分等通常相對於基礎聚合物100重量份為30重量份之範圍內,較佳為0~10重量份之範圍。
上述放射線硬化型黏著劑中,於藉由紫外線等進行硬化之情形時,較好含有光聚合起始劑。作為光聚合起始劑,例如可列舉:4-(2-羥基乙氧基)苯基(2-羥基-2-丙基)酮、α-羥基-α,α'-二甲基苯乙酮、2-甲基-2-羥基苯丙酮、1-羥基環己基苯基酮等α-酮醇系化合物;甲氧基苯乙酮、2,2-二甲氧基-2-苯基苯乙酮、2,2-二乙氧基苯乙酮、2-甲基-1-[4-(甲硫基)-苯基]-2-嗎啉基丙烷-1等苯乙酮系化合物;安息香乙醚、安息香異丙醚、茴香偶姻甲醚等安息香醚系化合物;苯偶醯二甲基縮酮等縮酮系化合物;2-萘磺醯氯等芳香族磺醯氯系化合物;1-苯酮-1,1-丙烷二酮-2-(O-乙氧基羰基)肟等光活性肟系化合物;二苯甲酮、苯甲醯苯甲酸、3,3'-二甲基-4-甲氧基二苯甲酮等二苯甲酮系化合物;噻噸酮、2-氯噻噸酮、2-甲基噻噸酮、2,4-二甲基噻噸酮、異丙基噻噸酮、2,4-二氯噻噸酮、2,4-二乙基噻噸酮、2,4-二異丙基噻噸酮等噻噸酮系化合物;樟腦醌;鹵代酮;醯基膦氧化物;醯基磷酸酯等。光聚合起始劑之調配量係相對於構成黏著劑之丙烯酸系聚合物等基礎聚合物100重量份例如為約0.05~20重量份。
再者,於在放射線照射時由氧引起硬化阻礙的情形時,較理想為利用任意之方法自放射線硬化型之黏著劑層1b之表面阻斷氧氣(空氣)。例如,可列舉:以分隔件被覆上述黏著劑層1b之表面之方法,或於氮氣氣體環境中進行紫外線等放射線照射之方法等。
再者,黏著劑層1b中亦可於無損本發明之效果等之範圍內包含各種添加劑(例如,著色劑、增黏劑、增量劑、填充劑、黏著賦予劑、塑化劑、抗老化劑、抗氧化劑、界面活性劑、交聯劑等)。
黏著劑層1b之厚度並無特別限定,就防止晶片切斷面之缺損、保持底部填充片2固定之兼顧性等觀點而言,較佳為約1~50μm。較佳為2~30μm,進而較佳為5~25μm。
(背面研磨用帶一體型底部填充片之製造方法)
背面研磨用帶一體型底部填充片10例如可藉由分別預先製作背面研磨用帶1及底部填充片2,並於最後將該等貼合而進行製作。
(使用背面研磨用帶一體型底部填充片之半導體裝置之製造方法)
其次,對於使用背面研磨用帶一體型底部填充片10之半導體裝置之製造方法進行說明。圖2係表示使用背面研磨用帶一體型底部填充片10之半導體裝置之製造方法之各步驟的圖。
具體而言,該半導體裝置之製造方法包括:貼合步驟,其係將半導體晶圓3之形成有連接構件4之電路面3a與背面研磨用帶一體型底部填充片10之底部填充片2進行貼合;研磨步驟,其係對半導體晶圓3之背面3b進行研磨;晶圓固定步驟,其係於半導體晶圓3之背面3b貼附切割帶11;剝離步驟,其係將背面研磨用帶1剝離;切割步驟,其係將半導體晶圓3切割而形成附底部填充片2之半導體晶片5;及拾取步驟,其將附底部填充片2之半導體晶片5自切割帶11剝離;連接步驟,其係以底部填充片2填充被接著體6與半導體晶片5之間之空間且經由連接構件4而將半導體晶片5與被接著體6電性連接;及硬化步驟,其係使底部填充片2硬化。
<貼合步驟>
於貼合步驟中,將半導體晶圓3之形成有連接構件4之電路面3a與背面研磨用帶一體型底部填充片10之底部填充片2進行貼合(參照圖2A)。
半導體晶圓3之電路面3a上形成有複數個連接構件4(參照圖2A)。作為連接構件4之材質,並無特別限定,例如可列舉:錫-鉛系金屬材料、錫-銀系金屬材料、錫-銀-銅系金屬材料、錫-鋅系金屬材料、錫-鋅-鉍系金屬材料等焊料類(合金)、或金系金屬材料、銅系金屬材料等。連接構件4之高度亦根據用途而決定,一般為約15~100μm。當然,半導體晶圓3中之每個連接構件4之高度可相同亦可不同。
較佳為,形成於半導體晶圓3表面之連接構件4之高度X(μm)與底部填充片2之厚度Y(μm)滿足下述關係:0.5≦Y/X≦2。
藉由使連接構件4之高度X(μm)與底部填充片2之厚度Y(μm)滿足上述關係,而可充分地填充半導體晶片5與被接著體6之間之空間,並且可防止底部填充片2自該空間之過量溢出,可防止由底部填充片2導致污染半導體晶片5等。再者,於各連接構件4之高度不同之情形時,以最高之連接構件4之高度作為基準。
首先,將任意地設置於背面研磨用帶一體型底部填充片10之底部填充片2上的分隔件適當地剝離,如圖2A所示,使半導體晶圓3之形成有連接構件4之電路面3a與底部填充片2對向,而將底部填充片2與半導體晶圓3進行貼合(安裝)。
貼合之方法並無特別限定,較佳為壓接之方法。壓接之壓力較佳為0.1MPa以上,更佳為0.2MPa以上。若壓接之壓力為0.1MPa以上,則可良好地覆蓋半導體晶圓3之電路面3a之凹凸。又,壓接之壓力之上限並無特別限定,較佳為1MPa以下,更佳為0.5MPa以下。
貼合之溫度較佳為60℃以上,更佳為70℃以上。若貼合之溫度為60℃以上,則底部填充片2之黏度降低,可無空隙地填充半導體晶圓3之凹凸。又,貼合之溫度較佳為100℃以下,更佳為80℃以下。若貼合之溫度為100℃以下,則可抑制底部填充片2之硬化反應而進行貼合。
貼合較佳為於減壓下進行,例如為1000Pa以下,較佳為500Pa以下。下限並無特別限定,例如為1Pa以上。
<研磨步驟>
於研磨步驟中,對半導體晶圓3之與電路面3a相反側之面(即背面)3b進行研磨(參照圖2B)。作為用於半導體晶圓3之背面研磨之薄型 加工機,並無特別限定,例如可例示研磨機(背面研磨機)、研磨墊等。又,亦可利用蝕刻等化學方法進行背面研磨。背面研磨係進行至半導體晶圓3成為所需厚度(例如,700~25μm)為止。
<晶圓固定步驟>
於研磨步驟後,對半導體晶圓3之背面3b貼附切割帶11(參照圖2C)。再者,切割帶11具有在基材11a上積層有黏著劑層11b之構造。作為基材11a及黏著劑層11b,可使用背面研磨用帶1之基材1a及黏著劑層1b之項中所示之成分及製法而較佳地製作。
<剝離步驟>
繼而,將背面研磨用帶1剝離(參照圖2D)。藉此,使底部填充片2成為露出之狀態。
於將背面研磨用帶1剝離時,黏著劑層1b具有放射線硬化性之情形時,可藉由對黏著劑層1b照射放射線而使黏著劑層1b硬化,而容易地進行剝離。放射線之照射量係考慮使用之放射線之種類或黏著劑層之硬化度等而適當設定即可。
<切割步驟>
於切割步驟中,如圖2E所示將半導體晶圓3及底部填充片2切割而形成經切割之附底部填充片2之半導體晶片5。切割係根據常法自半導體晶圓3之貼合有底部填充片2之電路面3a而進行。例如,可採用切入至切割帶11為止之被稱為全切之切斷方式等。作為用於本步驟之切割裝置,並無特別限定,可使用先前公知者。
再者,於繼切割步驟後進行切割帶11之擴展之情形時,該擴展可使用先前公知之擴展裝置進行。
<拾取步驟>
為了回收接著固定於切割帶11之半導體晶片5,如圖2F所示,進行附底部填充片2之半導體晶片5之拾取,將半導體晶片5與底部填充 片2之積層體20自切割帶11剝離。
作為拾取之方法,並無特別限定,可採用先前公知之各種方法。
此處,拾取係於切割帶11之黏著劑層11b為紫外線硬化型之情形時,對該黏著劑層11b照射紫外線後進行。藉此,黏著劑層11b對半導體晶片5之黏著力降低,半導體晶片5之剝離變得容易。其結果為,可不損傷半導體晶片5而進行拾取。
<連接步驟>
於連接步驟中,以底部填充片2填充被接著體6與半導體晶片5之間之空間,且經由連接構件4而將半導體晶片5與被接著體6電性連接(參照圖2G)。具體而言,根據常法將積層體20之半導體晶片5以半導體晶片5之電路面3a與被接著體6對向之形態固定於被接著體6。例如,一面使形成於半導體晶片5之連接構件4接觸被接著於被接著體6之連接墊的接合用導電材料7並進行推壓,一面使導電材料7熔融,藉此可確保半導體晶片5與被接著體6之電性連接,使半導體晶片5固定於被接著體6。於半導體晶片5之電路面3a貼附有底部填充片2,故而將半導體晶片5與被接著體6電性連接之同時,底部填充片2填充半導體晶片5與被接著體6之間之空間。
作為連接步驟之加熱條件,與上述底部填充片之加熱條件相同。
底部填充片2具有上述黏度特性,故而於上述加熱條件下,流動性成為最佳範圍,可良好地覆蓋半導體元件表面之凹凸,可將端子間良好地連接。又,亦可減少產生由逸氣形成之空隙。再者,於上述加熱條件下,可使連接構件4及導電材料7之一者或兩者熔融。
再者,亦可以多階段進行連接步驟中之熱壓接處理。藉由以多階段進行熱壓接處理,可高效率地去除連接構件與墊間之樹脂,可獲 得更良好之金屬間接合。
加壓條件並無特別限定,較佳為10N以上,更佳為20N以上。若加壓條件為10N以上,則容易推開位於接合端子與連接基板之間之底部填充,容易獲得良好之接合。上限較佳為300N以下,更佳為150N以下。若加壓條件為300N以下,則可抑制半導體晶片5之損傷。
<硬化步驟>
進行半導體元件5與被接著體6之電性連接後,藉由加熱底部填充片2而使其硬化。藉此,可保護半導體元件5之表面,並且可確保半導體元件5與被接著體6之間之連接可靠性。作為用以使底部填充片2硬化之加熱溫度,並無特別限定,例如於150~200℃下進行10~120分鐘。再者,亦可藉由連接步驟中之加熱處理而使底部填充片硬化。
<密封步驟>
繼而,亦可進行密封步驟用以保護具備所安裝之半導體晶片5之半導體裝置30整體。密封步驟係使用密封樹脂進行。作為此時之密封條件,並無特別限定,通常藉由在175℃下進行60秒~90秒之加熱,而進行密封樹脂之熱硬化,但本發明並不限定於此,例如可於165℃~185℃下進行數分鐘固化。
作為密封樹脂,較佳為具有絕緣性之樹脂(絕緣樹脂),可自公知之密封樹脂中適當選擇而使用。
<半導體裝置>
於半導體裝置30中,將半導體晶片5與被接著體6經由形成於半導體晶片5上之連接構件4及設置於被接著體6上之導電材料7而電性連接。又,於半導體元件5與被接著體6之間,以填充其空間之方式配置有底部填充片2。
[切割帶一體型底部填充片]
本發明之切割帶一體型底部填充片具備:切割帶、及上述底部 填充片。
圖3係切割帶一體型底部填充片50之剖面模式圖。如圖3所示,切割帶一體型底部填充片50具備:切割帶41、及積層於切割帶41上之底部填充片42。
切割帶41具備:基材41a、及積層於基材41a上之黏著劑層41b。作為基材41a,可使用基材1a中所例示者。作為黏著劑層41b,可使用黏著劑層1b中所例示者。
(使用切割帶一體型底部填充片之半導體裝置之製造方法)
繼而,對於使用切割帶一體型底部填充片50之半導體裝置之製造方法進行說明。圖4係表示使用切割帶一體型底部填充片50之半導體裝置之製造方法之各步驟的圖。具體而言,該半導體裝置之製造方法包括:貼合步驟,其係將兩面形成有具有連接構件44之電路面之半導體晶圓43與切割帶一體型底部填充片50之底部填充片42進行貼合;切割步驟,其係將半導體晶圓43切割而形成附底部填充片42之半導體晶片45;拾取步驟,其係將附底部填充片42之半導體晶片45自切割帶41剝離;連接步驟,其係以底部填充片42填充被接著體46與半導體晶片45之間之空間且經由連接構件44而將半導體晶片45與被接著體46電性連接;及硬化步驟,其係使底部填充片42硬化。
<貼合步驟>
於貼合步驟中,如圖4A所示,將兩面形成有具有連接構件44之電路面之半導體晶圓43與切割帶一體型底部填充片50之底部填充片42進行貼合。再者,通常半導體晶圓43之強度較弱,故而有為了補強而將半導體晶圓固定於支持玻璃等支持體之情況(未圖示)。於該情形時,亦可包括如下步驟:於半導體晶圓43與底部填充片42之貼合後,將支持體剝離。關於將半導體晶圓43之哪一電路面與底部填充片42進行貼合,根據目標之半導體裝置之構造進行變更即可。
半導體晶圓43之兩面之連接構件44彼此可電性連接,亦可不連接。於連接構件44彼此之電性連接中,可列舉被稱為TSV(Through Silicon Via,矽通孔)形式之利用經由通孔之連接而進行者等。作為貼合條件,可採用背面研磨用帶一體型底部填充片之貼合步驟中所例示之條件。
<切割步驟>
於切割步驟中,將半導體晶圓43及底部填充片42切割而形成附底部填充片42之半導體晶片45(參照圖4B)。
作為切割條件,可採用背面研磨用帶一體型底部填充片之切割步驟中所例示之條件。
<拾取步驟>
於拾取步驟中,將附底部填充片42之半導體晶片45自切割帶41剝離(圖4C)。
作為拾取條件,可採用背面研磨用帶一體型底部填充片之拾取步驟中所例示之條件。
<連接步驟>
於連接步驟中,以底部填充片42填充被接著體46與半導體元件45之間之空間,並經由連接構件44而將半導體元件45與被接著體46電性連接(參照圖4D)。具體之連接方法係與背面研磨用帶一體型底部填充片之連接步驟中所說明之內容相同。作為連接步驟之加熱條件,與上述之底部填充片之加熱條件相同。
<硬化步驟及密封步驟>
硬化步驟及密封步驟係與背面研磨用帶一體型底部填充片之硬化步驟及密封步驟中所說明之內容相同。藉此,可製造半導體裝置70。
[實施例]
以下,例示性地詳細說明本發明之較佳實施例。然而,該實施例中所記載之材料或調配量等只要並無特別限定性之記載,則並非旨在將本發明之範圍僅限定於該等。又,所謂份,係指重量份。
[底部填充片之製作]
將以下成分以表1所示之比率溶解於甲基乙基酮中,製備固形分濃度為23.6~60.6重量%之接著劑組合物之溶液。
丙烯酸系樹脂1:以丙烯酸丁酯-丙烯腈作為主成分之丙烯酸酯系聚合物(商品名「SG-28GM」,Nagase Chemtex股份有限公司製造)
丙烯酸系樹脂2:以丙烯酸乙酯-甲基丙烯酸甲酯作為主成分之丙烯酸酯系聚合物(商品名「PARACRON W-197CM」,根上工業股份有限公司製造)
環氧樹脂1:商品名「Epikote 828」,JER股份有限公司製造
環氧樹脂2:商品名「Epikote 1004」,JER股份有限公司製造
酚樹脂:商品名「Milex XLC-4L」,三井化學股份有限公司製造
二氧化矽填料1:球狀二氧化矽(商品名「SO-25R」,平均粒徑:500nm(0.5μm),Admatechs股份有限公司製造)
二氧化矽填料2:球狀二氧化矽(商品名「YC050C-MJF」,平均粒徑:50nm(0.05μm),Admatechs股份有限公司製造
有機酸:鄰甲氧苯甲酸(商品名「o-Anisic Acid」,東京化成股份有限公司製造)
硬化劑:咪唑觸媒(商品名「2PHZ-PW」,四國化成股份有限公司製造)
藉由將該接著劑組合物之溶液塗佈於作為剝離襯墊(分隔件)之由經聚矽氧脫模處理之厚度為50μm之聚對苯二甲酸乙二酯膜構成的脫模處理膜上後,於130℃下乾燥2分鐘,而製作厚度50μm之底部填充 片。
對於所獲得之底部填充片進行以下之評價。將結果示於表1。
(150℃、0.05~0.20轉/分鐘時之黏度之測定)
使用流變儀,將間隙設定為100μm,將旋轉速度設為1分鐘0.1轉而保持固定於150℃測定300秒,將自測定開始300秒後之值設為150℃下之黏度。
(100~200℃、0.3~0.7轉/分鐘時之最低黏度之測定)
使用流變儀,將間隙設定為100μm,以旋轉速度成為1分鐘0.5轉之方式進行設定,以10℃/分鐘之升溫速度進行升溫,藉由硬化反應而提高黏度,進行測定直至無法旋轉為止。將100℃至200℃範圍內之黏度最低值設為最低黏度。
(熱膨脹率α之測定)
熱膨脹率α係使用熱機械測定裝置(TA INSTRUMENTS公司製造:型號Q-400EM)進行測定。具體而言,將測定試樣之尺寸設為長度15mm×寬度5mm×厚度200μm,將測定試樣放置於上述裝置之膜拉伸測定用治具中後,於-50~300℃之溫度區置於拉伸荷重2g、升溫速度10℃/min之條件下,根據20℃~60℃下之膨脹率算出熱膨脹係數α。
(儲藏彈性模數E'之測定)
儲藏彈性模數之測定係將底部填充片於175℃下進行1小時熱硬化處理後,使用固體黏彈性測定裝置(Rheometric Scientific公司製造,型號:RSA-III)進行測定。即,藉由如下方式而獲得:將樣品尺寸設為長度40mm×寬度10mm×厚度200μm,將測定試樣放置於膜拉伸測定用治具中,於頻率1Hz、升溫速度10℃/min之條件下測定-50~300℃之溫度區內之拉伸儲藏彈性模數及損失彈性模數,並讀取25℃下之儲藏彈性模數(E')。
(玻璃轉移溫度之測定)
首先,藉由175℃下之1小時加熱處理使底部填充片熱硬化,其後,利用截切刀切出為厚度200μm、長度40mm(測定長度)、寬度10mm之短條狀,使用固體黏彈性測定裝置(RSAIII,Rheometric Scientific(股)製造),測定-50~300℃下之儲藏彈性模數及損失彈性模數。測定條件係設為頻率1Hz、升溫速度10℃/min。進而,藉由算出tanδ(G"(損失彈性模數)/G'(儲藏彈性模數))之值而獲得玻璃轉移溫度。
[背面研磨用帶一體型底部填充片之製作]
使用手壓輥(hand roller)將底部填充片貼合於背面研磨用帶(商品名「UB-2154」,日東電工股份有限公司製造)之黏著劑層上,製作背面研磨用帶一體型底部填充片。
[半導體裝置之製作]
準備單面形成有凸塊之單面附凸塊矽晶圓,將所製作之背面研磨用帶一體型底部填充片以底部填充片作為貼合面而貼合於該單面附凸塊矽晶圓之形成有凸塊一側之面。作為單面附凸塊矽晶圓,使用以下者。又,貼合條件如下所述。凸塊之高度X(=45μm)相對於底部填充片之厚度Y(=45μm)之比(Y/X)為1。
<單面附凸塊矽晶圓>
矽晶圓之直徑:8英吋
矽晶圓之厚度:0.7mm(700μm)
凸塊之高度:45μm
凸塊之間距:50μm
凸塊之材質:錫-銀共晶焊料
<貼合條件>
貼附裝置:商品名「DSA840-WS」,日東精機股份有限公司製 造
貼附速度:5mm/min
貼附壓力:0.25MPa
貼附時之載置台溫度:70℃
貼附時之減壓度:150Pa
於貼合後,對矽晶圓之背面進行研磨。研磨後,將底部填充片與矽晶圓一同自背面研磨用帶剝離,將矽晶圓貼附於切割帶,進行矽晶圓之切割。切割係以成為7.3mm見方之晶片尺寸之方式進行全切。繼而,自各切割帶之基材側以針之頂出方式拾取底部填充片與單面附凸塊矽晶片之積層體。拾取條件如下所示。
<拾取條件>
拾取裝置:商品名「SPA-300」新川股份有限公司製造
針根數:9根
針頂出量:500μm(0.5mm)
針頂出速度:20mm/秒
拾取時間:1秒
擴展量:3mm
最後,藉由下述熱壓接條件,以使矽晶片之凸塊形成面與BGA(Ball Grid Array,球柵陣列)基板對向之狀態將矽晶片熱壓接於BGA基板而進行矽晶片之安裝。藉此,獲得BGA基板上安裝有矽晶片之半導體裝置。
<熱壓接條件>
熱壓接裝置:商品名「FCB-3」Panasonic製造
加熱溫度:260℃
荷重:30N
保持時間:10秒
對於所獲得之半導體裝置進行以下之評價。將結果示於表1。
(空隙之評價)
將所獲得之半導體裝置與晶片面平行地進行研磨直至底部填充樹脂部分為止,利用顯微鏡觀察底部填充,研究空隙之有無。將無空隙之情形判定為○,將有空隙之情形判定為×。
(端子間連接之評價)
將半導體裝置以露出焊料接合部之方式對垂直面進行研磨,將該剖面未破斷之情形判定為○(良品),將破斷之情形判定為×(缺陷品)。
(可靠性之評價)
將半導體裝置各製作10個樣品,使將-55℃~125℃以30分鐘循環1次之熱循環重複進行500次循環後,以包埋用環氧樹脂包埋半導體裝置。繼而,將半導體裝置以露出焊料接合部之方式於垂直於基板之方向切斷,並對所露出之焊料接合部之剖面進行研磨。其後,利用光學顯微鏡(倍率:1000倍)對經研磨之焊料接合部之剖面進行觀察,將焊料接合部未破斷之情形評價為良品,將焊料接合部破斷之情形評價為缺陷品。
1‧‧‧背面研磨用帶
1a‧‧‧基材
1b‧‧‧黏著劑層
2‧‧‧底部填充片
10‧‧‧背面研磨用帶一體型底部填充片

Claims (10)

  1. 一種底部填充片,其於150℃、0.05~0.20轉/分鐘時之黏度為1000~10000Pa‧s,且於100~200℃、0.3~0.7轉/分鐘時之最低黏度為100Pa‧s以上。
  2. 如請求項1之底部填充片,其包含平均粒徑0.01~10μm之二氧化矽填料15~70重量%、丙烯酸系樹脂2~30重量%。
  3. 如請求項1或2之底部填充片,其於175℃下進行1小時熱硬化處理後之儲藏彈性模數E'[MPa]及熱膨脹係數α[ppm/K]於25℃下滿足下述式(1):E'×α<250000[Pa/K]‧‧‧(1)。
  4. 如請求項3之底部填充片,其中上述儲藏彈性模數E'為100~10000[MPa],且上述熱膨脹係數α為10~200[ppm/K]。
  5. 如請求項1或2之底部填充片,其中上述儲藏彈性模數E'[MPa]與上述熱膨脹係數α[ppm/K]滿足下述式(2):10000<E'×α<250000[Pa/K]‧‧‧(2)。
  6. 如請求項1之底部填充片,其包含熱硬化性樹脂。
  7. 如請求項6之底部填充片,其中上述熱硬化性樹脂包含環氧樹脂與酚樹脂。
  8. 一種背面研磨用帶一體型底部填充片,其具備:背面研磨用帶、及積層於上述背面研磨用帶上之如請求項1至7中任一項之底部填充片。
  9. 一種切割帶一體型底部填充片,其具備:切割帶、及積層於上述切割帶上之如請求項1至7中任一項之底部填充片。
  10. 一種半導體裝置之製造方法,其包括經由如請求項1至7中任一項之底部填充片而將半導體元件固定於被接著體之步驟。
TW103105328A 2013-02-21 2014-02-18 底部塡充片、背面硏磨用帶一體型底部塡充片、切割帶一體型底部塡充片及半導體裝置之製造方法 TW201441331A (zh)

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TWI655682B (zh) * 2014-12-25 2019-04-01 日商麥克賽爾控股股份有限公司 切割用黏著膠帶及半導體晶片的製造方法
TWI801636B (zh) * 2018-08-07 2023-05-11 日商日東電工股份有限公司 背面研磨帶

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JP6566754B2 (ja) * 2015-07-15 2019-08-28 キヤノン株式会社 液体吐出ヘッド及びその製造方法
JPWO2017090440A1 (ja) * 2015-11-24 2018-09-06 リンテック株式会社 回路部材接続用樹脂シート
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JP6960276B2 (ja) * 2017-08-31 2021-11-05 リンテック株式会社 樹脂シート、半導体装置、および樹脂シートの使用方法
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