TW201428915A - 封裝結構及其製作方法 - Google Patents
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- 238000000034 method Methods 0.000 title claims abstract description 11
- 238000004519 manufacturing process Methods 0.000 title abstract description 8
- 239000000758 substrate Substances 0.000 claims abstract description 28
- 229910000679 solder Inorganic materials 0.000 claims abstract description 13
- 239000010410 layer Substances 0.000 claims description 174
- 239000011241 protective layer Substances 0.000 claims description 51
- 235000012431 wafers Nutrition 0.000 claims description 44
- 229920002120 photoresistant polymer Polymers 0.000 claims description 34
- 238000002955 isolation Methods 0.000 claims description 9
- 229910000420 cerium oxide Inorganic materials 0.000 claims description 8
- 239000003822 epoxy resin Substances 0.000 claims description 8
- 229910044991 metal oxide Inorganic materials 0.000 claims description 8
- 150000004706 metal oxides Chemical class 0.000 claims description 8
- BMMGVYCKOGBVEV-UHFFFAOYSA-N oxo(oxoceriooxy)cerium Chemical compound [Ce]=O.O=[Ce]=O BMMGVYCKOGBVEV-UHFFFAOYSA-N 0.000 claims description 8
- 229920000647 polyepoxide Polymers 0.000 claims description 8
- 229920001721 polyimide Polymers 0.000 claims description 8
- 239000009719 polyimide resin Substances 0.000 claims description 8
- MZLGASXMSKOWSE-UHFFFAOYSA-N tantalum nitride Chemical compound [Ta]#N MZLGASXMSKOWSE-UHFFFAOYSA-N 0.000 claims description 8
- 239000003292 glue Substances 0.000 claims description 6
- 238000005192 partition Methods 0.000 claims description 6
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 claims description 4
- 229910052751 metal Inorganic materials 0.000 claims description 4
- 239000002184 metal Substances 0.000 claims description 4
- 238000005530 etching Methods 0.000 claims description 3
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 2
- 229910052782 aluminium Inorganic materials 0.000 claims description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 2
- 229910052802 copper Inorganic materials 0.000 claims description 2
- 239000010949 copper Substances 0.000 claims description 2
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims description 2
- 229910052737 gold Inorganic materials 0.000 claims description 2
- 239000010931 gold Substances 0.000 claims description 2
- 229910052759 nickel Inorganic materials 0.000 claims description 2
- 239000004065 semiconductor Substances 0.000 claims description 2
- 125000006850 spacer group Chemical group 0.000 claims description 2
- 238000010897 surface acoustic wave method Methods 0.000 claims description 2
- 239000011248 coating agent Substances 0.000 claims 2
- 238000000576 coating method Methods 0.000 claims 2
- 238000000151 deposition Methods 0.000 claims 2
- 230000004888 barrier function Effects 0.000 claims 1
- 230000006866 deterioration Effects 0.000 abstract description 2
- 238000002161 passivation Methods 0.000 abstract 4
- 230000035515 penetration Effects 0.000 abstract 1
- 230000005540 biological transmission Effects 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 238000010586 diagram Methods 0.000 description 1
- 238000002372 labelling Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000004806 packaging method and process Methods 0.000 description 1
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Abstract
本發明提供一種電子元件之封裝體及其製作方法。電子元件之封裝體,包含一基板、一電子元件晶片、一接合墊、一第一保護層、一導電層、一第二保護層以及一焊料球體。其中導電層具有一第一側及相對於第一側之一第二側,且焊料球體係設置於導電層之第一側。在電子元件封裝體中,由於第二保護層會同時接觸導電層之第二側的上表面及側壁,而第一保護層接觸導電層之第二側之下表面,以完全包覆導電層之第二側。因此能隔絕水氣進入電子元件之封裝體,以降低電子元件劣化的機會,進而提升電子元件之耐受性。
Description
本發明係關於一種電子元件的封裝體,特別是有關於一種隔絕水氣之電子元件的封裝體及其製造方法。
在電子元件的製程中,電子元件必須經過封裝步驟處裡後,以使用於各種不同的領域,例如,電腦、手機或數位相機等。因此,電子元件的封裝體之可靠性也直接影響了最終電子裝置之效能。
第1A圖係繪示一種習知的電子元件封裝體100a剖面圖。在第1A圖中,電子元件晶片110a設置於基板120a上,且電性連接於接合墊130a,其中接合墊130a係夾置於電子元件晶片110a及基板120a之間。第一保護層140a係夾置於接合墊130a及基板120a之間。而導電層150a形成於電子元件晶片110a之上,且電性連接於接合墊130a,形成T接觸,其中導電層150a具有第一側151a及相對於第一側151a之第二側152a,第二側152a之下表面接觸第一保護層140a。接著,第二保護層160a覆蓋導電層150a之
上,暴露導電層150a之第一側151a,而導電層150a之第二側152a係暴露於電子元件封裝體100a之側壁。焊料球體170a形成於導電層150a之第一側151a上。
在習知的電子元件封裝體中,第二保護層僅覆蓋於導電層之上,導電層之第二側係暴露於電子元件封裝體之側壁。環境中的水氣可能沿導電層之第二側進入電子元件封裝體中,導致T接觸部份劣化,甚至影響電子元件之效能。因此,亟需一種新的電子元件封裝體及其製作方法,以避免環境中的水氣進入電子元件封裝體中,以提升電子元件之耐受性及其可靠性。
為解決上述問題,本發明之一目的在於提供一種隔絕水氣之電子元件之封裝體。上述電子元件之封裝體包含一基板;一電子元件晶片,設置於基板之上;一接合墊,夾置於基板與電子元件晶片之間,且電性連接於電子元件晶片;一第一保護層,夾置於基板與接合墊之間;一導電層,設置於電子元件晶片之側壁上,且電性連接於接合墊,其中導電層具有一第一側及相對於第一側之一第二側,第二側之下表面接觸第一保護層;一第二保護層,設置於導電層上,暴露導電層之第一側,且包覆導電層之第二側,其中第二保護層同時接觸導電層的上表面及側壁,並與第一保護層完全包覆導電層之第二側;以及一焊料球體,設置於暴露之導電層之第一側上。
本發明之另一目的在於提供一種電子元件之封裝體之製作方法。上述電子元件之封裝體之製作方法,包含提供一半導體晶圓,其上包含複數個電子元件晶片;形成一接合墊於各電子元件晶片之下,且電性連接於各電子元件晶片;形成一第一保護層於接合墊之下;形成一導電層於各電子元件晶片之側壁上,且電性連接於接合墊,此導電層具有一第一側及一第二側,其中導電層之第二側之下表面係接觸第一保護層,且相鄰之該些電子元件晶片之側壁上之導電層彼此不相連接;形成一第二保護層於導電層上,暴露導電層之第一側,且包覆導電層之第二側,其中第二保護層同時接觸導電層的上表面及側壁,並與第一保護層完全包覆導電層之第二側;形成一焊料球體於導電層之第一側上;以及切割此些電子元件晶片之間導電層彼此不相連接之處,以分離之此些電子元件晶片,分別製成電子元件封裝體。
在上述之電子元件封裝體中,由於第二保護層會同時接觸導電層之上表面及側壁,並與該第一保護層完全包覆導電層之第二側,避免外界水氣進入封裝體中,降低電子元件劣化的機會,進而提升電子元件的耐受性與可靠性。
100a、100b、300a、300b‧‧‧電子元件之封裝體
110a、110b、310‧‧‧電子元件晶片
120a、120b、320‧‧‧基板
130a、130b、330‧‧‧接合墊
140a、140b、340‧‧‧第一保護層
150a、150b、350、350a、350b‧‧‧導電層
151a、151b、351a、351b‧‧‧第一側
152a、152b、352a、352b‧‧‧第二側
160a、160b、380‧‧‧第二保護層
170a、170b、390a、390b‧‧‧焊料球體
180‧‧‧隔離層
190‧‧‧膠材層
200a、200b、200c‧‧‧光罩次圖案
210a、210b、210c、220a、220b、220c‧‧‧次圖案
230、240‧‧‧分隔道
360‧‧‧凹槽
370a、370b、370c、410a、410b‧‧‧光阻層
T‧‧‧T接觸
為讓本發明之上述和其他目的、特徵、優點與實施例能更明顯易懂,所附圖式之詳細說明如下:第1A圖係繪示習知的電子元件封裝體100a剖面
圖;第1B圖係根據本發明之一實施例所繪示電子元件之封裝體100b剖面圖;第2A圖係繪示習知製作導電層的光罩次圖案200a;第2B圖係根據本發明之一實施例所繪示製作導電層的光罩次圖案200b;第2C圖係根據本發明之一實施例所繪示製作導電層的光罩次圖案200c;第3A圖至第3I圖係根據本發明之一實施例所繪示製作電子元件封裝體剖面圖;以及第4A圖至第4E圖係根據本發明之另一實施例所繪示製作電子元件封裝體剖面圖。
接著以實施例並配合圖式以詳細說明本發明,在圖式或描述中,相似或相同的部分係使用相同之符號或編號。在圖式中,實施例之形狀或厚度可能擴大,以簡化或方便標示,而圖式中元件之部分將以文字描述之。可瞭解的事,未繪示或描述之元件可為熟習該項技藝者所知之各種樣式。另外當敘述一層係形成於一基材或是另一層上時,此層可直接位於基材或是另一層上,或是其間亦可以有中介層。
本文所使用之術語僅是用於描述特定實施例之目的且不意欲限制本發明。如本文所使用,單數形式"一"(a、an)及"該"(the)意欲亦包括複數形式,除非本文另有清楚地
指示。應進一步瞭解,當在本說明書中使用時,術語"包含"(comprises及/或comprising)指定存在所述之特徵、整數、步驟、運作、元件及/或組份,但並不排除存在或添加一或多個其它特徵、整數、步驟、運作、元件、組份及/或其群組。本文參照為本發明之理想化實施例(及中間結構)之示意性說明的橫截面說明來描述本發明之實施例。如此,吾人將預期偏離該等說明之形狀之由於(例如)製造技術及/或容差的改變。因此,不應將本發明之實施例理解為限於本文所說明之特定區域形狀,而將包括起因於(例如)製造之形狀改變,且該等圖中所說明之區域本質上為示意性的,且其形狀不意欲說明設備之區域的實際形狀且不意欲限制本發明之範疇。
第1B圖係繪示根據本發明之一實施例所繪示的電子元件之封裝體100b剖面圖。在第1B圖中,電子元件晶片110b設置於基板120b上,且電性連接於接合墊130b,其中接合墊130b係夾置於電子元件晶片110b及基板120b之間。第一保護層140b係夾置於接合墊130b及基板120b之間。而導電層150b形成於電子元件晶片110b之上,且電性連接於接合墊130b,形成T接觸,其中導電層150b具有第一側151b及相對於第一側151b之第二側152b,第二側152b之下表面接觸第一保護層140b。接著,第二保護層160b覆蓋導電層150b之上,暴露導電層150b之第一側151b,且包覆導電層150b之第二側152b。焊料球體170b形成於導電層150b之第一側151b上。其中,第二保護層
160b係同時接觸導電層150b的上表面及側壁,並與第一保護層140b完全包覆導電層150b之第二側152b。
根據本發明之一實施例,上述電子元件晶片110b包含一積體電路元件、一光電元件、一微機電元件、一表面聲波元件或其組合。
根據本發明之一實施例,上述第一保護層140b包含環氧樹脂、聚醯亞胺樹脂、氧化矽、金屬氧化物或氮化矽。
根據本發明之一實施例,上述導電層150b包含銅、鋁、鎳、金或其組合。
根據本發明之一實施例,上述第二保護層160b包含環氧樹脂、聚醯亞胺樹脂、氧化矽、金屬氧化物或氮化矽。
在第1B圖中,電子元件之封裝體100b更包含隔離層180,夾置於基板120b與電子元件晶片110b之間。根據本發明之一實施例,上述接合墊130b與上述隔離層180係為同平面。根據本發明之另一實施例,上述隔離層180包含環氧樹脂、聚醯亞胺樹脂、氧化矽、金屬氧化物或氮化矽。
在第1B圖中,電子元件之封裝體100b更包含膠材層190,夾置於導電層150b與電子元件晶片110b之間。根據本發明之一實施例,上述膠材層190包含環氧樹脂、聚醯亞胺樹脂、氧化矽、金屬氧化物或氮化矽。
第2A圖係繪示習知製作導電層的光罩次圖案
200a。在第2A圖中,光罩次圖案200a具有複數個透光區(白色部份)及至少一個遮光區(斜線部份),且次圖案210a及次圖案220a為相鄰之次圖案。其中次圖案210a之上述諸透光區之一連接於次圖案220a之上述諸透光區之一。
第2B圖係根據本發明之一實施例所繪示之製作導電層的光罩次圖案200b。在第2B圖中,光罩次圖案200b具有複數個透光區(白色部份)及至少一個遮光區(斜線部份),且次圖案210b及次圖案220b為相鄰之次圖案。其中次圖案210b及次圖案220b之間具有分隔道230,分隔道230係為遮光區之一部份,以分開次圖案210b之透光區及次圖案220b之透光區。
第2C圖係根據本發明之一實施例所繪示之製作導電層的光罩次圖案200c。在第2C圖中,光罩次圖案200c具有複數個遮光區(斜線部份)及至少一個透光區(白色部份),且次圖案210c及次圖案220c為相鄰之次圖案。其中次圖案210c及次圖案220c之間具有分隔道240,分隔道240係為透光區之一部份,以分開次圖案210c之遮光區及次圖案220c之遮光區。
第3A圖至第3I圖係根據本發明之一實施例所繪示之製作電子元件之封裝體剖面圖。在第3A圖中,提供電子元件晶片310設置於基板320上,且電性連接於接合墊330,其中接合墊330係夾置於電子元件晶片310及基板320之間。第一保護層340係夾置於接合墊330及基板320之間。而導電層350形成於電子元件晶片310之上,且電性
連接於接合墊330。其中導電層350之下表面接觸第一保護層340。在第3A圖中,具有凹槽360以分別電子元件之封裝體300a與相鄰之封裝體300b。
根據本發明之一實施例,製作電子元件之封裝體更包含提供一基板,以及形成一隔離層夾置於基板與電子元件晶片之間。根據本發明之另一實施例,製作電子元件之封裝體更包含形成一膠材層夾置於電子元件晶片與導電層之間。
在第3B圖中,形成光阻層370a於上述導電層350之上。接著利用具有如第2B圖或第2C圖所繪示之次圖案之光罩進行顯影步驟,形成具有光罩次圖案之光阻層370b,如第3C圖所示。根據本發明之一實施例,光阻層370b係利用一負光阻劑配合一明光罩所形成,其中上述明光罩具有如第2B圖所繪示之光罩次圖案。根據本發明之一實施例,光阻層370b係利用一正光阻劑配合一暗光罩所形成,其中上述暗光罩具有如第2C圖所繪示之光罩次圖案。
在第3D圖中,移除部份光阻層370b,形成具有一凹部的光阻層370c於凹槽360,以暴露部份的導電層350。值得注意的是,上述光阻層370c之凹部係對應於第2B圖或第2C圖所繪示之光罩次圖案之分隔道230或240。
在第3E圖中,蝕刻暴露的導電層350,以暴露部分的第一保護層340於凹槽360,形成導電層350a及350b。其中導電層350a具有第一側351a及第二側352a,而導電層350b具有第一側351b及第二側352b,且導電層350a
之第二側352a不連接於導電層350b之第二側352b。然而,在習知技術中,不具有蝕刻導電層之步驟,因此電子元件封裝體之導電層係連接於相鄰之封裝體之導電層。
在第3F圖中,移除第3E圖的光阻層370c後,暴露導電層350a及350b。接著沉積金屬於導電層350a及350b上,以增厚導電層350a及350b,如第3G圖所示。
在第3H圖中,形成第二保護層380於導電層350a及350b上,暴露導電層350a及350b之第一側351a及351b,且包覆導電層350a及350b之第二側352a及352b,其中第二保護層380同時接觸導電層350a及350b的上表面及側壁,並與第一保護層340完全包覆導電層350a之第二側352a及導電層350b之第二側352b。接著形成焊料球體390a於導電層350a之第一側351a上,及形成焊料球體390b於導電層350b之第一側351b上。經由一切割步驟,沿著凹槽360,分割成個別獨立的電子元件封裝體300a及300b,如第3I圖所示。
第4A圖至第4E圖係根據本發明之另一實施例所繪示之製作電子元件之封裝體剖面圖。接續如第3B圖所繪示之結構,在第4A圖中,利用具有如第2B圖或第2C圖所繪示之次圖案之光罩進行顯影步驟,形成具有光罩次圖案之光阻層410a。根據本發明之一實施例,光阻層410a係利用一正光阻劑配合一明光罩所形成,其中上述明光罩具有如第2B圖所繪示之光罩次圖案。根據本發明之一實施例,光阻層410a係利用一負光阻劑配合一暗光罩所形成,
其中上述暗光罩具有如第2C圖所繪示之光罩次圖案。
在第4B圖中,移除第4A圖的光阻層410a後,形成具有一凸塊的光阻層410b於凹槽360,以暴露部份的導電層350。值得注意的是,上述光阻層410b之凸塊係對應於第2B圖或第2C圖所繪示之光罩次圖案之分隔道230或240。
在第4C圖中,沉積金屬於暴露的導電層350上,以增厚導電層350。接著移除光阻層410b,以形成具有一凹部的導電層350,如第4D圖所示。
在第4E圖中,蝕刻導電層350之凹部,以暴露部分的第一保護層340於凹槽360,形成導電層350a及350b。其中導電層350a具有第一側351a及第二側352a,而導電層350b具有第一側351b及第二側352b,且導電層350a之第二側352a不連接於導電層350b之第二側352b。
接著如第3H圖至第3I圖所示,依序形成第二保護層、焊料球體以及沿凹槽切割,以分割成個別獨立的電子元件封裝體。其中第3H圖至第3I圖之內容已記載如前,不再加以贅述。
值得注意的是,由於第一保護層係接觸導電層之第二側之下表面,而第二保護層會同時接觸導電層之第二側的上表面及側壁,因此第一保護層與第二保護層會完全覆蓋導電層之第二側,以隔絕水氣進入電子元件之封裝體。因為降低了電子元件劣化的機會,進而提升電子元件之耐受性。
雖然本發明之實施例已揭露如上,然其並非用以限定本發明,任何熟習此技藝者,在不脫離本發明之精神和範圍內,當可做些許之更動與潤飾,因此本發明之保護範圍當以後附之申請專利範圍所界定為準。
100b‧‧‧電子元件之封裝體
110b‧‧‧電子元件晶片
120b‧‧‧基板
130b‧‧‧接合墊
140b‧‧‧第一保護層
150b‧‧‧導電層
151b‧‧‧第一側
152b‧‧‧第二側
160b‧‧‧第二保護層
170b‧‧‧焊料球體
180‧‧‧隔離層
190‧‧‧膠材層
Claims (18)
- 一種電子元件之封裝體,包含:一基板;一電子元件晶片,設置於該基板之上;一接合墊,夾置於該基板與該電子元件晶片之間,且電性連接於該電子元件晶片;一第一保護層,夾置於該基板與該接合墊之間;一導電層,設置於該電子元件晶片之側壁上,且電性連接於該接合墊,其中該導電層具有一第一側及相對於該第一側之一第二側,該第二側之下表面接觸該第一保護層;一第二保護層,設置於該導電層上,暴露該導電層之該第一側,且包覆該導電層之該第二側,其中該第二保護層同時接觸該導電層的上表面及側壁,並與該第一保護層完全包覆該導電層之該第二側;以及一焊料球體,設置於暴露之該導電層之該第一側上。
- 如請求項1所述之封裝體,其中該電子元件晶片包含一積體電路元件、一光電元件、一微機電元件、一表面聲波元件或其組合。
- 如請求項1所述之封裝體,其中該第一保護層包含環氧樹脂、聚醯亞胺樹脂、氧化矽、金屬氧化物或氮化矽。
- 如請求項1所述之封裝體,其中該導電層包含銅、鋁、鎳、金或其組合。
- 如請求項1所述之封裝體,其中該第二保護層包含環氧樹脂、聚醯亞胺樹脂、氧化矽、金屬氧化物或氮化矽。
- 如請求項1所述之封裝體,更包含一隔離層,夾置於該基板與該電子元件晶片之間。
- 如請求項6所述之封裝體,其中該接合墊與該隔離層係為同平面。
- 如請求項6所述之封裝體,其中該隔離層包含環氧樹脂、聚醯亞胺樹脂、氧化矽、金屬氧化物或氮化矽。
- 如請求項1所述之封裝體,更包含一膠材層,夾置於該導電層與該電子元件晶片之間。
- 如請求項9所述之封裝體,其中該膠材層包含環氧樹脂、聚醯亞胺樹脂、氧化矽、金屬氧化物或氮化矽。
- 一種電子元件封裝體之製作方法,包含下列步驟:提供一半導體晶圓,其上包含複數個電子元件晶片;形成一接合墊於各該電子元件晶片之下,且電性連接各該電子元件晶片;形成一第一保護層於該接合墊之下;形成一導電層於各該電子元件晶片之側壁上,且電性連接該接合墊,該導電層具有一第一側及一第二側,其中該導電層之該第二側之下表面係接觸該第一保護層,且相鄰之該些電子元件晶片之側壁上的該導電層彼此不相連接;形成一第二保護層於該導電層上,暴露該導電層之該第一側,且包覆該導電層之該第二側,其中該第二保護層同時接觸該導電層的上表面及側壁,並與該第一保護層完全包覆該導電層之該第二側;形成一焊料球體於該導電層之該第一側上;以及 切割相鄰的該些電子元件晶片之間該導電層彼此不相連接之處以分離該些電子元件晶片。
- 如請求項11所述之方法,更包含:提供一基板;以及形成一隔離層,其係夾置於該基板與各該電子元件晶片之間。
- 如請求項11所述之方法,更包含形成一膠材層,其係夾置於各該電子元件晶片與該導電層之間。
- 如請求項11所述之方法,其中形成該導電層之步驟包含:形成一導電層於各該電子元件晶片之側壁上,並電性連接於該接合墊;形成一光阻層於該導電層上;蝕刻部分該導電層,使該導電層不連接於相鄰之一電子元件封裝體之一導電層;移除該光阻層;以及沉積金屬於該導電層上,以增厚該導電層。
- 如請求項11所述之方法,其中形成該導電層之步驟包含:形成一導電層於該電子元件之側壁上,並電性連接於該接合墊;形成一光阻層於該導電層上;沉積金屬於該導電層上,以增厚該導電層;移除該光阻層;以及蝕刻部分該導電層,使該導電層不連接於相鄰之該封裝體之該導電層。
- 如請求項14或15所述之方法,其中形成該光阻層之步驟包含:塗佈一光阻劑於該導電層上,形成一光阻層;利用一光罩,形成複數個次圖案之一於該光阻層上;以及移除部份該光阻層,以曝露部份該導電層,其中該次圖案係分別對應於該電子元件晶片,且各該次圖案與相鄰之各該次圖案之間具有一分隔道,移除部份該光阻層後,與該分隔道相對應之該光阻層形成一凸塊或一凹部,使該導電層與相鄰之該封裝體之該導電層不相連。
- 如請求項16所述之方法,其中該光阻劑為正光阻劑或負光阻劑。
- 如請求項16所述之方法,其中該光罩為明光罩或暗光罩。
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