TW201419150A - 用於執行一保全環境初始化指令之系統及方法 - Google Patents

用於執行一保全環境初始化指令之系統及方法 Download PDF

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TW201419150A
TW201419150A TW103100721A TW103100721A TW201419150A TW 201419150 A TW201419150 A TW 201419150A TW 103100721 A TW103100721 A TW 103100721A TW 103100721 A TW103100721 A TW 103100721A TW 201419150 A TW201419150 A TW 201419150A
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security
processor
bus
memory
ilp
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James A Ii Sutton
David W Grawrock
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Intel Corp
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Abstract

本發明揭示一種用於初始化一微處理器系統中保全作業之方法及裝置。在一具體實施例中，一初始化邏輯處理器藉由暫停其它邏輯處理器之執行來初始該程序，然後載入初始化及保全虛擬機器監視器軟體到記憶體中。然後該初始化處理器載入該初始化軟體到保全記憶體中來鑑識及執行。然後該初始化軟體在保全系統作業之前鑑識及註冊該保全虛擬機器監視器軟體。

Description

用於執行一保全環境初始化指令之系統及方法
本發明概言之關於微處理器系統，更特定而言，係關於可在一信任或保全的環境中作業的微處理器系統。
在本地或遠端微電腦上所執行的金融及個人交易已經愈來愈多，其造成了建立"安全"或"保全"之微處理器環境的需求。這些環境所要嘗試解決的問題是損失了私密性，或資料被破壞或濫用。使用者不想要使他們的私密資料被公開。他們亦不想要他們的資料被修改或用於不適當的交易中。這些範例包括不小心洩漏醫療記錄，或由一線上銀行或其它受託者進行電子式的金錢竊盜。類似地，內容提供者想要保護數位內容(例如音樂、其它聲音、視訊、或其它一般類型的資料)不會在未授權的情況下被複製。
既有的信任系統可利用一種完整封閉的信任軟體組合。此方法相當容易實施，但其缺點在於不允許同時使用共通性商業用作業系統及應用軟體。此缺點即限制了這種信任系統的接受度。
本發明揭示一種用於初始化一微處理器系統中保全作業之方法及裝置。在一具體實施例中，一初始化邏輯處理器藉由暫停其它邏輯處理器之執行來初始該程序，然後載入初始化及保全虛擬機器監視器 軟體到記憶體中。然後該初始化處理器載入該初始化軟體到保全記憶體中來鑑識及執行。然後該初始化軟體在保全系統作業之前鑑識及註冊該保全虛擬機器監視器軟體。
150‧‧‧作業系統
152,154,156‧‧‧應用
202,212,222‧‧‧處理器
204‧‧‧保全進入邏輯
206‧‧‧匯流排訊息邏輯
208‧‧‧保全記憶體
230‧‧‧系統匯流排
240‧‧‧晶片組
244‧‧‧金鑰暫存器
248‧‧‧裝置存取頁面表
250-262‧‧‧記憶體頁面
272‧‧‧暫存器
274‧‧‧旗標
276‧‧‧保全代符
278‧‧‧平台組態暫存器
284‧‧‧金鑰
360‧‧‧保全核心
370‧‧‧信任的應用
380‧‧‧硬體資源
400‧‧‧微處理器系統
544‧‧‧固定媒體
DMA‧‧‧直接記憶體存取
PCI‧‧‧週邊組件內連線
AGP‧‧‧加速繪圖埠
USB‧‧‧通用序列匯流排
LPC‧‧‧低腳位數
PCR‧‧‧平台組態暫存器
TPM‧‧‧信任的平台模組
SVMM‧‧‧保全虛擬機器監視器
SINIT‧‧‧保全初始化
ILP‧‧‧初始化邏輯處理器
本發明係藉由所附圖面中的範例來說明，並非藉由限制，且其中類似的參考編號代表類似的元件，且其中：圖1所示為一微處理器系統中所執行的範例性軟體環境。
圖2所示為根據本發明一具體實施例之某些範例性信任或保全軟體模組及範例性系統環境。
圖3所示為根據本發明一具體實施例之一範例性信任或保全軟體環境。
圖4A所示為根據本發明一具體實施例中用來支援圖3之保全軟體環境的一範例性微處理器系統之架構圖。
圖4B所示為根據本發明另一具體實施例中用來支援圖3之保全軟體環境的一範例性微處理器系統之架構圖。
圖5所示為根據本發明另一具體實施例中用來支援圖3之保全軟體環境的一範例性微處理器系統之架構圖。
圖6所示為根據本發明一具體實施例中執行軟體元件的時間線圖。
圖7所示為根據本發明一具體實施例中軟體及其它處理方塊的流程圖。
以下的說明係說明用於在一微處理器系統中初始化一信任或保全的環境之技術。在以下的說明中，許多特定的細節，例如邏輯實施、軟體模組配置、加密技術、匯流排發信技術、及作業的細節等皆會提出，藉以提供對於本發明更為完整的瞭解。不過，熟習此項技藝 者應清楚知道，在不運用這些特定細節的情況下，仍然可實施本發明。在其它的實例中，並未詳細顯示控制結構、閘極等級的電路，及完整的軟體指令序列，藉以不會混淆本發明。本技藝中的專業人士利用所包含的說明將可以實現適當的功能，而不需要過度的實驗。本發明係以一微處理器系統的形式來揭示。但是，本發明亦可實施成其它類型的處理器，例如一數位信號處理器、一迷你電腦、或一大型電腦。
現在請參考圖1，係顯示在一微處理器系統中執行的一範例性軟體環境。圖1所示的軟體並不是信任的(即未信任)。當在一高保密等級下作業時，該作業系統150之大小及固定的更新使其非常困難來依照時間性的方式來執行任何信任分析。許多作業系統之定位在於保密環零(0)，及最高級的保密等級。該等應用152、154及156具有許多降低的保密環，且基本上位在保密環(3)之內。不同的保密環之存在，以及區隔作業系統150及應用152、154及156到這些不同的保密環中，其將呈現出允許圖1之軟體作業係在一信任的模式中，其係基於決定來信任由該作業系統150所提供的設施。但是，在實施做出這種信任決策時通常並不實際。有貢獻於此問題之因素包含該作業系統150之大小(程式碼的行號)、該作業系統150可為許多更新的接受者之事實(新的碼模組及補強)，及該作業系統150亦可包含碼模組的事實，例如由除了該作業系統發展者之外的參與者所供應的裝置驅動程式。作業系統150可為一共用的，例如Microsoft® Windows®、Linux或Solaris®，或可為任何其它適當的已知或另外可取得之作業系統。所執行之應用或作業系統的特殊類型或名稱並非關鍵。
現在請參考圖2，所示為根據本發明一具體實施例之某些範例性信任或保全軟體模組及範例性系統環境200。在圖2中的具體實施例，處理器202、處理器212、處理器222及選擇性的其它處理器(未示出) 係顯示成獨立的硬體元件。在其它具體實施例中，處理器的數目可以改變，以及許多元件及功能性單元的邊界。在一些具體實施例中，該等處理器可由在一或多個實體處理器上所執行的獨立執行緒或"邏輯處理器"來取代。
處理器202、212、222可包含某些特殊電路或邏輯元件來支援保全或信任的作業。舉例而言，處理器202可包含保全進入(SENTER)邏輯204來支援可初始化信任作業之特殊SENTER指令的執行。處理器202亦可包含匯流排訊息邏輯206，以在支援SENTER作業中來支援系統匯流排230上的特殊匯流排訊息。在其它具體實施例中，晶片組240的記憶體控制功能可配置在該等處理器內的電路中，且對於多處理器，其可包含在一單一晶片中。在這些具體實施例中，特殊的匯流排訊息亦可在該等處理器內部的匯流排上來傳送。該特殊匯流排訊息之使用可因為幾個理由而增加該系統的保全性或信任度。例如處理器202、212及222或晶片組240之電路元件在當其包含本揭示內容之具體實施例的適當邏輯元件時，可以僅進行或回應於這些訊息。因此，該等特殊匯流排訊息之成功的交換可有助於保證適當的系統組態。特殊的匯流排訊息亦可允許通常必須禁止的活動，例如重置一平台設置暫存器278。潛在性的不友善之未信任碼之能力來在某些匯流排交易上偵測者，其可藉由允許特殊的匯流排訊息來僅回應於特殊的保全指令來進行之下來省略。
此外，處理器202可包含保全記憶體208來支援保全初始化作業。在一具體實施例中，保全記憶體208可為處理器202之內部快取，其可能運作在一特殊模式中。在其它具體實施例中，保全記憶體208可為特殊的記憶體。其它的處理器，例如處理器212及處理器222亦可包含SENTER邏輯214、224、匯流排邏輯216、226，及保全記憶體218、228。
一"晶片組"可定義成一組電路及邏輯，其可對於一連接的處理器或數個處理器來支援記憶體及輸入/輸出(I/O)作業。一晶片組的個別元件可群組在一起於一單一晶片上、一對晶片、或分散在多個晶片之間，包含有處理器。在圖2的具體實施例中，晶片組240可包含電路及邏輯來支援記憶體及I/O作業，以支援處理器202、212及222。在一具體實施例中，晶片組240可與一些記憶體頁面250到262形成介面，及包含控制資訊之裝置存取頁面表248來代表是否非處理器裝置可存取該記憶體頁面250到262。晶片組240可包含裝置存取邏輯247，其可允許或拒絕來自I/O裝置的直接記憶體存取(DMA)到選擇的該記憶體頁面250到262之部份。在某個具體實施例中，該裝置存取邏輯247可包含所有允許或拒絕這些存取的相關資訊。在其它具體實施例中，該裝置存取邏輯247可存取在該裝置存取頁面表248中所保持的這種資訊。該等記憶體頁面的實際數目並不重要，且將根據系統需求而改變。在其它具體實施例中，該記憶體存取功能可在於晶片組240之外部。該晶片組240的功能在其它具體實施例中配置在一或多個實體裝置之間。
晶片組240可額外地包含其本身的匯流排訊息邏輯242來在支援特殊SENTER作業中，可支援在系統匯流排230上的特殊匯流排訊息。一些這種特殊匯流排訊息可包含傳送一金鑰暫存器244的內容到一處理器202、212或222；或允許一特殊的ALL_JOINED旗標274來由處理器202、212或222來檢查。該匯流排訊息邏輯242之額外的特徵為藉由處理器註冊匯流排活動在一"EXISTS"暫存器272中，並由處理器儲存某些特殊匯流排訊息活動在一"JOINS"暫存器272中。EXISTS暫存器272與JOINS暫存器272之內容的同等性可以用來設定該特殊ALL_JOINED旗標274來代表在該系統中的所有處理器皆參與在該保全進入程序中。
晶片組240可支援標準的I/O作業在I/O匯流排上，例如週邊組件內連線(PCI)、加速的圖形埠(AGP)、通用序列匯流排(USB)、低腳位數(LPC)匯流排、或任何其它種類的I/O匯流排(未示出)。一介面290可用來連接晶片組240與代符276，其包含有一或多個平台組態暫存器(PCR)278、279。在一具體實施例中，介面290可為該LPC匯流排(低腳位數(LPC)介面規格、Intel公司提出，Rev.1.0，1997年12月29日) ，其利用加入某些保全加強來修正。這種保全加強的一個範例將為一本地確認訊息，利用一先前保留的訊息標頭及位址資訊而目標在於代符276內的一平台組態暫存器(PCR)278。在一具體實施例中，代符276可包含特殊的保全特徵，且在一具體實施例中，可包含該信任的平台模組(TPM)281，其係揭示於"Trusted Computing Platform Alliance(TCPA)Main Specification"，1.1a版，2001年12月1日，由TCPA提出。(其可在本申請案提出時，從www.trustedpc.com取得)。
在系統環境200中所辨識出的兩個軟體組件為一保全虛擬機器監視器(SVMM，Secure Virtual Machine Monitor)282模組，及一保全初始化鑑識碼((SINIT-AC)280模組。該SVMM 282模組可儲存在一系統磁碟或其它大量儲存上，並可依需要移動或複製到其它的位置。在一具體實施例中，於開始該保全啟動程序SVMM 282之前，可移動或複製到一或多個記憶體頁面250到262。在該保全進入程序之後，一虛擬機器環境可以產生，其中該SVMM 282可操作成該系統內最為保密的碼，且可用來允許或拒絕直接存取到某些系統資源，其係藉由在所產生的虛擬機器內之作業系統或應用。
該保全進入程序所需要的一些動作可以超過簡單硬體實施之範圍，且另可較佳地是使用一軟體模組，其執行可以是隱含地信任。在一具體實施例中，這些動作可由保全初始化(SINIT)碼來執行。在此處可辨識三個範例性動作，但這些動作不能視為限制。一個動作可需 要代表該系統組態的關鍵部份之多種控制要被測試，以保證該組態可支援該保全環境的正確例證。在一具體實施例中，一種需要的測試可為由晶片組240所提供的記憶體控制器組態，其不需要兩個或多個不同的系統匯流排位址來接觸到記憶體頁面250到262內的相同之位置。一第二動作可為設置該裝置存取頁面表248及裝置存取邏輯247，以保護由SVMM 282之存在於記憶體中的複本所使用的那些記憶體頁面不會受到非處理器裝置的干擾。一第三動作可為計算及註冊該SVMM 282模組的識別，並轉移系統控制給它。此處的"暫存器"代表放置SVMM 282之信任量度到一暫存器中，例如進入PCR 278或PCR 279。當採取此最後動作時，該SVMM 282的信任度可由一潛在的系統使用者來檢測。
該SINIT碼可由該處理器或晶片組的製造商來產生。為此原因，該SINIT碼可被信任來協助該晶片組240的保全啟動。為了散佈該SINIT碼，在一具體實施例中，一熟知的加密雜混即由整個SINIT碼所構成，而產生一熟知的"摘要" (digest)數值。一具體實施例對於該摘要產生一160位元的數值。然後該摘要可由一私密金鑰來加密來形成一數位簽章，其在一具體實施例中係由該處理器的製造商所保有。當該SINIT碼結合於相對應的數位簽章時，該組合可能代表一SINIT鑑識碼(SINIT-AC)280。該SINIT-AC 280之複本可在稍後來驗證，如下所述。
該SINIT-AC 280可以儲存在系統磁碟或其它大量儲存或在一固定的媒體中，並可依需要來移動或複製到其它的位置。在一具體實施例中，於開始該保全啟動程序SINIT-AC 280之前，可以移動或複製到記憶體頁面250-262中，以形成SINIT-AC之存在於記憶體中的複本。
任何的邏輯處理器可初始化該保全啟動程序，然後可以代表該初始化的邏輯處理器(ILP)。在本範例中，處理器202成為該ILP，雖 然在系統匯流排230上的任何處理器皆可成為該ILP。該SINIT-AC 280之存在於記憶體之複本及SVMM 282之存在於記憶體之複本在此時皆不可視為可信任，因為除了一些理由之外，其它的處理器或DMA裝置可覆寫記憶體頁面250-262。
然後該ILP(處理器202)可執行一特殊的指令。此特殊指令可代表一保全的進入(SENTER)指令，並可由SENTER邏輯204所支援。該SENTER指令的執行可造成該ILP(處理器202)來在系統匯流排230上發出特殊的匯流排訊息，然後對於後續的系統動作來等待相當一段時間。在SENTER開始執行之後，這些特殊的匯流排訊息之一，SENTER BUS MESSAGE，即廣播在系統匯流排230上。那些除了該ILP之外的邏輯處理器，其可表示成回應的邏輯處理器(RLP)，其利用一內部非遮罩的事件來回應於該SENTER BUS MESSAGE 。在本範例中，該RLP包含處理器212及處理器222。該RLP必須每次來終止目前的作業，傳送一RLP知會(ACK)特殊匯流排訊息在系統匯流排230上，然後進入一等待狀態。其必須注意到，該ILP亦在系統匯流排230上傳送其本身的ACK訊息。
該晶片組240可包含一對暫存器，"EXISTS"暫存器270及"JOINS"暫存器272。這些暫存器可用來驗證該ILP及所有的RLP皆適當地回應於該SENTER BUS MESSAGE。在一具體實施例中，晶片組240可在任何由該邏輯處理器所構成的系統匯流排交易中，藉由寫入一個"1"到該EXISTS暫存器270之相對應的位元來追蹤在該系統中所有作業的邏輯處理器。在此具體實施例中，在系統匯流排230上的每個交易必須包含一識別欄位，其包含該邏輯處理器識別。在一具體實施例中，此具有一實體處理器識別，及在每個實體處理器內的該硬體執行緒之識別。舉例而言，如果在處理器222上執行的一執行緒造成系統匯流排230上的任何匯流排交易，晶片組240將可看到在該交易內的此邏輯 處理器識別，並寫入一個"1"到該EXISTS暫存器270內的相對應位置286。在該保全啟動程序期間，當在處理器222上相同的執行緒傳送其ACK訊息在系統匯流排230上時，該晶片組240亦將會看到此訊息，並可寫入一個"1"到該JOINS暫存器272中的相對應位置288。在圖2的範例中，為了清楚起見，顯示出每個實體處理器僅具有一單一執行緒在執行。在其它具體實施例中，該等實體處理器可支援多個執行緒，並藉此支援多個邏輯處理器。當該JOINS暫存器272之內容符合該EXISTS暫存器270之內容時，則晶片組240可設定一ALL_JOINED旗標246，以代表所有的處理器皆已經適當地回應於該SENTER BUS MESSAGE。
在另一個具體實施例中，EXISTS暫存器270及JOINS暫存器272可在設定了該ALL_JOINED旗標246之後繼續來協助保全性。在設定了ALL_JOINED旗標246之後直到信任或保全的作業結束之前的這段期間，晶片組240可繼續來監視，並比較匯流排循環與該JOINS暫存器272。在此期間中，如果晶片組240曾經看到來自一邏輯處理器之匯流排交易目前在JOINS暫存器272中無法辨識，則晶片組240可假定此邏輯處理器具有某些"呈現的"延遲。此將代表這種邏輯處理器並未參與在該保全啟動程序中，且因此可代表一攻擊者(保全的威脅)。在這種狀況下，晶片組240可適當地回應來保持此攻擊者在該保全的環境之外。在一具體實施例中，晶片組240可在這種狀況下強迫一系統重置。在一第二具體實施例中，類似偵測到一"延遲"處理器可由在確立該ACK匯流排訊息之後的每一個交易上由每個邏輯處理器確立一特殊的保留信號在該系統匯流排上來達到。在此具體實施例中，於設定該ALL_JOINED旗標246之後，如果該晶片組240觀察到由一處理器所初始化的一匯流排交易並未確立該特殊的信號時，則晶片組240可再次地推定此邏輯處理器具有某種呈現的"延遲"，且可代表一攻擊者。
在發出該SENTER BUS MESSAGE之後，該ILP(處理器202)輪詢該ALL_JOINED旗標246來察看何時且如果所有的處理器已經適當地回應其ACK。如果該旗標246永遠未設定，其有數種可能的實施。在該ILP或晶片組或別處中的看門狗計時器可造成一系統重置。另外，該系統可停滯需要操作者來重置。在任一例中，雖然該系統並未持續動作，即可保護一保全環境的確立(其中該保全啟動程序並未完成，除非所有的處理器皆參與)。在正常的作業中，於設定了ALL_JOINED旗標246的短時間之後，該ILP可保證所有其它的邏輯處理器已經進入一等待狀態。
當設定了ALL_JOINED旗標246時，該ILP(處理器202)可同時移動SINIT-AC 280及金鑰284的一複本到保全記憶體208中，做為鑑識及後續執行包含在SINIT-AC 280中的SINIT碼之目的。在一具體實施例中，此保全記憶體208可為該ILP(處理器202)之內部快取，其可能運作在一特殊模式中。金鑰284代表對應於該私密金鑰之公用金鑰，用來加密包含在該SINIT-AC 280模組中的該數位簽章，且用來驗證該數位簽章，並藉此來鑑識該SINIT碼。在一具體實施例中，金鑰284已經儲存在該處理器中，可能做為該SENTER邏輯204之部份。在另一具體實施例中，金鑰284可儲存在晶片組240的唯讀金鑰暫存器244中，其已由該ILP讀取。在又另一個具體實施例中，該處理器或該晶片組的金鑰暫存器244皆可實際地保有一金鑰284之加密摘要，其中金鑰284本身係包含在該SINIT-AC 280模組中。在此最後的具體實施例中，該ILP由金鑰暫存器244讀取該摘要，計算與內嵌在該SINIT-AC 280中的該金鑰284之同等的加密雜混值，並比較該兩個摘要來保證該供應的金鑰284的確是可信任的。
然後一SINIT-AC的複本與一公用金鑰的複本即存在於保全記憶體208內。該ILP現在可藉由使用該公用金鑰的複本來解密在該SINIT- AC之複本中所包含的數位簽章來驗證該SINIT-AC的複本。此解密可產生一加密雜混的摘要之原始的複本。如果一新計算的摘要符合此原始的摘要，則該SINIT-AC的複本及其所包含的SINIT碼可以視為可以信任。
現在該ILP發出另一個特殊的匯流排訊息，SENTER CONTINUE MESSAGE，其透過系統匯流排230發信該等待中的RLP(處理器212，處理器222)及晶片組240，其中該保全的作業將要被初始化。現在該ILP藉由寫入該SINIT-AC模組的加密摘要數值到在該保全代符276中的一平台組態暫存器272來註冊該SINIT-AC模組之唯一的識別，如下所述。其SENTER指令的ILP之執行現在可藉由轉移執行控制到在該ILP的保全記憶體208內所保有的該SINIT碼之可信任的複本來終止。然後該信任的SINIT碼可執行其系統測試及組態動作，並可註冊該SVMM的存在於記憶體之複本 ，其係根據上述的"暫存器"之定義。
該SVMM之存在於記憶體複本的註冊可用數種方式來執行。在一具體實施例中，在該ILP上執行的SENTER指令寫入該計算的SINIT-AC之摘要到該保全代符276內的PCR 278 。後續地，該信任的SINIT碼可寫入該存在於記憶體之SVMM的計算之摘要到該保全代符276內的相同PCR 278或另一個PCR 279。如果該SVMM摘要被寫入到相同的PCR 278 ，該保全代符276雜混該原始的內容(SINIT摘要)與該新的數值(SVMM摘要)，並寫入該結果回到該PCR 278中，在該第一(初始化)寫入到PCR 278被限制到該SENTER指令的具體實施例中，所得到的摘要可做為該系統之信任的基礎。
一旦該信任的SINIT碼已經完成其執行，並已經註冊該SVMM的識別在一PCR中，該SINIT碼可轉移ILP執行控制到該SVMM。在一典 型的具體實施例中，由該ILP所執行的第一SVMM指令可代表該SVMM之自我初始化的程序。該ILP在一具體實施例中可發出個別的RLP JOIN MESSAGE特殊匯流排訊息到每個RLP，造成每個RLP來在現在所執行的SVMM複本之監督之下來加入在作業中。如下所述，該整體系統係運作在信任的模式中，如在以下之圖3的說明中所述。
現在請參考圖3，其顯示出根據本發明之一具體實施例中一範例性信任的或保全的軟體環境。在圖3的具體實施例中，信任的及未信任的軟體可同時載入，並可在一單一電腦系統上同時執行。一SVMM 350選擇性地允許或防止由一或多個未信任的作業系統340及未信任的應用310到330直接存取到硬體資源380。在本文中，"未信任"並不必須代表該作業系統或應用為故意地錯誤動作，但該交互作用的碼之大小及種類使其不實際地來可靠地確立該軟體可依需要來動作，且其中不會有病毒或其它的外來碼來干擾其執行。在一典型的具體實施例中，該未信任的碼可由正常的作業系統及在現今的個人電腦上可發現到的應用所構成。
SVMM 350亦可選擇性地允許或防止由一或多個信任的或保全的核心360及一或多個信任的應用370之直接存取到硬體資源380。這種信任的或保全核心360及信任的應用370可限制其大小及功能性，以輔助其能力來執行對於其的信任度分析。該信任的應用370可為任何的軟體碼、程式、程序、或可在一保全環境中執行的程序組合。因此，該信任的應用370可為多種應用或碼序列，或可為相當小的應用，例如一Java applet。
通常由作業系統340或核心360所執行的指令或作業，其可改變系統資源保護或保密性，即可由SVMM 350補捉，並選擇性地允許、部份允許或拒絕。例如在一典型的具體實施例中，改變該處理器的頁面表之指令，其通常可由作業系統340或核心360所執行，其將另由 SVMM 350所補捉，其將可保證該要求不會嘗試來改變在其虛擬機器的領域之外的頁面保密性。
現在請參考圖4A，其顯示用來支援圖3之保全的軟體環境的一微處理器系統400之一具體實施例。CPU A 410、CPU B 414、CPU C 418及CPU D 422可設置有額外的微程式碼或邏輯電路來支援特殊指令的執行。在一具體實施例中，此額外的微程式碼或邏輯電路可為圖2的SENTER邏輯204。這些特殊的指令可支援在系統匯流排420上特殊匯流排訊息的發佈，其可在啟動該保全環境時來構成該等處理器之適當的同步化。在一具體實施例中，該特殊匯流排訊息的發佈可由例如圖2之匯流排訊息邏輯206的電路來支援。類似地，晶片組430可類似於晶片組240，且可支援上述在系統匯流排420上的特殊循環。該等實體處理器的數目可根據一特殊具體實施例的實施而改變。在一具體實施例中，該等處理器可為Intel® Pentium®等級的微處理器。晶片組430可與大量儲存裝置形成介面，例如固定的媒體444或可移除的媒體448，其可透過PCI匯流排446或另可透過USB 442、一整合的控制器電子(IDE)匯流排(未示出)、一小電腦系統內連線(SCSI)匯流排(未示出)，或任何其它的I/O匯流排。該固定的媒體444或可移除的媒體448可為磁碟、磁帶、磁碟片、磁性光碟機、CD-ROM、DVD-ROM、快閃記憶卡、或許多其它類型的大量儲存。
在圖4A之具體實施例中，該四個處理器CPU A 410、CPU B 414、CPU C 418及CPU D 422係顯示成四個獨立的硬體物件。在其它具體實施例中，該等處理器的數目可以改變。實際上，該等實體上分散的處理器可藉由在一或多個實體處理器上執行的獨立硬體執行緒所取代。在後者的例子中，這些執行緒具有許多額外實體楚理器之屬性。為了具有一通稱的術語來討論使用任何多重實體處理器與在處理器上多重執行緒之混合，該術語"邏輯處理器"可用來描述一實體處理 器或在一或多個實體處理器中運作的一執行緒。因此，一單一執行緒的處理器可視為一邏輯處理器，而多重緒或多重核心處理器可視為多個邏輯處理器。
在一具體實施例中，晶片組430與一修正的LPC匯流排450構成介面。修正的LPC匯流排450可用來連接晶片組430與一保全代符454。代符454在一具體實施例中可包含由該Trusted Computing Platform Alliance(TCPA)所規劃的TPM 471。
現在請參考圖4B，其顯示用來支援圖3之保全的軟體環境的一微處理器系統490之另一具體實施例。不同於圖4A之具體實施例，CPU A 410及CPU B 414可利用系統匯流排402連接到晶片組428，藉此CPU C 418及CPU D 422可利用系統匯流排B404連接到晶片組428。在其它具體實施例中，可利用超過兩個系統匯流排。在另一個其它具體實施例中，可使用點對點的匯流排。特殊指令可支援在系統匯流排A 402及系統匯流排B 404上發行特殊匯流排訊息，其可在當啟動該保全環境時造成該等處理器之適當的同步。在一具體實施例中，該特殊匯流排訊息之發佈可由像是圖2的匯流排訊息邏輯206的電路來支援。
在一具體實施例中，晶片組428係負責來維持橫跨系統匯流排A 402及系統匯流排B 404之一致性及連貫性。如果一標準或特殊的匯流排訊息係傳送通過系統匯流排A 402 ，晶片組428反應該訊息(當適當的時候)到系統匯流排B 404上，反之亦然。
在另一具體實施例中，晶片組428處理系統匯流排A 402及系統匯流排B 404做為獨立的子系統。任何在系統匯流排A 402上發出的特殊匯流排訊息僅可應用到該匯流排上的處理器：類似地，在系統匯流排B 404上發出的特殊匯流排訊息僅會施加到在該匯流排上的處理器。任何相對於系統匯流排A 402所建立的保護記憶體僅可由連接到系統 匯流排A 402之處理器所存取，而在系統匯流排B 404上的該等處理器可處理為未信任的裝置。為了取得存取到系統匯流排A 402上對於CPU A 410及CPU B 414建立的任何保護的記憶體，在系統匯流排B 404上的處理器CPU C 418及CPU D 422必須執行其本身的SENTER程序、產生一註冊的環境而等於在系統匯流排A 402上之處理器之註冊的環境。
現在請參考圖5，其顯示根據本發明另一具體實施例中用來支援圖3之保全的軟體環境之範例性微處理器系統500的架構圖。不同於圖4A的具體實施例，每個處理器(例如CPU A 510)可包含某些晶片組功能(例如晶片組功能593)，其例如執行記憶體控制器功能及裝置存取邏輯功能。這些晶片組功能藉此允許該記憶體(例如記憶體A 502)來直接連接到該處理器。其它的晶片組功能可保留在一獨立的晶片組530。特殊的匯流排訊息可發出通過系統匯流排520。
每個處理器可進行間接存取到連接於其它處理器之記憶體：但是，這些存取當相較於存取到一處理器本身的記憶體時為相當地慢。在開始該SENTER程序之前，軟體可由固定的媒體544移動SINIT-AC 566及SVMM 574的複本到本地記憶體504中、形成SINT-AC 556的複本與SVMM 572的複本。在一具體實施例中，該記憶體504可被選擇，因為其由要成為該ILP之處理器來直接地存取，在圖5的範例中此為CPU B 514。另外，該SINIT-AC 566及SVMM 574複本可置於其它附加在其它(非ILP)之處理器的記憶體中，只要該ILP 514具有能力來存取那些記憶體。CPU B ILP 514藉由發出該SENTER指令來開始該保全進入程序，其已經描述在圖2中，並發出類似的結果及匯流排循環。晶片組530可利用EXISTS暫存器576、JOINS暫存器580、及ALL_JOINED旗標584，如上述連接於圖2之說明，以決定是否所有的處理器已經適當地回應於該SENTER BUS MESSAGE，並發信此資訊 到該ILP。該ILP(CPU B 514)再次地可移動該SINIT-AC 556之存在於記憶體之複本到保全記憶體560中，以及一公用金鑰564之複本。在驗證及註冊SINIT-AC 556之後，ILP即繼續該SVMM 572之存在於記憶體之複本的驗證及註冊。
現在請參考圖6，所示為根據本發明一具體實施例之許多作業的時間線圖。圖6的時間線顯示出配合於在以上圖2中所討論的範例性系統之作業的整體時程表。當軟體決定需要保全或信任的作業時，在時間610處，任何軟體定位及製作可用於一後續的SENTER指令之SINIT-AC 280及SVMM 282之複本。在此範例中，軟體載入一SINIT-AC 280之複本與SVMM 282之複本到一或多個記憶體頁面250-262 。在本範例性處理器202中的一處理器即選擇成為該ILP，其在時間612處發出該SENTER指令。在時間614，該ILP的SENTER指令發出該SENTER BUS MESSAGE 616。該ILP在時間628處進入一等待晶片組旗標狀態之前即在時間618時發出其本身的SENTER ACK 608。
每個RLP，例如處理器222，其藉由在時間620期間完成該目前的指令來回應於該SENTER BUS MESSAGE 616。然後該RLP發出其SENTER ACK 622，然後進入一狀態634，其中其等待一SENTER CONTINUE MESSAGE。
該晶片組240回應於在系統匯流排230上所觀察到的該SENTER ACK訊息而花費時間624來設定該JOINS暫存器272。當該JOINS暫存器272內容符合該EXISTS暫存器270時，晶片組240在時間626處設定該ALL_JOINED旗標246。
在此期間，該ILP可維持在一迴圈中來輪詢該ALL_JOINED 旗標246。當設定該ALL_JOINED旗標246時，且ILP決定該ALL_JOINED旗標246係設定在時間630，則該ILP即在時間632期間發出該SENTER CONTINUE MESSAGE。當該SENTER CONTINUE MESSAGE在時間636處廣播在系統匯流排230上，該RLP可進入一等待結合的狀態。舉例而言，該處理器222的RLP在時段638期間進入一等待結合狀態。
在發出該SENTER CONTINUE MESSAGE時，該ILP即可(在時段640)將晶片組240的金鑰暫存器244之公用金鑰及一SINIT-AC的複本帶到其保全記憶體208來形成該金鑰的複本及SINIT-AC之複本。在另一具體實施例中，金鑰暫存器244可包含該公用金鑰的一摘要，且該實際公用金鑰可包含在或與該SINIT-AC在一起。在如上述配合圖2之鑑識該SINIT-AC之複本時，該ILP即可實際上執行在保全記憶體208內的SINIT-AC之複本。
在保全記憶體208內的SINIT-AC之複本開始執行之後，其即(在時段640內)確認及註冊該SVMM之存在於記憶體的複本。在該SVMM之複本註冊在該保全代符276的PCR 278中之後，該SVMM本身的存在於記憶體之複本即開始執行。此時，於接下來的時段650期間，SVMM作業即建立在該ILP中。
在該ILP SVMM作業要先做的事當中，係在該系統匯流排230上發出個別的RLP JOIN MESSAGES。一個範例為一處理器222 JOIN MESSAGE 644。此訊息可包含在記憶體中的一位置，其中該RLP處理器222可加入該SVMM之註冊的存在於記憶體之複本的執行。另外，該ILP SVMM作業可以在該晶片組或記憶體中一預定的位置中註冊一記憶體位置，並在接收到該JOIN MESSAGE時，該RLP自此位置取得其開始位址。在接收該處理器222 JOIN MESSAGE並決定其開始位址之後，於時段646期間，該RLP處理器222跳到此位置，並加入該SVMM之註冊的存在於記憶體之複本的執行。
在所有的RLP已經加入該註冊的SVMM之存在於記憶體之複本，保全的作業係建立在整個該微電腦系統200中。
現在請參考圖7，所示為根據本發明一具體實施例之軟體流程圖及其它程序方塊。為了清楚起見，圖7僅顯示一單一代表性RLP之程序方塊。在其它具體實施例中，其可有數個回應的邏輯處理器。
該程序700開始於方塊710，為當一邏輯處理器製作該SINIT-AC及SVMM模組之複本時，用於由一後續的SENTER指令所存取。在此範例中，於方塊712，該ILP由大量儲存載入該SINIT-AC及SVMM碼到實體記憶體中。在其它的具體實施例中，任何的邏輯處理器皆可進行，並非只有該ILP。一處理器藉由執行該SENTER指令來成為該ILP，如在方塊714中所指。在方塊716中，該ILP SENTER指令在方塊716中發出一SENTER BUS MESSAGE。該ILP接著在方塊718中發出其本身的SENTER ACK訊息到該晶片組。然後該ILP進入一等待狀態，其顯示於決策方塊720，並等待該晶片組來設定其ALL_JOINED旗標。
在每個RLP在方塊770中接收該SENTER BUS MESSAGE之後，其利用目前指令的結束來停止執行，然後在方塊772中發出其本身的SENTER ACK。然後每個RLP進入一等待狀態，顯示於決策方塊774，並等代一SENTER CONTINUE MESSAGE從該ILP到達。
該晶片組設定該相對應的位元在該JOINS暫存器，當接收到SENTER ACK訊息時。當該JOINS暫存器內容等於該EXISTS暫存器內容時，該晶片組設定其ALL_JOINED旗標，發信該ILP來由決策方塊720進行。
該ILP在離開決策方塊720的YES路徑上，然後在方塊722中發出一SENTER CONTINUE MESSAGE。此發信每個RLP來由決策方塊774進行。然後每個RLP進入一第二等待狀態，其顯示為決策方塊776，並等待一SENTER JOIN MESSAGE。
同時，在方塊724中，該ILP移動該晶片組的公用金鑰及SINIT- AC之存在於記憶體之複本到其本身的記憶體來做為保全執行。在方塊726中，該ILP使用該金鑰來確認該SINIT-AC的保全存在記憶體之複本，然後執行它。該SINIT-AC的執行可執行該系統組態及該SVMM複本之測試，然後註冊該SVMM識別，且最後開始在方塊728中SVMM之執行。做為在方塊728中執行的部份動作，該ILP SINIT碼可設置記憶體及晶片組之裝置存取頁面表248及裝置存取邏輯247，以保護那些由該SVMM 282的存在於記憶體之複本所使用的記憶體頁面避免受到非處理器裝置的干擾，如在方塊754中所示。
在該ILP在SVMM的控制之下開始執行之後，在方塊730中，該ILP傳送一個別的SENTER JOIN MESSAGE到每個RLP。在發出該SENTER JOIN MESSAGE之後，該ILP即在方塊732中開始SVMM作業。
該SENTER JOIN MESSAGE的接收造成每個RLP來離開由決策方塊776沿著該YES路徑所代表的等待狀態，並在方塊780中開始SVMM作業。該SENTER JOIN MESSAGE可包含該SVMM進入點，該RLP分支到何時加入SVMM作業。另外，該ILP SVMM碼可註冊適當的RLP登入點在一系統位置(例如在該晶片組中)，並由在接收到該SENTER JOIN MESSAGE時由該RLP所取得。
當所揭示的不同具體實施例包含兩個或多個處理器時(為邏輯或實體處理器)，其必須瞭解到這種多處理器及/或多執行緒系統係更為詳細地說明來解釋關於保全具有多個邏輯或實體處理器之系統所增加的複雜性。一具體實施例亦可能在較低複雜性的系統中具有好處，其僅可使用一個處理器。在一些例子中，該一個實體處理器可為多重執行緒，因此可包含多個邏輯處理器(且因此具有一ILP及一RLP，如上所述)。但是在其它例子中，其可使用一單一處理器、單一執行緒系統，且仍利用所揭示的保全處理技術。在這些例子中，其可以沒有 RLP；但是，該保全處理技術仍可運來降低該資料可用一未授權的方式被偷或操縱之可能性。
在以上之說明中，本發明已參考特定之示範具體實施例來做說明。但是，顯而易見，可進行各種變更及修改，而不會脫離本發明廣大的精神及範疇。因此該說明及圖面係要視為說明性質，而不具有限制的意義。
200‧‧‧範例性系統環境
250-262‧‧‧記憶體頁面
202,212,222‧‧‧處理器
272‧‧‧暫存器
204‧‧‧保全進入邏輯
274‧‧‧旗標
206‧‧‧匯流排訊息邏輯
276‧‧‧保全代符
208‧‧‧保全記憶體
278‧‧‧平台組態暫存器
230‧‧‧系統匯流排
282‧‧‧保全虛擬機器監視器
240‧‧‧晶片組
284‧‧‧金鑰
244‧‧‧金鑰暫存器
248‧‧‧裝置存取頁面表

Claims (3)

  1. 一種處理器，其包括：硬體資源；及一邏輯處理器，用以導引一保全監視器之執行，其中該保全監視器係用以控制由一非保全環境存取該等硬體資源及控制由一保全環境存取該等硬體資源，其中該非保全環境包含一非保全作業系統及執行於一非保全環境之一非保全應用之至少一者，且該保全環境包含一保全核心及一保全應用之至少一者。
  2. 如申請專利範圍第1項之處理器，其中該保全監視器係用以初始化一保全啟動，其中該邏輯處理器係用以：儲存一保全碼之複本及該保全碼之一信任複本之一數位簽名於與該處理器相關聯之保全記憶體中；使用該數位簽名及一加密金鑰來鑑識該保全碼之該複本；及在鑑識之後初始化該保全碼之執行。
  3. 如申請專利範圍第1項之處理器，其中該保全監視器相較於該非保全作業系統、該非保全應用、該保全核心及該保全應用具有一較高特權等級。
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