TW201344850A - 晶片組裝結構及晶片組裝方法 - Google Patents

晶片組裝結構及晶片組裝方法 Download PDF

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TW201344850A
TW201344850A TW101113862A TW101113862A TW201344850A TW 201344850 A TW201344850 A TW 201344850A TW 101113862 A TW101113862 A TW 101113862A TW 101113862 A TW101113862 A TW 101113862A TW 201344850 A TW201344850 A TW 201344850A
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metal film
wafer
film layer
circuit board
tin
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TW101113862A
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TWI544583B (zh
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Kai-Wen Wu
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Hon Hai Prec Ind Co Ltd
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Priority to US13/534,247 priority patent/US8736078B2/en
Publication of TW201344850A publication Critical patent/TW201344850A/zh
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Abstract

一種晶片組裝結構，包括一個電路板以及一個位於所述電路板上之晶片。所述電路板上於所述晶片之組裝位置處形成有一個連接墊。所述連接墊背離所述電路板之一側表面上形成有第一金屬膜層，所述晶片朝向所述電路板之一側表面形成有第二金屬膜層。所述第二金屬膜層以共晶方式與所述第一金屬膜層相結合。本發明還涉及一種晶片組裝方法。

Description

晶片組裝結構及晶片組裝方法
本發明涉及一種晶片組裝結構及晶片組裝方法。
為實現特定，晶片一般需要組裝於一個電路板之表面並於電路板電連接。隨著技術之發展，晶片尺寸也愈來愈小，相應地，在組裝中，對所述晶片之組裝精度之要求也越來越高。
先前之晶片組裝方式為：在所述電路板之晶片組裝位置形成一個連接墊；在所述連接墊上塗敷一層液態固定膠；將晶片置於所述液態固定膠上；固化所述液態固定膠，使所述晶片固定於所述電路板上。
然，由於晶片尺寸較小，所述晶片置於所述液態固定膠上後，容易因所述液態固定膠之流動的產生固定位置枝變化影像晶片組裝之精度。
有鑒於此，有必要提供一種具有高組裝精度之晶片組裝結構以及晶片組裝方法。
一種晶片組裝結構，包括一個電路板以及一個位於所述電路板上之晶片。所述電路板上於所述晶片之組裝位置處形成有一個連接墊。所述連接墊背離所述電路板之一側表面上形成有第一金屬膜層，所述晶片朝向所述電路板之一側表面形成有第二金屬膜層。所述第二金屬膜層以共晶方式與所述第一金屬膜層相結合。
一種晶片組裝方法，包括如下步驟：
提供一個電路板；
提供一個連接墊；
在所述連接墊表面形成一個第一金屬膜層；
將所述連接墊設置於所述電路板上預定之晶片組裝位置，所述連接墊形成有所述第一金屬膜之表面背離所述電路板；
提供一個晶片，在所述晶片欲與所述電路板連接之一側表面形成一個第二金屬膜層；
將所述晶片置於所述連接墊上，所述第一金屬膜與所述第二金屬膜相接觸；
加熱所述第一金屬膜層以及所述第二金屬膜層，使所述第一金屬膜層以及所述第二金屬膜層以共晶方式結合。
相較先前技術，所述晶片組裝結構以及晶片組裝方法藉由所述第一金屬膜層以及所述第二金屬膜層以共晶結合方式將所述晶片固定於所述電路板上，可以避免以液態固定膠方式固定所述晶片所引起之晶片位置之偏移，能夠保證所述晶片之組裝精度。
下面將結合附圖對本發明作一具體介紹。
請參閱圖1，本發明第一實施方式之晶片組裝結構100包括一個電路板10以及一個位於所述電路板10上之晶片20。
所述電路板10用於承載所述晶片20並且對所述晶片20提供訊號傳輸之路徑。所述電路板10上在所述晶片10之組裝位置處形成有一個連接墊11，所述連接墊11背離所述電路板10之一側表面上形成有第一金屬膜層111。
所述晶片20朝向所述電路板10之一側表面形成有第二金屬膜層21。所述第二金屬膜層21以共晶方式與所述第一金屬膜層111相結合。
所述第一金屬膜層111以及所述第二金屬膜層21之材料為金錫合金、錫銻合金、錫銀合金、錫鉛合金、銦銀合金、銦錫合金、錫銀銅合金中之一種或者幾種。所述第一金屬膜層111以及所述第二金屬膜層21可以採用真空蒸鍍、離子濺鍍等方式形成於所述連接墊111以及所述晶片20表面。
所述之晶片組裝結構100藉由所述第一金屬膜層111以及所述第二金屬膜層20以共晶結合方式將所述晶片20固定於所述電路板10上，可以避免以液態固定膠方式固定所述晶片10所引起之晶片位置之偏移，能夠保證所述晶片10之組裝精度。
請參閱圖2，本發明第二實施方式之晶片組裝結構200包括第一實施方式之晶片組裝結構100類似之電路板30、晶片40、連接墊31、第一金屬膜層311以及第二金屬膜層41。另外，所述第一金屬層31表面上圍繞所述晶片40設置有固定膠50，所述固化膠50將所述晶片40周側固定於所述第一金屬膜層31上，因此，能夠增強所述晶片40於所述電路板30上之附著力。本實施方式中，所述固定膠50為紫外線固化膠。
請參閱圖3，本發明之晶片組方法包括如下步驟：
提供一個電路板；
提供一個連接墊；
在所述連接墊表面形成一個第一金屬膜層；
將所述連接墊設置於所述電路板上預定之晶片組裝位置，所述連接墊形成有所述第一金屬膜之表面背離所述電路板；
提供一個晶片，在所述晶片欲與所述電路板連接之一側表面形成一個第二金屬膜層；
將所述晶片置於所述連接墊上，所述第一金屬膜與所述第二金屬膜相接觸；
加熱所述第一金屬膜層以及所述第二金屬膜層，使所述第一金屬膜層以及所述第二金屬膜層以共晶方式結合；
在所述第一金屬膜層上圍繞所述晶片塗敷固定膠，使所述晶片周側固定於所述第一金屬膜層表面。
第一金屬膜層和第二金屬膜層之材料為金錫合金、錫銻合金、錫銀合金、錫鉛合金、銦銀合金、銦錫合金、錫銀銅合金中之一種或者幾種，第一金屬膜層和第二金屬膜層可以採用真空蒸鍍、離子濺鍍等方式形成。
所述加熱方式為可以在溫空室內或者採用雷射加熱方式進行。依據所述第一金屬膜層以及所述第二金屬膜層所選擇之材料不同，所述加熱溫度亦由有所不同，如下表：
所述之晶片組裝方法藉由所述第一金屬膜層以及所述第二金屬膜層以共晶結合方式將所述晶片固定於所述電路板上，可以避免以液態固定膠方式固定所述晶片所引起之晶片位置之偏移，能夠保證所述晶片之組裝精度。
綜上所述，本發明確已符合發明專利之要件，遂依法提出專利申請。惟，以上所述者僅為本發明之較佳實施方式，自不能以此限制本案之申請專利範圍。舉凡熟悉本案技藝之人士援依本發明之精神所作之等效修飾或變化，皆應涵蓋於以下申請專利範圍內。
100，200．．．晶片組裝結構
10，30．．．電路板
11，31．．．連接墊
111，311．．．第一金屬層
20，40．．．晶片
21，41．．．第二金屬層
圖1係本發明第一實施方式之晶片組裝結構之示意圖。
圖2係本發明第二實施方式之晶片組裝結構之示意圖。
圖3係本發明晶片組裝方法之流程圖。
100．．．晶片組裝結構
10．．．電路板
11．．．連接墊
111．．．第一金屬層
20．．．晶片
21．．．第二金屬層

Claims (10)

  1. 一種晶片組裝結構，包括一個電路板以及一個位於所述電路板上之晶片，所述電路板上於所述晶片之組裝位置處形成有一個連接墊，其改進在於：所述連接墊背離所述電路板之一側表面上形成有第一金屬膜層，所述晶片朝向所述電路板之一側表面形成有第二金屬膜層，所述第二金屬膜層以共晶方式與所述第一金屬膜層相結合。
  2. 如申請專利範圍第1項所述之晶片組裝結構，其中，所述第一金屬膜層以及所述第二金屬膜層之材料為金錫合金、錫銻合金、錫銀合金、錫鉛合金、銦銀合金、銦錫合金、錫銀銅合金中之一種。
  3. 如申請專利範圍第1項所述之晶片組裝結構，其中，所述第一金屬膜層以及所述第二金屬膜層採用真空蒸鍍或者離子濺鍍方式形成於所述連接墊以及所述晶片表面。
  4. 如申請專利範圍第1項所述之晶片組裝結構，其中，所述第一金屬層表面上圍繞所述晶片設置有固定膠，所述固化膠將所述晶片周側固定於所述第一金屬膜層上。
  5. 如申請專利範圍第4項所述之晶片組裝結構，其中，所述固定膠為紫外線固化膠。
  6. 一種晶片組裝方法，包括如下步驟：
    提供一個電路板；
    提供一個連接墊；
    在所述連接墊表面形成一個第一金屬膜層；
    將所述連接墊設置於所述電路板上預定之晶片組裝位置，所述連接墊形成有所述第一金屬膜之表面背離所述電路板；
    提供一個晶片，在所述晶片欲與所述電路板連接之一側表面形成一個第二金屬膜層；
    將所述晶片置於所述連接墊上，所述第一金屬膜與所述第二金屬膜相接觸；
    加熱所述第一金屬膜層以及所述第二金屬膜層，使所述第一金屬膜層以及所述第二金屬膜層以共晶方式結合。
  7. 如申請專利範圍第6項所述之晶片組裝方法，其中，所述第一金屬膜層以及所述第二金屬膜層之材料為金錫合金、錫銻合金、錫銀合金、錫鉛合金、銦銀合金、銦錫合金、錫銀銅合金中之一種。
  8. 如申請專利範圍第6項所述之晶片組裝方法，其中，所述第一金屬膜層以及所述第二金屬膜層採用真空蒸鍍或者離子濺鍍方式形成於所述連接墊以及所述晶片表面。
  9. 如申請專利範圍第6項所述之晶片組裝方法，還包括步驟：於所述第一金屬層表面上圍繞所述晶片塗敷固定膠，使所述晶片周側固定於所述第一金屬膜層上。
  10. 如申請專利範圍第9項所述之晶片組裝方法，其中，所述固定膠為紫外線固化膠。
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US6740544B2 (en) * 2002-05-14 2004-05-25 Freescale Semiconductor, Inc. Solder compositions for attaching a die to a substrate
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