TW201310552A - 晶圓之永久接合之方法 - Google Patents

晶圓之永久接合之方法 Download PDF

Info

Publication number
TW201310552A
TW201310552A TW101123933A TW101123933A TW201310552A TW 201310552 A TW201310552 A TW 201310552A TW 101123933 A TW101123933 A TW 101123933A TW 101123933 A TW101123933 A TW 101123933A TW 201310552 A TW201310552 A TW 201310552A
Authority
TW
Taiwan
Prior art keywords
solid substrate
solid
functional layer
diffusion
volume
Prior art date
Application number
TW101123933A
Other languages
English (en)
Other versions
TWI557811B (zh
Inventor
Bernhard Rebhan
Markus Wimplinger
Klaus Martinschitz
Kurt Hingerl
Original Assignee
Ev Group E Thallner Gmbh
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ev Group E Thallner Gmbh filed Critical Ev Group E Thallner Gmbh
Publication of TW201310552A publication Critical patent/TW201310552A/zh
Application granted granted Critical
Publication of TWI557811B publication Critical patent/TWI557811B/zh

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/64—Manufacture or treatment of solid state devices other than semiconductor devices, or of parts thereof, not peculiar to a single device provided for in groups H01L31/00 - H10K99/00
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K35/00—Rods, electrodes, materials, or media, for use in soldering, welding, or cutting
    • B23K35/001—Interlayers, transition pieces for metallurgical bonding of workpieces
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K35/00—Rods, electrodes, materials, or media, for use in soldering, welding, or cutting
    • B23K35/02—Rods, electrodes, materials, or media, for use in soldering, welding, or cutting characterised by mechanical features, e.g. shape
    • B23K35/0255—Rods, electrodes, materials, or media, for use in soldering, welding, or cutting characterised by mechanical features, e.g. shape for use in welding
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K35/00—Rods, electrodes, materials, or media, for use in soldering, welding, or cutting
    • B23K35/22—Rods, electrodes, materials, or media, for use in soldering, welding, or cutting characterised by the composition or nature of the material
    • B23K35/24—Selection of soldering or welding materials proper
    • B23K35/26—Selection of soldering or welding materials proper with the principal constituent melting at less than 400 degrees C
    • B23K35/262—Sn as the principal constituent
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K35/00—Rods, electrodes, materials, or media, for use in soldering, welding, or cutting
    • B23K35/22—Rods, electrodes, materials, or media, for use in soldering, welding, or cutting characterised by the composition or nature of the material
    • B23K35/24—Selection of soldering or welding materials proper
    • B23K35/30—Selection of soldering or welding materials proper with the principal constituent melting at less than 1550 degrees C
    • B23K35/302—Cu as the principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/185—Joining of semiconductor bodies for junction formation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/07—Structure, shape, material or disposition of the bonding areas after the connecting process
    • H01L24/08—Structure, shape, material or disposition of the bonding areas after the connecting process of an individual bonding area
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/27—Manufacturing methods
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L24/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93—Batch processes
    • H01L24/94—Batch processes at wafer-level, i.e. with connecting carried out on a wafer comprising a plurality of undiced individual devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/065—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L25/0657—Stacked arrangements of devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/50—Multistep manufacturing processes of assemblies consisting of devices, each device being of a type provided for in group H01L27/00 or H01L29/00
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K20/00—Non-electric welding by applying impact or other pressure, with or without the application of heat, e.g. cladding or plating
    • B23K20/02—Non-electric welding by applying impact or other pressure, with or without the application of heat, e.g. cladding or plating by means of a press ; Diffusion bonding
    • B23K20/021—Isostatic pressure welding
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K20/00—Non-electric welding by applying impact or other pressure, with or without the application of heat, e.g. cladding or plating
    • B23K20/02—Non-electric welding by applying impact or other pressure, with or without the application of heat, e.g. cladding or plating by means of a press ; Diffusion bonding
    • B23K20/023—Thermo-compression bonding
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K2101/00—Articles made by soldering, welding or cutting
    • B23K2101/36—Electric or electronic devices
    • B23K2101/40—Semiconductor devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/03—Manufacturing methods
    • H01L2224/038—Post-treatment of the bonding area
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/03—Manufacturing methods
    • H01L2224/038—Post-treatment of the bonding area
    • H01L2224/0383—Reworking, e.g. shaping
    • H01L2224/0384—Reworking, e.g. shaping involving a mechanical process, e.g. planarising the bonding area
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/04026—Bonding areas specifically adapted for layer connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/0555—Shape
    • H01L2224/05556—Shape in side view
    • H01L2224/05557—Shape in side view comprising protrusions or indentations
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/05599—Material
    • H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/05638—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/05647—Copper [Cu] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/07—Structure, shape, material or disposition of the bonding areas after the connecting process
    • H01L2224/08—Structure, shape, material or disposition of the bonding areas after the connecting process of an individual bonding area
    • H01L2224/0801—Structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/07—Structure, shape, material or disposition of the bonding areas after the connecting process
    • H01L2224/08—Structure, shape, material or disposition of the bonding areas after the connecting process of an individual bonding area
    • H01L2224/085—Material
    • H01L2224/08501—Material at the bonding interface
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/27—Manufacturing methods
    • H01L2224/274—Manufacturing methods by blanket deposition of the material of the layer connector
    • H01L2224/27444—Manufacturing methods by blanket deposition of the material of the layer connector in gaseous form
    • H01L2224/2745—Physical vapour deposition [PVD], e.g. evaporation, or sputtering
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/27—Manufacturing methods
    • H01L2224/274—Manufacturing methods by blanket deposition of the material of the layer connector
    • H01L2224/27444—Manufacturing methods by blanket deposition of the material of the layer connector in gaseous form
    • H01L2224/27452—Chemical vapour deposition [CVD], e.g. laser CVD
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/27—Manufacturing methods
    • H01L2224/275—Manufacturing methods by chemical or physical modification of a pre-existing or pre-deposited material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/27—Manufacturing methods
    • H01L2224/275—Manufacturing methods by chemical or physical modification of a pre-existing or pre-deposited material
    • H01L2224/27505—Sintering
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/27—Manufacturing methods
    • H01L2224/278—Post-treatment of the layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/27—Manufacturing methods
    • H01L2224/278—Post-treatment of the layer connector
    • H01L2224/2783—Reworking, e.g. shaping
    • H01L2224/2784—Reworking, e.g. shaping involving a mechanical process, e.g. planarising the layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/2901—Shape
    • H01L2224/29016—Shape in side view
    • H01L2224/29018—Shape in side view comprising protrusions or indentations
    • H01L2224/29019—Shape in side view comprising protrusions or indentations at the bonding interface of the layer connector, i.e. on the surface of the layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29075—Plural core members
    • H01L2224/2908—Plural core members being stacked
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/291—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29101—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
    • H01L2224/29111—Tin [Sn] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/291—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29117—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
    • H01L2224/29124—Aluminium [Al] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/291—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/29144—Gold [Au] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/291—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/29147—Copper [Cu] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/291—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29163—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
    • H01L2224/29166—Titanium [Ti] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/291—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29163—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
    • H01L2224/29181—Tantalum [Ta] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/291—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29163—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
    • H01L2224/29184—Tungsten [W] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29199—Material of the matrix
    • H01L2224/292—Material of the matrix with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29201—Material of the matrix with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
    • H01L2224/29211—Tin [Sn] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298—Fillers
    • H01L2224/29299—Base material
    • H01L2224/293—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29301—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
    • H01L2224/29311—Tin [Sn] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298—Fillers
    • H01L2224/29299—Base material
    • H01L2224/293—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29338—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/29347—Copper [Cu] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/3201—Structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/325—Material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/325—Material
    • H01L2224/32501—Material at the bonding interface
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
    • H01L2224/7565—Means for transporting the components to be connected
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/83009—Pre-treatment of the layer connector or the bonding area
    • H01L2224/8301—Cleaning the layer connector, e.g. oxide removal step, desmearing
    • H01L2224/83013—Plasma cleaning
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/83009—Pre-treatment of the layer connector or the bonding area
    • H01L2224/83022—Cleaning the bonding area, e.g. oxide removal step, desmearing
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319—Arrangement of the layer connectors prior to mounting
    • H01L2224/83191—Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on the semiconductor or solid-state body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319—Arrangement of the layer connectors prior to mounting
    • H01L2224/83193—Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed on both the semiconductor or solid-state body and another item or body to be connected to the semiconductor or solid-state body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/832—Applying energy for connecting
    • H01L2224/83201—Compression bonding
    • H01L2224/83203—Thermocompression bonding, e.g. diffusion bonding, pressure joining, thermocompression welding or solid-state welding
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8334—Bonding interfaces of the layer connector
    • H01L2224/83345—Shape, e.g. interlocking features
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8336—Bonding interfaces of the semiconductor or solid state body
    • H01L2224/83365—Shape, e.g. interlocking features
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8338—Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/83385—Shape, e.g. interlocking features
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838—Bonding techniques
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838—Bonding techniques
    • H01L2224/83801—Soldering or alloying
    • H01L2224/8382—Diffusion bonding
    • H01L2224/8383—Solid-solid interdiffusion
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838—Bonding techniques
    • H01L2224/8384—Sintering
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/93—Batch processes
    • H01L2224/94—Batch processes at wafer-level, i.e. with connecting carried out on a wafer comprising a plurality of undiced individual devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01029—Copper [Cu]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013—Alloys
    • H01L2924/0132—Binary Alloys
    • H01L2924/01327—Intermediate phases, i.e. intermetallics compounds
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits
    • H01L2924/143—Digital devices
    • H01L2924/1434—Memory
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/35—Mechanical effects
    • H01L2924/351—Thermal stress
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/35—Mechanical effects
    • H01L2924/351—Thermal stress
    • H01L2924/3511—Warping

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Mechanical Engineering (AREA)
  • Pressure Welding/Diffusion-Bonding (AREA)
  • Wire Bonding (AREA)

Abstract

本發明係關於一種將一第一固體基板(1)接合至包含一第一材料之一第二固體基板(2)的方法，該方法按照以下步驟，尤其是按照以下序列：-將包含一第二材料之一功能層(5)形成或施加至該第二固體基板(2)，-在該功能層(5)上使該第一固體基板(1)與該第二固體基板(2)接觸，-將該等固體基板(1、2)擠壓在一起以形成該等第一與第二固體基板(1、2)之間之一永久接合，該永久接合至少部分藉由引起該功能層上之一體積增加之該第一材料與該第二材料之固體擴散及/或相變而加強。

Description

晶圓之永久接合之方法
本發明係關於一種如技術方案1中所主張，將包含一第一材料之一第一固體基板(尤其是半導體晶圓)接合至一第二固體基板(尤其是半導體晶圓)的方法。
固體基板的永久性或不可逆接合之目的為產生儘可能堅固且尤其儘可能永久的連接，因此在固體基板之兩個接觸表面之間產生高接合力。為此目的，在先前技術中，存在多種途徑及產生方法，尤其是高溫下表面之焊接。
永久地接合所有類型之材料，但是主要為金屬及陶瓷。永久接合之最重要系統的一種係金屬-金屬系統。最近幾年中，已日益出現Cu-Cu系統。3D結構之發展大多特別要求結合不同功能層。此結合越來越常藉由所謂之TSV(矽穿孔)來完成。通常藉由銅接觸位點使此等TSV彼此接觸。在接合時刻，固體基板之一個或多個表面上通常存在全值、耐用結構，例如微晶片。因為在微晶片中使用具有不同熱膨脹係數的不同材料，所以不希望在接合期間增加溫度。在接合期間增加溫度可導致熱膨脹及因此導致熱應力，因而毀壞微晶片或其鄰近地區之部件。
迄今為止採用的已知產生方法及途徑通常導致不可再現或較差地再現且尤其幾乎不可應用於改變之條件的結果。特定言之，目前使用之產生方法通常使用高溫(尤其>400℃)以確保可再現之結果。
技術問題(諸如高能量消耗及存在於基板上之結構的可能性毀壞)源自迄今為止高接合力所需的部分地遠遠高於300℃的高溫。
其他要求如下：
- 前段製程相容性。
此定義為電主動組件之生產期間的製程之相容性。因此，接合製程必須經設計，使得已經存在於結構晶圓上之主動組件(諸如電晶體)在處理期間不受負面影響或不被損壞。相容性準則主要包含某些化學元素(主要在CMOS結構中)之純度及機械負載能力(主要為熱應力)。
- 低污染。
- 無施加之力，或施加之力儘可能低。
- 尤其對於具有不同熱膨脹係數之材料，儘可能低之溫度。
接合力之減少導致更謹慎處理結構晶圓，且因此尤其在金屬導體之間的絕緣層係由所謂之「低-k」材料製成時，導致減少由直接機械負載引起之故障概率。
兩個表面之焊接越佳，表面越平坦，表面上之污染越少且兩個表面之表面結構越理想。實際上，此必須處理被水、有機物質、粒子或類似物污染、具有不可忽略之表面粗糙度且通常或多或少經高度氧化的表面。在業界，一般在彼此獨立之若干模組中藉由多種製程移除粒子。因為金屬氧化物在化學上相當穩定，所以氧化物之移除確實為最困難的挑戰之一。即使從金屬表面移除所有黏性物質及化 學產生之生成物，仍存在為理想接合之最後障礙的粗糙表面。
當前接合方法經設計主要用於高壓及高溫下。因為具有不同熱膨脹係數之不同材料在加熱及冷卻製程期間產生不可被忽視之熱應力，所以主要避免高溫對將來半導體應用之焊接至關重要。此外，隨著溫度上升，摻雜元素之擴散日益成為一個問題。在摻雜製程之後，摻雜元素不應離開預期之三維區域。否則，電路之物理性質將根本改變。在最佳之情形中，此導致劣化，在最差及最有可能性之情形中，此導致組件之不可用性。由於記憶體之高電晶體密度及其高摻雜密度，所以主要是記憶體易受高溫之影響。另一方面，存在其中3D技術日益用於提高容量及效能之記憶體。
現有先前技術中之問題為在表面之去污之後產生儘可能平坦之表面。在某種程度上此藉由研磨製程實現。但是，研磨製程不能使表面完全平坦化。另一工作步驟為拋光。此處使用具有特殊表面的進一步減少金屬表面粗糙度之工具。藉由研磨及拋光之組合，可產生奈米級、甚至通常在次奈米範圍中之粗糙度。在大多數情形中，使用所謂之CMP方法。該方法為化學機械拋光製程。不管研磨需要多長的時間或會有多精確，仍經常導致不能被消除之殘餘粗糙度。兩個表面接觸後之此殘餘粗糙度經常導致形成奈米及次奈米範圍之孔隙。
因此，本發明之目的為設計用儘可能高之接合力在同時儘可能低之溫度下，在兩個固體基板之間謹慎產生永久接合之方法。
此目的利用技術方案1之特徵達成。本發明之有利開發方案在獨立之技術方案中給定。說明書、申請專利範圍及/或圖中給定之至少兩個特徵的所有組合亦在本發明之架構內。在給定值範圍下，在所指示之邊界內之值亦被考慮揭示為邊界值且在任何組合中主張。
本發明之基本觀點用於尤其在使固體基板之間接觸或產生固體基板之間之預接合之後，至少在固體基板之一者上施加或產生具有與另一基板之第二材料反應之第一材料的功能層，且因此形成固體基板之間之不可逆或永久接合。兩個固體基板不一定需要彼此形成預接合。在不形成預接合下亦可進行簡單接觸。如本發明中所主張，「反應」為固體擴散及/或相變。在形成/施加第一及/或第二基板上之功能層之前及/或之後，一般尤其藉由沖洗步驟清理固體基板或固體基板。此清理一般應確保表面上不存在將導致未接合位點之粒子。
功能層及包含於功能層中之材料形成引發反應(第一材料與第二材料)的技術可行性，其在以受控方式，尤其藉由透過反應使接觸表面之至少一者(較佳是由功能層形成之接觸表面)變形而產生暫時或可逆接合之後，直接在固體基板之間之接觸表面上增加接合速率及增強永久接合，尤其連同藉由抵靠著彼此將壓力施加至固體基板，封閉由 於表面/接觸表面之不平坦性而存在之間隙。變形一般為體積膨脹，即導致表面之微晶及/或非晶區域之形狀改變的相變或塑化。
如本發明中主張之固體基板係材料能夠作為一種材料與另一供應之材料反應或混合以形成具有較高莫耳體積之混合材料，結果尤其在間隙上形成之固體基板之表面的凹部上引起功能層上之生長的固體基板。由於形成混合晶體、塑性變形良好、穿過導致體積增加的相變之可能性，或由於說明書中列舉用於封閉接合界面中之間隙的任何其他直接或間接方法，以下材料組合尤其有利：- Cu-Fe、Cu-Ge、Cu-In、Cu-Li、Cu-Mg、Cu-Mn、Cu-Nb、Cu-Nd、Cu-Ni、Cu-Si、Cu-Sn、Cu-Zn、Cu-Zr、Cu-Ti、Cu-W、Cu-Ti、Cu-Ta、Cu-Au、Cu-Al、Cu-Cu，- W-Fe、W-Ge、W-In、W-Li、W-Mg、W-Mn、W-Nb、W-Nd、W-Ni、W-Si、W-Sn、W-Zn、W-Zr、W-Ti、W-Ti、W-Ta、W-Au、W-Al，- Ti-Fe、Ti-Ge、Ti-In、Ti-Li、Ti-Mg、Ti-Mn、Ti-Nb、Ti-Nd、Ti-Ni、Ti-Si、Ti-Sn、Ti-Zn、Ti-Zr、Ti-Ta、Ti-Au、Ti-Al，- Ta-Fe、Ta-Ge、Ta-In、Ta-Li、Ta-Mg、Ta-Mn、Ta-Nb、Ta-Nd、Ta-Ni、Ta-Si、Ta-Sn、Ta-Zn、Ta-Zr、Ta-Ti、Ta-W、Ta-Ti、Ta-Ta、Ta-Au、Ta-Al，- Au-Fe、Au-Ge、Au-In、Au-Li、Au-Mg、Au-Mn、 Au-Nb、Au-Nd、Au-Ni、Au-Si、Au-Sn、Au-Zn、Au-Zr、Au-Ti、Au-W、Au-Ti、Au-Ta、Au-Au、Au-Au、Au-Al，- Al-Fe、Al-Ge、Al-In、Al-Li、Al-Mg、Al-Mn、Al-Nb、Al-Nd、Al-Ni、Al-Si、Al-Sn、Al-Zn、Al-Zr、Al-Ti、Al-W、Al-Ti、Al-Al、Al-Al、Al-Al。
亦可設想以下混合形式之半導體為固體基板：
- III-V：GaP、GaAs、InP、InSb、InAs、GaSb、GaN、AlN、InN、AlxGaI-xAs、InxGaI-xN
- IV-IV：SiC、SiGe
- III-VI：InAlP
- 非線性光學器件：LiNbO3、LiTaO3、KDP(KH2PO4)
- 太陽能電池：CdS、CdSe、CdTe、CuInSe2、CuInGaSe2、CuInS2、CuInGaS2
- 導電氧化物：In2-xSnxO3-y
雖然前述二、三及四相系統由於其以相當脆性之方式表現的共價接合親和力主要發生為單晶體且僅在非常少見之情況下發生為多晶體，其等一般具有極其低之邊緣溶解度，但是為本發明中主張之金屬所主張之性質亦可出現於半導體系統中。應注意，當前半導體晶圓之表面粗糙度可降低至將如本發明中主張般封閉之間隙可僅具有埃範圍中之體積的程度。事實上，甚至對於多組分系統之較差邊緣溶解度，組分可溶解於主要組分中(即使僅在ppm之範圍中)。因此，本發明中主張之觀點將視為及應該視為甚至 針對非金屬系統而揭示。
如本發明中所主張，尤其有利的是，在施加功能層之後，在時間上儘可能接近，尤其在2個小時內，較佳地在30分鐘內，甚至更佳地在10分鐘內，理想地在5分鐘內，使固體基板接觸。此方法最小化可能的不必要反應，諸如固體基板之表面的功能層氧化。
如本發明中所主張，可存在手段用於在使接觸表面接觸之前，抑制功能層及/或固體基板之表面之此等反應，尤其藉由固體基板之反應層的鈍化、較佳地藉由曝露於N2、成形氣體或惰性氛圍或在真空下或藉由非晶化來抑制。就此而論，利用包含成形氣體，尤其大部分由成形氣體組成之電漿的處理已證明尤其適合。此處，成形氣體被定義為包含至少2%、較佳地4%、理想地10%或15%氫氣的氣體。混合物之剩餘部分由惰性氣體(諸如，例如氮氣或氬氣)組成。具有惰性氛圍或真空氛圍之系統可較佳地實施為以下系統：其中藉由完全在受控、可調整氛圍(尤其是真空氛圍)中轉移固體基板的固體基板搬運系統，將固體基板從一處理室轉移至下一個處理室。這些系統為熟悉此項技術者所知。
接觸表面習知地展示具有0.2 nm之二次粗糙度(Rq)的粗糙度。此對應於1 nm之範圍中的表面之峰對峰值。利用原子力顯微術(AFM)決定此等經驗值。
對於尤其局部在固體基板之接觸表面之間的間隙上具有至多450 mm之直徑的圓形晶圓之習知晶圓表面，如本發明 中主張之反應適於容許功能層生長0.1 nm至10 nm，尤其生長0.1 nm至1 nm，較佳地生長0.1 nm至0.3 nm，可藉由一個或多個以下方法施加(額外施加之)功能層：
-PECVD
-LPCVD
-氣相沈積
-磊晶法
-MOCVD
-濺鍍
因此，本發明解決藉由在表面之至少一者上，與位於功能層中之另一材料產生固體反應而更良好地焊接彼此接觸的固體基板之表面的問題，所產生之固體反應導致表面附近之對應區域之體積膨脹且因此封閉由於界面(接觸之固體基板之間的邊界表面)中之表面粗糙度而存在之間隙或孔隙。此處應提及的是，待彼此焊接之兩個固體基板已經在極大程度上彼此接觸。因為接觸位點方向上材料遭受膨脹之阻礙，所以在接觸位點處，至固體基板上之體積膨脹一般當然是不可能的。仍明確地提及如本發明中主張的增加能態，使得材料可明顯擴展到孔隙中的所有方法。因為基於增加之能態，材料塑性變形，所以材料藉由如本發明中主張之方法直接擴展至孔隙中(此處舉例而言，但非限制，提及藉由混合晶體形成或相變的體積膨脹)，或因為材料遭受膨脹之阻礙，所以由於本發明中所主張之方法，材料不可在一個方向上擴展，但是材料填充附近孔隙。為 了完整性起見，應提及的是塑性變形可藉由位錯、孿晶或擴散而發生且就嚴格物理意義而言，塑性變形並不伴隨體積膨脹。下文中，塑化與(殘餘彈性)體積膨脹之間不再存在任何明確區別。術語體積膨脹將代表表面部分的殘餘擴大及/或變形。
第二材料可作為一層施加至兩個基板之至少一者(圖2)，可藉由尤其第一多晶材料之晶粒之間的晶界擴散穿透至體積中(圖3)，可在一層結構中與第一材料之層交替(圖4)或可藉由微粒及/或奈米粒子之機械合金施加至第二固體基板(圖5)。
此導致較低溫度下之較高接合強度。
根據本發明之一有利實施例，規定藉由使第二材料擴散至第一材料中，尤其在形成混合材料C下，形成及/或加強永久接合。
根據本發明之另一有利實施例，規定尤其在最多12天、較佳地最多1天、甚至更佳地最多1小時、最佳地最多15分鐘期間，在室溫與200℃之間、尤其在室溫與150℃之間、較佳地在室溫與100℃之間、甚至更佳地在室溫與50℃之間之一溫度下，形成永久性接合。
此處，若不可逆接合具有大於1.5 J/m2、尤其大於2 J/m2、較佳地大於2.5 J/m2之一接合強度，則尤其有利。
由於在固體擴散及/或相變期間，形成具有比第二材料之一莫耳體積及第一材料之一莫耳體積大的莫耳體積之一混合材料C，所以尤其有利的是增加接合強度。以此方 式，造成第二固體基板上或功能層上之生長，此結果為可藉由如本發明中所主張之化學反應封閉接觸表面之間之間隙。結果，減少接觸表面之間之距離，因此減少平均距離，並且最小化無效空間。
就施加/形成功能層之前而言，尤其在10 kHz與600 kHz之間之一活化頻率及/或0.075瓦特/cm2與0.2瓦特/cm2之一功率密度下及/或在0.1 mbar與0.6 mbar之間之一壓力的施加下，使固體基板之表面的電漿活化，造成諸如使接觸表面變平滑的額外效果。此處，壓力之施加定義為電漿活化期間工作氛圍的壓力。
在本發明之另一有利實施例中，有利的是規定固體擴散及/或相變限於具有小於1 μm、尤其小於100 nm、較佳地小於10 nm、甚至更佳地小於1 nm之最大初始密度D的第一固體基板(1)之一表面層(3o)。
就固體基板在0.1 MPa與10 MPa之間之一壓力下擠壓在一起而言，可達成最佳結果。較佳的是，壓力介於0.1 MPa與10 MPa之間，仍更佳地介於0.1 MPa與1 MPa之間，最佳地介於0.1 MPa與0.3 MPa之間。必須選擇壓力為較大，壓力越大，不規則性越大且層越薄。
有利的是，根據本發明之一實施例，規定在一真空中形成/施加功能層。因此，可避免功能層被不必要之材料或化合物污染。
若功能層製成為較佳地在0.1 nm與25 nm之間、更佳地在0.1 nm與15 nm之間、甚至更佳地在0.1 nm與10 nm之 間、最佳地在0.1 nm與5 nm之間之一平均厚度R中，則對方法序列尤其有效。
將從以下較佳例示性實施例之描述及使用圖式瞭解本發明之其他優點、特徵及細節。
利用圖中之相同參考數字識別相同或等效特徵。
本發明描述一種用於(特別而言)第一固體基板1之一第一表面層3及/或第二固體基板2之一第二表面層4及/或提供於一表面層3、4上之一功能層5的表面附近之區域之體積膨脹(自待接合之固態基板1與固態基板2之間之有效接觸表面6進行)的方法。
體積膨脹藉由第一材料A與第二材料B之間之固體反應而發生，使得間隙10在接合製程中額外施加壓力期間沿著有效接觸表面6(界面11)在接觸之固體基板1與固態基板2之間封閉。緊接已根據圖1a使固體基板1、固體基板2接觸之後之間隙10由於其等不平坦性而仍較大。以此方式，有效接觸表面6相應地較小。在圖1b中，已由固體反應引起體積膨脹(生長)，使得間隙10已在大小上明顯減小，特定言之，體積上至少減小到二分之一，較佳地減小到五分之一，甚至更佳地減小到十分之一。相應地，有效接觸表面6已變得更大。
此處，在較佳地存在於功能層5中(體積>50%)之第一材料A與固體基板1及/或固體基板2之一者(較佳是至少第一固體基板1，尤其是上方固體基板1)之第二材料之間發生 固態反應。
可使用以下描述之多種方法產生功能層5，結果形成具有新表面4o'之一改變之第二表面側4'(因為其額外地具有功能層5)。
如本發明中所主張，亦可設想兩個固體基板1、固體基板2由兩種不同材料A1及A2組成。若選擇材料B，使得在與兩個材料A1及A2反應/混合中發生體積膨脹，則此描述可應用於此且由本發明所涵蓋。在一較佳之情形中，選擇材料A1、A2及B為單相、單組分系統。或者，A1及A2為相同的，尤其材料A及B係選自金屬群組。
表面層3及/或表面層4係基板1、基板2之表面3o、表面4o下的體積區域，其中本發明中主張之固體反應至少大部分於該等體積區域中進行。表面層3、表面層4尤其具有小於1 μm、較佳地小於100 nm、甚至更佳地小於10 nm、最佳地小於1 nm之平均厚度D。若材料B製成為多晶材料，則表面層3、表面層4之平均厚度D尤其是材料B(尤其材料B之單晶)之平均粒徑的最多50倍大，更佳地最多20倍大，甚至更佳地最多10倍大，最佳地最多5倍大，所有者中最佳地最多兩倍大。因此，高度放大顯示圖1a及圖1b。
圖1a展示兩個材料A與B之間之固體反應之前的表面3o、表面4o之進行接觸狀態，而圖1b展示完成之體積膨脹及成功的接合製程之後的表面層3、表面層4。該等圖展示體積之改變及沿著界面11或由於間隙封閉而變得更大之有效接觸表面6與體積改變一起發生的間隙封閉。藉由擴大 有效接觸表面6及藉由明顯減少表面3o、表面4o之間之平均距離，大大增加接合力。甚至更理想的是，孔完全封閉，使得至少稍後無法再辨識接合界面。
功能層之材料B至少部分被表面層3及/或表面層4中之固體反應所消耗。功能層5之平均厚度R取決於最多樣之參數(溫度、材料A及材料B之選擇、接合壓力、時間進展、擴散速率)。材料A及材料B可為金屬、塑膠、陶瓷或半導體，金屬為較佳。固體基板1、固體基板2可尤其製成為晶圓。
現在根據本發明詳述本發明之不同實施例。此處，材料A及材料B選擇為單相、單組分材料。材料A及或材料B較佳各由單一或均一材料組成。在所示之實施例中，材料B僅施加於第二固體基板2。
如本發明中所主張之一實施例在於藉由將組分B溶解於A中而使體積膨脹。舉例而言，對於本發明中所主張之實施例，已指定銅-錫系統。材料A之物質為金屬銅且材料B為金屬錫。
藉由形成銅混合晶體C使銅膨脹，因而有助於封閉界面11中的間隙10。
混合晶體C係由至少兩種不同材料(此處為材料A及材料B)組成之結晶相，該至少兩種不同材料在一濃度範圍內可彼此完全混溶。根據Cu-Sn相圖，在室溫下，銅對錫具有溶解度。溶解度隨著溫度上升而增加且具有約850K之峰值。相反地，在多至熔點下，錫對銅具有可忽略之低溶解 度。基於每一個混合晶體之體積及濃度之間之關係(Vegard規則)，在最簡單之實施例中，將作為材料B之錫沈積於第二固體基板2之表面層4(作為材料A之銅之至少表面層4)上(圖2a)上。選擇方法參數，使得此刻第二材料B(錫)並不結合第一材料(銅)。錫量可使得在隨後發生的錫至銅中之擴散(圖2c)中，較佳是從未形成金屬間相。換言之：錫在任何點不會使表面層4飽和而形成金屬間相。對於根據室溫下之相圖的二相系統Cu-Sn，銅中之Sn可不超過約0.01的莫耳濃度(對應於Sn重量約14%)。因此，因為還未超過銅對Sn之溶解度限度，所以抑制Cu3Sn相之形成。對於上升之溫度，Cu中Sn之溶解度相應地變得更大。
但是，銅混合晶體之體積很有可能藉由第二材料B(錫)至第一材料A(銅)中之吸收而改變。因為錫具有大於銅之原子半徑，所以銅混合晶體C之體積隨著增加錫含量而增加(圖2d)。因為擴散常數明確地取決於溫度，所以較佳的是，基於製程參數，尤其藉由溫度增加，控制錫至銅中之擴散製程之開始。
在本文呈現之實施例中，在200℃以下發生永久接合。在如本發明主張所選擇之其他製程參數下開始錫至銅中之明顯擴散的溫度係在室溫(RT)與200℃之間，更佳地在RT與150℃之間，甚至更佳地在RT與100℃之間，最佳地在RT與50℃之間。對於熟悉此項技術者而言，可控制所需擴散之任何參數顯然可用於達成所需效果。
藉由控制使用擴散使銅接受錫，因此增加其體積且因此 可封閉界面11中之間隙10。對於金屬，高塑性額外地促進封閉間隙10之製程。
如本發明中所主張，本發明亦可防止第一材料(銅)對第二材料(錫)之溶解度邊界被超出，使得儘可能大規模地(較佳是完全地)防止金屬間相之分離。就選擇完全以固態混溶之材料A及材料B而言，仍可忽略本發明中所主張之溶解度邊界。
如本發明中主張，在第一材料A(銅)上沈積第二材料B(錫)，使得在對應之溫度下，表面層4中儘可能少之位點(更佳的是無位點)超出銅對錫之溶解度邊界(圖2b)。示意性展示材料A之組分(單晶或多晶)。
根據圖2c，第二材料B(錫)僅在功能層5與施加功能層5之前之表面4o之間之邊界表面上擴散至第一材料A中；尤其對於作為第一材料A之單晶而言，此為較佳實施例。在圖2d中示意性展示第一材料A呈混合材料C之形式的生長。第一材料A之組分之間之中間空間7(若存在)變得更小，使得組分試圖在接觸表面6之方向上膨脹。在此種情況下，由於相對固體基板1之壓力(該壓力普遍存在於作用接觸表面6上)，混合材料C主要在間隙10之區域中膨脹。
為了很大程度上防止金屬間相之形成，根據另一版本，規定作為功能層5之第二材料(錫)不僅在實際溶解製程開始之前沈積於第一材料(銅)之表面4o(圖2)上，而且在不容許錫穿入具有銅之溶液中之情況下引入至層厚度d內之表面層4中(圖3)。
為此目的，第二材料B(錫)將尤其經由晶界擴散製程行進至多晶第一材料A(銅)之較大深度，較佳的是尚未穿入晶粒之體積中，至多在晶粒之外邊緣上略微穿透深度且僅在決定性接合製程中實際上穿透至體積中以使體積增加(圖3)。第一材料A之多晶微結構係多晶，因此由藉由中間空間7(此處為晶界)彼此分離之個別晶粒組成。多晶微結構之中間空間7係不同種類之原子可穿透的二維晶格結構缺陷。較佳的是，產生待接合之固體基板1、固體基板2之至少一者的微結構，使得第二材料(錫)不僅位於表面4o上，而且在不溶解於銅中之情況下位於表面層4中。因此，在此實施例中，功能層5至少部分相同於表面層4。
因此，如本發明中主張之一版本在於使用晶界擴散與體積擴散之間的差異，以將錫運送至銅層之體積深度中而不會使銅晶粒中之濃度上升(尤其參見圖3)。因為對於擴散物種(在例示性實施例中為錫)，前進至廣大晶界中比穿過(銅晶粒之)晶塊之窄晶格容易得多，所以此處選擇製程參數，使得在體積擴散之前發生晶界擴散。此處，擴散係數之考慮具有決定性。預期之溫度下晶界擴散之擴散係數大於對應之體積擴散的擴散係數。因為在每體積單位的較高晶界表面對晶粒體積之比率下，相應地存在更多晶粒邊界，所以此處必須亦考慮該比率。尤其較佳的是，沿著晶界移動之總相態為液體。因此，如本發明中所主張，推薦具有非常低之熔點的材料。液相沿著晶界之擴散速率相應地較高。
因此，由於表面層4從第一材料之每一個組分(銅晶粒)之大約所有側穿透，所以此處第二材料B不僅僅在功能層5與施加功能層5之前之表面4o之間之邊界表面上擴散至第一材料A中。
另一版本在於沈積一層結構(圖4)。組分銅及錫較佳以交替材料A及B藉由習知沈積方法沈積於層中。以此方式，存在根據圖2之「中間溶液」對純「表面溶液」及根據圖3之「混合溶液」，其中對於第二材料B至第一材料A中之擴散存在若干邊界表面。
根據本發明之另一實施例，規定作為微粒及/或奈米粒子8、9之第一材料A(銅)及第二材料B(錫)將從溶液沈積於表面4o上，因此機械合金將施加至第二固體基板2(圖5)。對於銅之已知密度及錫之已知密度與銅及錫粒子之已知平均球形半徑下的球形粒子，可精確地計算銅-錫混合晶體之所需混合比率。已相應地調適之公式可用於具有不同形狀之粒子。
在接合製程中，在此實施例中較佳的是出現燒結橋接，其等將微粒及/或奈米粒子9彼此焊接在一起且焊接至燒結基質10中。同時使第二組分B擴散至燒結基質10中。因為存在透過機械合金而統計上均勻地分佈於第一材料A之燒結基質10中的第二材料B之微粒及/或奈米粒子8，所以可能在第二材料B的體積區域上出現可鮮明勾勒輪廓的最佳均勻分佈。如本發明中主張，選擇材料A及材料B使得新形成之混合晶體C(經由燒結製程)之體積大於接合製程之 前之機械合金之體積。
此處必須考慮因為在微粒及/或奈米粒子8、9之間存在僅藉由燒結製程之後封閉之大量空白空間，所以由於微粒及/或奈米粒子8、9所造成的機械合金一般具有比晶塊材料更低之密度。在最佳情形中，空白空間完全瓦解。較佳的是，接合製程之後之結構再次為具有混合晶體之多晶結構。
如本發明中所主張，亦存在其中銅及錫藉由PVD及/或CVD製程在預期濃度下直接沈積至第二固體基板上的較佳版本。以此方式，直接產生混合材料C(混合晶體)。過多錫濃度將導致金屬間相。
在另一實施例中，藉由形成完全新的相使體積增加，因此相變將代替擴散(亦在本發明中主張之組合中設想)。第二材料B與第一材料A之反應導致莫耳體積大於組分A及B之兩個莫耳體積之和的任何化合物AxBy。將藉由對應製程參數之選擇以受控方式進行相變。因此，沈積之組分B則應僅較佳僅與組分A反應，若這是所希望的，則在接合製程期間進行。因此，體積之增加由相變引起。
在相變之特定實施例中，藉由馬氏體轉變使體積增加。馬氏體轉變為藉由晶格之剪切機制製程發生的較少擴散之相變。剪切機制製程僅藉由非常迅速之溫度下降發生。馬氏體之另一優點在於由馬氏體形成之剪切製程引起之通常極高的位錯密度。在接合製程中，在馬氏體轉變期間藉由體積膨脹封閉孔隙，但是同時結構將極其固結，即其位錯 密度將上升。在一些馬氏體中可能使用位錯密度輔助稍後的再結晶製程。
在另一實施例中，接合製程期間表面附近之區域中體積之增加由合金之離相分解引起。離相分解係均質結構藉由超出臨界參數(較佳是臨界溫度)而自發性分成至少兩個相。藉由濃度係在離相內之多組分系統的冷卻製程，產生均質結構。熟悉此項技術者知道哪些合金可離相分解，且必須如何產生及熱處理此等合金。特定言之，選擇具有分解製程導致體積膨脹之離相分解的合金。
1‧‧‧第一固體基板
2‧‧‧第二固體基板
3‧‧‧第一表面層
3o‧‧‧表面
4、4'‧‧‧第二表面層
4o、4o'‧‧‧表面
5、5'‧‧‧功能層
6‧‧‧有效接觸表面
7‧‧‧中間空間
8‧‧‧微粒及/或奈米粒子
9‧‧‧微粒及/或奈米粒子
10‧‧‧燒結基質
11‧‧‧界面
A‧‧‧第一材料
B‧‧‧第二材料
C‧‧‧混合材料
D‧‧‧平均厚度
R‧‧‧平均厚度
圖1a展示在緊接使第一固體基板與第二固體基板接觸之後如本發明中所主張之方法的時刻如本發明中所主張之一第一固體基板及一第二固體基板，圖1b展示在執行如本發明中所主張之方法之後的永久結合之固體基板，圖2a展示如本發明中所主張之方法用於形成/施加一功能層之一步驟，圖2b至圖2d展示根據圖2a之第二固體基板與功能層之間之邊界表面的擴大，圖3a展示如本發明中所主張之方法用於形成/施加一功能層之一替代步驟，圖3b至圖3d展示根據圖3a之第二固體基板與功能層之間之邊界表面的擴大，圖4a展示如本發明中所主張之方法用於形成/施加一功 能層之一替代步驟，圖4b至圖4d展示根據圖4a之第二固體基板與功能層之間之邊界表面的擴大，圖5a展示如本發明中所主張之方法用於形成/施加一功能層之一替代步驟，圖5b至圖5d展示根據圖5a之第二固體基板與功能層之間之邊界表面的擴大。
1‧‧‧第一固體基板
2‧‧‧第二固體基板
3‧‧‧第一表面層
3o‧‧‧表面
4‧‧‧第二表面層
4o、4o'‧‧‧表面
10‧‧‧燒結基質/間隙
11‧‧‧界面
R‧‧‧平均厚度

Claims (11)

  1. 一種將一第一固體基板(1)接合至包含一第一材料之一第二固體基板(2)的方法，該方法按照以下步驟，尤其按照以下序列：將包含一第二材料之一功能層(5)形成或施加至該第二固體基板(2)，在該功能層(5)上使該第一固體基板(1)與該第二固體基板(2)接觸，將該等固體基板(1、2)擠壓在一起以形成該等第一與第二固體基板(1、2)之間之一永久接合，該永久接合至少部分藉由引起該功能層上之一體積增加之該第一材料與該第二材料之固體擴散及/或相變而加強。
  2. 如請求項1之方法，其中藉由使該第二材料擴散至該第一材料中，尤其在形成一混合材料下，形成及/或加強該永久接合。
  3. 如前述請求項中任一項之方法，其中尤其在一最多12天、較佳地一最多1天、甚至更佳地一最多1小時、最佳地一最多15分鐘期間，在室溫與500℃之間、尤其在室溫與200℃之間、較佳地在室溫與150℃之間、甚至更佳地在室溫與100℃之間、最佳地在室溫與50℃之間之一溫度下形成該永久接合。
  4. 如請求項1或2之方法，其中該永久接合具有大於1.5 J/m2、尤其大於2 J/m2、較佳地大於2.5 J/m2之一接合強度。
  5. 如請求項1或2之方法，其中在固體擴散及/或相變期間，形成具有比該第二材料之一莫耳體積及第一材料之一莫耳體積大的該莫耳體積之一混合材料(C)。
  6. 如請求項1或2之方法，其中在施加/形成該功能層之前及/或之後，使該等固體基板之表面的電漿活化。
  7. 如請求項1或2之方法，其中該固體擴散及/或相變限於具有小於1 μm、尤其小於100 nm、較佳地小於10 nm、甚至更佳地小於1 nm之一最大初始厚度D的該第一固體基板(1)之一第一表面層(3)。
  8. 如請求項1或2之方法，其中在0.1 MPa與10 MPa之間的一壓力下發生該擠壓在一起。
  9. 如請求項8之方法，其中在形成該永久接合之前，該功能層(5)具有介於1埃與10 nm之間的一平均厚度R。
  10. 如請求項1或2之方法，其中在形成該永久接合期間，該第一材料針對該第二材料之溶解度邊界至少僅略微被超出，尤其在固體擴散及/或相變之位點不被超出。
  11. 如請求項1或2之方法，其中該固體擴散至少主要地作為晶界擴散而發生。
TW101123933A 2011-08-30 2012-07-03 晶圓之永久接合之方法 TWI557811B (zh)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/EP2011/064874 WO2013029656A1 (de) 2011-08-30 2011-08-30 Verfahren zum permanenten bonden von wafern durch eine verbindungsschicht mittels festkörperdiffusion oder phasenumwandlung

Publications (2)

Publication Number Publication Date
TW201310552A true TW201310552A (zh) 2013-03-01
TWI557811B TWI557811B (zh) 2016-11-11

Family

ID=44534420

Family Applications (1)

Application Number Title Priority Date Filing Date
TW101123933A TWI557811B (zh) 2011-08-30 2012-07-03 晶圓之永久接合之方法

Country Status (8)

Country Link
US (1) US10163681B2 (zh)
EP (2) EP3043378A3 (zh)
JP (1) JP5889411B2 (zh)
KR (1) KR101927559B1 (zh)
CN (1) CN103548129B (zh)
SG (1) SG194845A1 (zh)
TW (1) TWI557811B (zh)
WO (1) WO2013029656A1 (zh)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI645476B (zh) * 2013-07-05 2018-12-21 Ｅｖ集團Ｅ塔那有限公司 用於接觸表面之接合之方法

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102014106231A1 (de) * 2014-05-05 2015-11-05 Ev Group E. Thallner Gmbh Verfahren und Vorrichtung zum permanenten Bonden
US10112255B2 (en) * 2014-06-17 2018-10-30 Korea Institute Of Energy Research Plate bonding method and plate assembly
CN114695134A (zh) 2014-06-24 2022-07-01 Ev 集团 E·索尔纳有限责任公司 用于衬底的表面处理的方法和设备
US9589937B2 (en) * 2014-08-08 2017-03-07 Wuhan Xinxin Semiconductor Manufacturing Co., Ltd Semiconductor cooling method and method of heat dissipation
WO2016101992A1 (de) 2014-12-23 2016-06-30 Ev Group E. Thallner Gmbh Verfahren und vorrichtung zur vorfixierung von substraten
JP2020508564A (ja) 2017-02-21 2020-03-19 エーファウ・グループ・エー・タルナー・ゲーエムベーハー 基板を接合する方法および装置
GB2582150A (en) * 2019-03-12 2020-09-16 Rolls Royce Plc Method of forming a diffusion bonded joint
EP3754706A1 (en) * 2019-06-20 2020-12-23 IMEC vzw A method for the electrical bonding of semiconductor components
EP3809453A1 (en) * 2019-10-16 2021-04-21 Infineon Technologies Austria AG Method of forming an interconnection between metallic layers of an electric component and an electronic component with removal of oxide layers from the metallic layers by a reducing agent as well as a corresponding arrangement

Family Cites Families (27)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3923231A (en) * 1975-04-11 1975-12-02 Us Energy Diffusion bonding of gold to gold
US4077558A (en) * 1976-12-06 1978-03-07 International Business Machines Corporation Diffusion bonding of crystals
US5372298A (en) * 1992-01-07 1994-12-13 The Regents Of The University Of California Transient liquid phase ceramic bonding
US5276955A (en) 1992-04-14 1994-01-11 Supercomputer Systems Limited Partnership Multilayer interconnect system for an area array interconnection using solid state diffusion
WO1994017551A1 (en) * 1993-01-19 1994-08-04 Hughes Aircraft Company Intermediate-temperature diffusion welding
JP4215285B2 (ja) * 1995-08-08 2009-01-28 株式会社小松製作所 自己潤滑性焼結摺動材およびその製造方法
US5897341A (en) * 1998-07-02 1999-04-27 Fujitsu Limited Diffusion bonded interconnect
US6780794B2 (en) * 2000-01-20 2004-08-24 Honeywell International Inc. Methods of bonding physical vapor deposition target materials to backing plate materials
JP3735526B2 (ja) * 2000-10-04 2006-01-18 日本電気株式会社 半導体装置及びその製造方法
DE10163799B4 (de) * 2000-12-28 2006-11-23 Matsushita Electric Works, Ltd., Kadoma Halbleiterchip-Aufbausubstrat und Verfahren zum Herstellen eines solchen Aufbausubstrates
US6660548B2 (en) 2002-03-27 2003-12-09 Intel Corporation Packaging of multiple active optical devices
US20060127699A1 (en) * 2002-09-14 2006-06-15 Christoph Moelle Protective layer and process and arrangement for producing protective layers
KR20050040812A (ko) * 2002-09-18 2005-05-03 가부시키가이샤 에바라 세이사꾸쇼 본딩물질 및 본딩방법
JP3848989B2 (ja) 2003-05-15 2006-11-22 唯知 須賀 基板接合方法および基板接合装置
JP2005032834A (ja) 2003-07-08 2005-02-03 Toshiba Corp 半導体チップと基板との接合方法
JP4315774B2 (ja) 2003-10-02 2009-08-19 日立金属株式会社 異種材料複合体およびその製造方法
EP1531041A1 (en) * 2003-11-12 2005-05-18 Universita degli Studi di Trento High reliability ceramic multilayer laminates, manufacturing process and design thereof
FR2872625B1 (fr) * 2004-06-30 2006-09-22 Commissariat Energie Atomique Assemblage par adhesion moleculaire de deux substrats, l'un au moins supportant un film conducteur electrique
US7354862B2 (en) 2005-04-18 2008-04-08 Intel Corporation Thin passivation layer on 3D devices
KR100902163B1 (ko) 2007-03-28 2009-06-10 한국과학기술원 취성파괴 방지를 위한 무연솔더와 금속 표면의 합금원소접합방법
JP2009054790A (ja) * 2007-08-27 2009-03-12 Oki Electric Ind Co Ltd 半導体装置
JP4348454B2 (ja) 2007-11-08 2009-10-21 三菱重工業株式会社 デバイスおよびデバイス製造方法
JP2009141292A (ja) * 2007-12-11 2009-06-25 Taiyo Kagaku Kogyo Kk 外部端子電極具備電子部品、その搭載電子用品及び外部端子電極具備電子部品の製造方法
JPWO2009122867A1 (ja) * 2008-03-31 2011-07-28 日本電気株式会社 半導体装置、複合回路装置及びそれらの製造方法
JP5401661B2 (ja) * 2008-08-22 2014-01-29 株式会社ムサシノエンジニアリング 原子拡散接合方法及び前記方法により接合された構造体
KR101055485B1 (ko) 2008-10-02 2011-08-08 삼성전기주식회사 범프볼을 갖는 반도체 패키지
CN103329247B (zh) * 2011-01-25 2018-07-31 Ev 集团 E·索尔纳有限责任公司 用于永久接合晶片的方法

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI645476B (zh) * 2013-07-05 2018-12-21 Ｅｖ集團Ｅ塔那有限公司 用於接觸表面之接合之方法
TWI735814B (zh) * 2013-07-05 2021-08-11 奧地利商Ev集團E塔那有限公司 用於接觸表面之接合之方法
TWI775080B (zh) * 2013-07-05 2022-08-21 奧地利商Ev集團E塔那有限公司 用於接觸表面之接合之方法

Also Published As

Publication number Publication date
EP3043378A2 (de) 2016-07-13
WO2013029656A1 (de) 2013-03-07
US10163681B2 (en) 2018-12-25
SG194845A1 (en) 2013-12-30
EP2729961A1 (de) 2014-05-14
US20140154867A1 (en) 2014-06-05
JP2014529899A (ja) 2014-11-13
CN103548129B (zh) 2017-05-10
KR101927559B1 (ko) 2018-12-10
JP5889411B2 (ja) 2016-03-22
CN103548129A (zh) 2014-01-29
TWI557811B (zh) 2016-11-11
EP3043378A3 (de) 2016-10-19
KR20140057200A (ko) 2014-05-12

Similar Documents

Publication Publication Date Title
TWI557811B (zh) 晶圓之永久接合之方法
JP5070557B2 (ja) 常温接合方法
JP6272807B2 (ja) ２つの金属表面を永久的に接続するための方法
TWI606491B (zh) 塗佈及接合基板之方法
EP3587020A1 (en) Joining member, method for producing joining member, and method for producing joint structure
US11894284B2 (en) Semiconductor structure having silver-indium transient liquid phase bonding joint
JP6173413B2 (ja) 固相拡散または相変態を用いた接続層による恒久的なウエハ結合方法
TWI517204B (zh) 晶圓永久結合之方法及裝置以及切割工具
CN110085526B (zh) 用于施加接合层的方法
Chen et al. Low Temperature TSV Interconnection with Ultra-thin Ag Nano-twinned Films Sputtered on Si Wafers for 3D-IC Advanced Packages
JP7476156B2 (ja) 基板を表面処理するための方法及び装置
Chuang et al. Mechanism of the Evaporation of Ag Nano-Twinned Films on Si Wafers with Assistance of Ion Beam Bombardment
JP6918074B2 (ja) ボンディング層を施与する方法
Chen et al. Sputtering of Ultra-thin Ag Nano-twinned Films on Si Wafers for the Applications in TSV Interconnection of 3D-IC Advanced Packages