TW201251555A - Circuit board and methode for manufacturing the same - Google Patents

Circuit board and methode for manufacturing the same Download PDF

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TW201251555A
TW201251555A TW100126934A TW100126934A TW201251555A TW 201251555 A TW201251555 A TW 201251555A TW 100126934 A TW100126934 A TW 100126934A TW 100126934 A TW100126934 A TW 100126934A TW 201251555 A TW201251555 A TW 201251555A
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Taiwan
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press
hole
fit
cylinder
metal
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TW100126934A
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Chinese (zh)
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TWI437941B (en
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Van Nguyen Duy
Andy She
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Unimicron Technology Shen Zhen Corp
Unimicron Technology Corp
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  • Production Of Multi-Layered Print Wiring Board (AREA)

Abstract

A method for manufacturing circuit boards is provided. First, a first substrate and a second substrate are provided. The first substrate includes a first insulation layer and at least a first through hole in the first insulation layer. The second substrate includes a second insulation layer. Next, a first metallic barrel is formed in the first through hole by plating through-hole. Then, a filler is filled with the first metallic barrel. Two first wiring layers and two second wiring layers are formed. Then, a sticking layer is formed between the first insulation layer and the second insulation layer. After forming the sticking layer, the filler is drilled to remove the filler and to make the first metallic barrel become a first press-fit barrel. The first press-fit barrel has a first press-fit via with a diameter larger than the internal diameter of the first metallic barrel.

Description

201251555 六、發明說明: 【發明所屬之技術領城】 本發明是有關於一種具有非穿透式壓配孔的電路板系 統,且特別是有關於一種具有非穿透式壓配孔的背板系統 (backplane system)的電路板的製造方法。 【先前技術】 現今背板系統通常包括多個電路板,而這些電路板具 有多個金屬筒(metallic barrel)’其中各個金屬筒具有一壓 配孔(press-fit via)’ 以供麼配元件(press_fit component) 的插針(pin)所插裝(inserted),從而使插針與金屬筒緊 配(fasten)。如此,壓配元件能電性連接電路板。 為了使插針能順利地插入至壓配孔中,目前背板系統 的製造過程傾向不在上述壓配孔内填入任何物質。另外, 在現有背板系統的電路板製造過程中,難免會有蝕刻藥液 等具有腐钱性的化學藥品滲入到這些壓配孔内,以至於這 些金屬筒遭到破壞,而可能導致插針不能與金屬筒緊配, 造成背板系統的信賴度(reliability)下降,而影響電性連 接品質。 【發明内容】 本發明提供一種電路板的製造方法,其在金屬筒内填 滿填充物,以減少金屬筒於製造過程中,遭到化學藥品破 壞的情形。 本發明另提供—種電路板,其是由上述製造方法所製 201251555 成。 本發明提出一種電路板的製造方法。提供一第一基板 與一第二基板,其中第一基板包括一第一絕緣層以及至少 一位在第一絕緣層内的第一貫孔,而第二基板包括一第二 絕緣層。接著,利用一通孔電鍍,在第一貫孔内形成一第 一金屬筒,之後,在第一金屬筒内填滿一填充物。形成二 第一線路層以及二第二線路層,其中第一絕緣層位在這些 第一線路層之間。第二絕緣層位在這些第二線路層之間, 而第一金屬筒連接在這些第一線路層之間。接著,在第一 絕緣層與第二絕緣層之間形成一黏合層,其中黏合層接觸 填充物、第一絕緣層、第二絕緣層、其中一第一線路層以 及其中一第二線路層。在形成黏合層之後,對填充物進行 鑽孔,以移除填充物,並使第一金屬筒成為一第一壓配筒, 其中第一壓配筒具有一第一壓配孔,而第一壓配孔的孔徑 大於第一金屬筒的内徑。 在本發明一實施例中,上述第二基板更包括至少一位 在第二絕緣層内的第二貫孔,而電路板的製造方法更包 括:利用通孔電鍍,在第二貫孔内形成一第二金屬筒,其 中第二金屬筒連接在這些第二線路層之間。之後,在第二 金屬筒内填滿另一填充物,其中黏合層更接觸此填充物。 在形成黏合層之後,對另一填充物進行鑽孔,以移除另一 填充物,並使第二金屬筒成為一第二壓配筒,其中第二壓 配筒具有一第二壓配孔,而第二壓配孔的孔徑大於第二金 201251555 屬筒的内徑。 在本發明一實施例中,上述填滿填充物的方法包括: 填入一填充材料至第一金屬筒内。之後,加熱填充材料, 以固化填充材料。 在本發明一實施例中,上述形成黏合層的方法包括令 一半固化膠片黏合在第一絕緣層與第二絕緣層之間。 在本發明一實施例中,上述形成這些第一線路層與這 些第二線路層之前,在第一金屬筒内填滿填充物。 在本發明一實施例中,上述第一基板更包括二第一金 屬層,而第一絕緣層配置在這些第一金屬層之間。 在本發明一實施例中,上述第一壓配孔的深度大於第 一貫孔的深度。 在本發明一實施例中,上述第一壓配孔的深度小於第 一貫孔的深度。 在本發明一實施例中,上述第一金屬筒的筒壁厚度介 於60微米至90微米之間。 在本發明一實施例中,上述第一基板更包括二第一金 屬層,而第一絕緣層配置在這些第一金屬層之間。第二基 板更包括二第二金屬層,而第二絕緣層配置在這些第二金 屬層之間。 在本發明一實施例中,上述第二壓配孔的深度大於第 二貫孔的深度。 在本發明一實施例中,上述第二壓配孔的深度小於第 201251555 二貫孔的深度。 本發明另提出一種電路板,其包括二第一線路層、一 第一絕緣層、至少一第一壓配筒、二第二線路層、一第二 絕緣層以及一黏合層。第一絕緣層位在這些第一線路層之 間。第一壓配筒位在第一絕緣層内,並連接在這些第一線 路層之間,其中第一壓配筒具有一第一壓配孔,而第一壓 配孔的軸心與第一壓配筒的軸心不重疊。第二絕緣層位在 這些第二線路層之間。黏合層形成在第一絕緣層與第二絕 緣層之間,其中黏合層接觸第一絕緣層、第二絕緣層、其 中一第一線路層以及其中一第二線路層。 在本發明一實施例中,上述電路板更包括至少一第二 壓配筒。第二壓配筒位在第二絕緣層内,並連接在這些第 二線路層之間。第二壓配筒具有一第二壓配孔,而第二壓 配孔的軸心與第二壓配筒的軸心不重疊。 在本發明一實施例中,其中一偏移參考直線穿過並垂 直於第一壓配孔的軸心與第一壓配筒的軸心,而第一壓配 筒的一直徑與偏移參考直線不垂直。第一壓配筒在直徑的 延伸方向上的厚度差距介於0至90微米之間。 在本發明一實施例中,其中第一壓配筒更具有一第一 成品孔。第一成品孔與第一壓配孔連通,並位在第一壓配 孔與黏合層之間,其中第一壓配孔的軸心與第一成品孔的 軸心不重疊,而電路板更包括至少一位在第一成品孔内的 填充物。 201251555 基於上述’利用填滿在金屬筒(例如第一金屬筒與第 一金屬筒)内的填充物’本發明能阻擋蝕刻藥液等化學藥 〜入到金屬_内部’從而減少金屬筒遭到化學藥品破壞 的情形。 +為讓本發明之上述特徵和優點能更明顯易懂,下文特 舉實施例,並配合所附圖式,作詳細說明如下。 【實施方式】 圖1A至圖1E是本發明一實施例的電路板的製造方法 的机程剖面示意圖。請參閱圖1A,在本實施例的製造方法 中,首先,提供一第一基板110與一第二基板120。第一 基板110包括一第—絕緣層112以及二第一金屬層114,而 第二基板120包括一第二絕緣層122以及二第二金屬層 124,其中第一絕緣層112配置在這些第一金屬層114之 間’而第二絕緣層122配置在這些第二金屬層124之間。 在圖1A所示的實施例中,第一基板11〇與第二基板 可以皆為線路基板。詳細而言,第一基板11〇可以更 包括一内部線路116,而第二基板120可以更包括一内部 線路126。内部線路116分布在第一絕緣層112内,姐位在 這些第一金屬層114之間。内部線路126分布在第二絕緣 層122内,並位在這些第二金屬層124之間。 内部線路116、126二者可以各自包括至少一層線路 層’而各層線路層包括至少一條走線(t_,未標示)與 至少一個接墊(pad,未標示)〇以圖1A為例,内部線路 201251555 116包括二層線路層’而内部線路126僅包括一層線路層。 不過,在其他實施例中,内部線路116可以僅包括一層或 多層線路層,而内部線路126可以包括多層線路層。 此外,内部線路Π6或126可以更包括電性連接上述 線路層的導電連接結構(未繪示)’而此導電連接結構例如 是常見的導電盲孔結構(conductive blind via structure)、導· 電通孔結構(conductive through hole structure)或導電埋孔 結構(conductive buried hole structure)。 第一絕緣層112與第二絕緣層122二者皆可以具有多 層結構(multilayer structure),且皆包括多層絕緣膜層(未 繪示),其中内部線路116中的各層線路層夾合在第一絕緣 層112的相鄰二層絕緣膜層之間,而内部線路126的線路 層夾合在第二絕緣層122的相鄰二層絕緣膜層之間。 值得一提的是’雖然圖1A所示的第一基板no與第二 基板120皆為線路基板,但在其他實施例中,第一基板11〇 與第二基板120不一定是線路基板。詳細而言,第一基板 110與第二基板120也可以不包括内部線路ι16、,且 第一絕緣層112與第二絕緣層122二者皆僅具有單層結構 (single-layer structure)。因此圖 1A 中的第一基板 11()與 第二基板120僅供舉例說明,並非限定本發明。 舉例而言’第一基板110與第二基板12〇二者至少一 者可為銅箔基板(Copper Clad Laminate ’ CCL )’其中第— 金屬層114與第二金屬層124可為銅箔,而第一絕緣層ll2 201251555 與第一絕緣層122可皆為含樹脂(resin)成分的空白核心 層(blank core)。此外,第一金屬層U4與第二金屬層I% 二者可以是已經過研磨或蝕刻的金屬箔片,或者是經由電 鍍而形成的薄膜。此外,銅箔的面積密度可約為〇.5盎司/ 平方央尺(ounce copper. / squared foot)。 第一基板110更包括至少一位在第一絕緣層112内的 第一貫孔T1,而第二基板12〇更包括至少一位在第二絕緣 層122内的第二貫孔T2。以圖1A為例,第一基板110包 括一個第一貫孔T1,而第二基板120包括一個第二貫孔 T2,但在其他實施例中,第一基板11〇可包括多個第一貫 孔T1,而第二基板120可包括多個第二貫孔T2。 第一貫孔T1與第二貫孔T2二者的形成方法可以相 同,例如第一貫孔T1與第二貫孔T2可以是經由機械鑽孔 (mechanical drilling )或雷射鐵孔(laser drilling )而形成。 此外,在本實施例中,第一貫孔T1的孔徑實質上可以等於 第二貫孔T2的孔徑。不過,其他實施例中,第一貫孔T1 的孔徑也可以不等於第二貫孔T2的孔徑。 另外,雖然圖1A所示的第一基板110與第二基板120 包括第一金屬層114以及第二金屬層124,但是在其他實 施例中,第一基板110可以不包括任何第一金屬層114,而 第二基板120可以不包括任何第二金屬層124。例如,第 一基板110與第二基板120可以皆為空白核心層。因此, 圖1A所示的第一金屬層114與第二金屬層124僅供舉例說 201251555 明,並非限定本發明。 請參閱圖1B,接著,利用通孔電鍍,在第一貫孔T1 内形成一第一金屬筒130,以及在第二貫孔T2内形成一第 二金屬筒140。在進行通孔電鍍的過程中,會對第一貫孔 T1與第二貫孔T2依序進行無電電鍍及電鍍。如此,在第 一貫孔T1内與第二貫孔T2内會沉積金屬,從而形成第一 金屬筒130與第二金屬筒140。 由於第一貫孔T1的孔徑實質上可以等於第二貫孔T2 的孔徑,因此當第一絕緣層112與第二絕緣層122浸泡在 同一化鍍液與同一電鍍液,且第一絕緣層112與第二絕緣 層122二者浸泡化鍍液與電鍍液的時間實質上相等時,第 一金屬筒130的筒壁厚度W1實質上可以與第二金屬筒140 的筒壁厚度W2相等。不過,在其他實施例中,筒壁厚度 W1也可以不等於筒壁厚度W2。此外,筒壁厚度W1與 W2二者可以介於60微米(μιη)至90微米之間。 須說明的是,由於第一金屬筒130形成在第一貫孔Τ1 内,而第二金屬筒140形成在第二貫孔Τ2内,因此第一貫 孔Τ1的數量可以相等於第一金屬筒130的數量,而第二貫 孔Τ2的數量可相等於第二金屬筒140的數量。所以,雖然 圖1Β僅繪示一個第一金屬筒130與一個第二金屬筒140, 但在其他實施例中,當第一基板110包括多個第一貫孔 Τ1,而第二基板120包括多個第二貫孔Τ2時,第一金屬 筒130與第二金屬筒140二者的數量可以是多個。 11 201251555 此外,在其他實施例中,部分第一貫孔τι内可以不必 形成任何第一金屬筒130,而部分第二貫孔Τ2内可以不必 形成任何第二金屬筒140。換句話說,第一貫孔Τ1的數量 可以大於第一金屬筒130的數量,而第二貫孔Τ2的數量可 以大於第二金屬筒140的數量。 在形成第一金屬筒130與第二金屬筒140之後,接著, 在第一金屬筒130内填滿一填充物150,以及在第二金屬 筒140内填滿一填充物16〇。填充物150與填充物160二 者可以是絕緣體或導體。例如,填充物15〇與填充物160 皆為絕緣體或導體;或是,填充物15〇為導體,而填充物 160為絕緣體;或者是,填充物15〇為絕緣體,而填充物 160為導體。 填充物150與填充物160二者可為熱固性材料,例如 熱固性樹脂’因此在填滿填充物150與填充物16〇的方法 中’首先’可在笫一金屬筒130内以及第二金屬筒140内 分別填入填充材料(fillmaterial),其中此填充材料例如是 環氧樹脂(epoxy resin )等非導電材料(non-conductive material)。之後,加熱位在第一金屬筒13〇内及第二金屬 筒140内的填充材料,以固化這些填充材料。 由於填充物150與填充物160可為導體,因此上述填 充材料可以是導電膏(例如銀膠或銅膏)、含導電顆粒的樹 月日材料或導電南分子等導電材料(conductive material)。此 外’當填充物150為導體時,填充物15〇也可以是由電鍍 12 201251555 或無電電鍍所形成的導體杈。 另外’當填充物150為導體時,填充物16〇可以是絕 緣體。或者,當填充物150為絕緣體時,填充物16〇可以 是導體。因此,填充物150與填充物16〇二者材料可以不 同,所以位在第一金屬筒13〇内與第二金屬筒14〇内的填 充材料二者也可以不同。 須說明的是,除了熱固性材料之外,填充物15〇與填 充物16G二者也可以;^其他熱固性材料以外的材料,例如 紫外光硬化膠等光硬化材料。所以,本發明並*限定僅以 加熱方式來固化第-金屬筒13G内以及第二金屬筒14〇内 的填充材料。 之後’形成二第一線路層171以及二第二線路層172, 其中第一絕緣層112位在這些第一線路層171之間,而第 二絕緣層122位在這些第二線路層172之間。笋一金屬筒 130連接在這些第一線路層171之間,而第二金屬筒14〇 連接在這些第二線路層172之間。 形成這些第一線路層171與這些第二線路層172的方 法可以包括半加成法(semi_Additive )。詳細而言,第一線 路層171與第二線路層172可以是利用電鍍來形成。詳細 而言,在進行電鍍以前,可以先用無電電鍍形成一電鍍種 子層(seed layer,未繪示),其中電鍍種子層全面覆蓋第一 貫孔τι孔壁、第二貫孔T2孔壁、第—金屬層114表面以 及第二金屬層124表面。接著,分別形成圖案化遮罩層(未 13 201251555 繪示)覆蓋部分第一金屬層H4表面與部分第二金屬層124 表面,並顯露出第一貫孔T1與第二貫孔T2,其中圖案化 遮罩層所使用的材料例如是已經過顯影的光阻 (photoresist)或乾膜(dry film)。 接著,進行電鍍,從而在第一貫孔T1内形成第一金屬 筒130,同時在第二貫孔Τ2内形成第二金屬筒140,以及 同時在圖案化遮罩層所露出的第一金屬層114與第二金屬 層124表面上沉積圖案化金屬層。之後,移除圖案化遮罩 層,並接著進行微钱刻(microetching),以移除原為圖案 化遮罩層所覆蓋的第一金屬層114與第二金屬層124。如 此,第一線路層171與第二線路層172得以形成。 當然,在進行微蝕刻之前,可以先在第一金屬筒130 内填滿填充物150,以及在第二金屬筒140内填滿填充物 160。如此,填充物150能阻擋蝕刻藥液滲入到第一金屬筒 130内部,而填充物160能阻擋蝕刻藥液滲入到第二金屬 筒140内部,從而保護第一金屬筒130與第二金屬筒140 免於遭到蝕刻藥液等化學藥品所破壞。 除了半加成法之外,形成這些第一線路層171與這些 第二線路層172的方法也可以包括減去法(subtractive)。 詳細而言,在進行第一貫孔T1與第二貫孔T2的通孔電鍍 的過程中,可以利用無電電鍍及電鍍來形成第一金屬筒130 與第二金屬筒140,並且也同時在第一金屬層114與第二 金屬層124上沉積金屬層,以增加第一金屬層114與第二 14 201251555 金屬層124二者厚度。之後,對增厚的第一金屬層ιι4與 第二金屬層 124 以微影(ph〇toiith〇graphy)與蝕刻(etching) 方式進行圖案化步驟’從而形成第—線路層l7i與第二線 路層172。 ~ ✓員說月的χ |力口成法與減去法這二種電路板製造技 術皆為現有電路板製造技觸财具有㈣知識者所熟知 的成熟技藝’所以縱使沒有圖式解說或詳細說明以上半加 成法與減去法二者的步驟,對於上述具有通常知識者而 言,仍可以根據以上内容而容易知曉第—線路層ΐ7ι與第 二線路層172是如何經由半加成法或減*法而形成。因 此,以上半加成法與減去法躲本領域t具有財知識者 而言是明確且充分揭露,而可據以實施。 承上述’在進行微影錢刻以前,也就是在形成第一 線路層Hi與第二線路層172之前,會先在第一金屬筒13〇 内填滿填充物15〇,以及在第二金Ml4G㈣滿填充物 160。如此,填充物15〇能阻擋蝕刻藥液滲入到第一金屬筒 130内部’而填充物16〇能阻職刻藥液渗人到第二金屬 筒H0内部’從而保護第一金屬筒13(^第二金屬筒14〇 免於遭到蝕刻藥液等化學藥品所破壞。 言月參閱圖1C,之後,在第一絕緣層112與第 長上厶与在的—ΆΪΟ ^ 122之間形成—黏合層⑽,其中黏合層⑽接觸填充 b〇、填充物160、其中一層第一線路層171以及其中一 第二線路層172。形成黏合層18〇的方法可以是令一片 15 201251555 固化膠片黏合在第一基板11〇或第二基板12〇之間,所以 黏合層180可以包括樹脂與玻璃纖維。 不過,除了黏合半固化膠片之外,形成黏合層180的 方法也可以是在第一基板11()或第二基板12〇之間塗佈液 態膠材或是具有流動性的膠材,其例如是膏狀或液態的樹 脂材料。因此’本發明並不限定黏合層18〇只能採用半固 化膠片來形成。 請參閱圖1C至圖1E,在形成黏合層180之後’對填 充物150與填充物160進行鑽孔,以移除填充物150與填 充物160’並且使第一金屬筒13〇成為一第一壓配筒132, 以及使第一金屬离140成為一第二壓配筒142。第一壓配 筒132具有一第一壓配孔H1,而第二壓配筒142具有一第 二壓配孔H2。至此’ 一種用於背板系統的電路板1〇〇已製 造完成,且第一壓配筒132與第二壓配筒142二者可以供 插針所插裝,以使插針與第一壓配筒132及第二壓配筒142 緊配。 詳細而言,第一壓配孔H1與第二壓配孔H2是由鑽頭 11、12分別對填充物150與填充物160鑽孔而形成,其中 鑽頭11的直徑R3會大於第一金屬筒130的内徑R5,而鑽 頭12的直徑R4會大於第二金屬筒140的内徑R6,如圖 1C與圖1D所示。因此,在進行完鑽孔之後,鑽頭u、12 基本上不僅會移除填充物150與填充物160,而且也會移 除由部分第一金屬筒130與部分第二金屬筒140内表面起 16 201251555 的部份金屬筒壁厚度,從而形成第一壓配筒132與第二壓 配筒142。 換句話說,第一壓配筒132是移除填充物150所接觸 的部分第一金屬筒130而形成,而第二壓配筒142是移除 填充物160所接觸的部分第二金屬筒140而形成,以至於 第一壓配孔H1的孔徑R7會大於第一金屬筒130的内徑 R5,而第二壓配孔H2的孔徑R8會大於第二金屬筒140的 内徑R6。此外,孔徑R7與内徑R5 (請參閱圖1C)二者 之間的差距可以介於0.12公厘(mm)至0.13公厘之間, 而孔徑R8與内徑R6(請參閱圖1C)二者之間的差距可以 介於0.12公厘至0.13公厘之間。 另外,鑽頭11具有一錐形頭llh,而鑽頭12具有一錐 形頭12h。在進行鑽孔的過程中,錐形頭llh會先接觸填 充物150,而錐形頭12h會先接觸填充物160。因此,在形 成第一壓配孔H1與第二壓配孔H2之後’第一壓配孔H1 與第二壓配孔H2分別具有凹陷底面(recess bottom) B1 與B2。當錐形頭llh與12h二者的形狀為圓錐體時,凹陷 底面B1與B2二者實質上可以是内凹曲面(curved-inward surface) 0 在本實施例中,鑽頭11與12二者的尺寸可以相同, 例如鑽頭11的直徑R3可以與鑽頭12的直徑R4相同。所 以,孔徑R7實質上可以等於孔徑R8。不過,在其他實施 例中,鑽頭11與12二者的尺寸也可以互不相同,所以孔 17 201251555 徑R7也可以不等於孔徑R8。 另外,在本實施例中,第一壓配孔H1的深度D1可以 大於第一貫孔T1的深度D3,而第二壓配孔H2的深度D2 可以大於第二貫孔T2的深度D4,如圖1E所示。換句話說, 圖1D所示鑽頭11可以貫穿第一絕緣層112,而鑽頭12可 以貫穿第二絕緣層122。 電路板100包括二第一線路層171、一位在這些第一 線路層171之間的第一絕緣層112、至少一位在第一絕緣 層112内的第一壓配筒132、二第二線路層172、一位在這 些第二線路層172之間的第二絕緣層122、至少一位在第 二絕緣層122内的第二壓配筒142以及一形成在第一絕緣 層112與第二絕緣層122之間的黏合層180。 第一壓配筒132連接在這些第一線路層171之間,並 具有一第一壓配孔H1。第二壓配筒142連接在這些第二線 路層172之間,並具有一第二壓配孔H2。黏合層180接觸 第一絕緣層112、第二絕緣層122、其中一第一線路層171 以及其中一第二線路層172。 請參閱圖1E與圖1F,其中圖1F為圖1E中第一壓配 筒132的俯視示意圖。從圖1F來看,第一壓配孔H1的軸 心R1與第一壓配筒132的軸心P2不重疊。同樣的結構也 可以套用在第二壓配筒142上。詳細而言,第二壓配孔H2 的軸心(未繪示)與第二壓配筒142的軸心(未繪示)也 可以不重疊。 18 201251555 造成第一壓配孔HI的軸心R1與第一壓配筒132的軸 心P2不重疊,以及第二壓配孔H2的軸心與第二壓配筒142 的軸心不重疊的原因乃是因為鑽頭11、12在進行鑽孔的過 程中,受到機器誤差的影響,導致軸心作些許偏移。不過, 這種偏移並不會影響第一壓配筒132與第二壓配筒142二 者的功能,所以也不會影響電路板100的整體運作。 此外,一偏移參考直線L1穿過並垂直於第一壓配孔 H1的軸心R1與第一壓配筒132的軸心P2,而第一壓配筒 132的一直徑R9與偏移參考直線L1不垂直,其中第一壓 配筒132在直徑R9的延伸方向上的厚度TH1與TH2二者 差距介於0至筒壁厚度W1或W2 (請參閱圖1B)之間, 即厚度TH1與TH2二者差距介於0至90微米。另外,第 二壓配筒142也可具有如同前述厚度TH1與TH2二者的差 距,而在此不重複敘述。 圖2是依據本發明另一實施例所製造而成的電路板的 剖面示意圖。請參閱圖2,電路板200包括第一壓配筒232 與第二壓配筒242,其中第一壓配筒232具有一第一壓配 孔ΗΓ與一第一成品孔F1,而第一成品孔F1與第一壓配孔 ΗΓ連通,並位在第一壓配孔H1’與黏合層180之間。第二 壓配筒242與第一壓配筒232二者構造相同,因此第二壓 配筒242也具有一第二壓配孔H2’與一第二成品孔F2,而 第二成品孔F2與第二壓配孔H2’連通,並位在第二壓配孔 H2’與黏合層180之間。 19 201251555 第一壓配孔ΗΓ的深度D1’也可以小於第一貫孔T1的 深度D3,而第二壓配孔Η2,的深度D2’也可以大於第二貫 孔Τ2的深度D4,如圖2所示。換句話說’在進行鑽孔的 過程中,鑽頭11 (請參閱圖1D)不一定要貫穿第一絕緣層 112,而鑽頭12 (請參閱圖1D)也不一定要貫穿第二絕緣 層122,所以第一壓配孔Η1’内會殘留部分填充物150 ’而 第二壓配孔Η2’内會殘留部分填充物160。因此’電路板 200可包括多個填充物150、160,而這些填充物150、160 分別位在第一成品孔F1内與第二成品孔F2内。另外,第 一壓配筒232與第二壓配筒242二者也可以具有如圖1F所 示的轴心偏移結構,而在此不再重複敘述。 值得一提的是’在其他實施例中,第二基板12〇可以 不具有任何第二貫孔Τ2 ’因此電路板1〇〇、2〇〇可不具有 任何第二壓配孔Η2與Η2’。換句話說’在其他實施例中, 可以只形成在其中一塊基板(例如第一基板11〇或第二基 板120)上製作壓配筒(例如第一壓配筒132或第二壓配 筒142),而另-塊基板完全不製作任何壓配筒。 綜上所述,本發明利用填滿在金屬筒(例如第一金屬 筒m與第二金職⑽)内的填充物(例如填充物15〇 與填充物⑽)來阻擋㈣藥”化學藥品滲人到金屬筒 内部’從而減少金屬筒遭到化學藥品破壞的情形。如此, 可以維持或提高插針與壓配筒之間緊配的品質,以保持或 提升背板系統的信賴度。 2〇 201251555 此外,在本發明一實施例中,當填充物為導體,例如 填充物是由導電高分子等導電材料所形成時,即使在鑽孔 之後,仍有殘留的填充物附著在壓配筒的内壁上,殘留的 填充物基本上不會讓插針與壓配筒之間出現接觸不良的情 形,從而不會影響插針與壓配筒之間整體電性連接的品質。 雖然本發明以前述實施例揭露如上,然其並非用以限 定本發明,任何熟習相像技藝者,在不脫離本發明之精神 和範圍内,所作更動與潤飾之等效替換,仍為本發明之專 利保護範圍内。 【圖式簡單說明】 圖1A至圖1E是本發明一實施例的電路板的製造方法的流 程剖面示意圖。 圖1F為圖1E中第一壓配筒的俯視示意圖。 圖2是依據本發明另一實施例所製造而成的電路板的剖面 示意圖。 【主要元件符號說明】 11、12 鑽頭 llh、12h 錐形頭 100 、 200 電路板 110 第一基板 112 第一絕緣層 114 第一金屬層 116、126 内部線路 21 201251555 120 第二基板 122 第二絕緣層 124 第二金屬層 130 第一金屬筒 140 第二金屬筒 132 ' 232 第一壓配筒 142 、 242 第二壓配筒 150 ' 160 填充物 171 第一線路層 172 第二線路層 180 黏合層 B1、B2 凹陷底面 D1、Dr、D2、D2’、D3、D4 深度 FI 第一成品孔 F2 第二成品孔 HI ' ΗΓ 第一壓配孔 H2、H2’ 第二壓配孔 LI 偏移參考直線 R1 > P2 轴心 R7、R8 孔徑 R3、R4、R9 直徑 R5、R6 内徑 T1 第一貫孔 22 201251555 Τ2 ΤΗ1 W1、 第二貫孔 ' TH2 厚度 W2 筒壁厚度 23201251555 VI. Description of the Invention: [Technology Leading City of the Invention] The present invention relates to a circuit board system having a non-transmissive press-fit hole, and more particularly to a back plate having a non-penetrating press-fit hole A method of manufacturing a circuit board of a backplane system. [Prior Art] Today's backplane systems typically include a plurality of circuit boards having a plurality of metallic barrels 'where each metal cylinder has a press-fit via' for the components The pin of (press_fit component) is inserted so that the pin is fastened to the metal can. In this way, the press-fit component can be electrically connected to the circuit board. In order for the pin to be smoothly inserted into the press-fit hole, the manufacturing process of the back plate system tends not to fill any of the above-mentioned press-fit holes. In addition, in the manufacturing process of the circuit board of the existing backplane system, it is inevitable that a corrosive chemical such as an etching liquid penetrates into the press-fit holes, so that the metal cylinders are damaged, and the pins may be caused. It cannot be tightly fitted with the metal cylinder, which causes the reliability of the backplane system to decrease, which affects the quality of the electrical connection. SUMMARY OF THE INVENTION The present invention provides a method of manufacturing a circuit board in which a metal can is filled with a filler to reduce the chemical damage of the metal can in the manufacturing process. The present invention further provides a circuit board which is manufactured by the above manufacturing method 201251555. The invention provides a method of manufacturing a circuit board. A first substrate and a second substrate are provided, wherein the first substrate comprises a first insulating layer and at least one first through hole in the first insulating layer, and the second substrate comprises a second insulating layer. Next, a first metal can is formed in the first through hole by a through hole plating, and then a filling is filled in the first metal can. Two first circuit layers and two second circuit layers are formed, wherein the first insulating layer is located between the first circuit layers. A second insulating layer is positioned between the second wiring layers, and a first metal can is connected between the first wiring layers. Next, an adhesive layer is formed between the first insulating layer and the second insulating layer, wherein the adhesive layer contacts the filler, the first insulating layer, the second insulating layer, one of the first circuit layers, and one of the second circuit layers. After forming the adhesive layer, the filler is drilled to remove the filler, and the first metal cylinder is a first press-fit cylinder, wherein the first press-fit cylinder has a first press-fit hole, and the first The pore diameter of the press fitting hole is larger than the inner diameter of the first metal cylinder. In an embodiment of the invention, the second substrate further includes at least one second through hole in the second insulating layer, and the manufacturing method of the circuit board further comprises: forming a second through hole by using through hole plating A second metal cylinder, wherein the second metal cylinder is connected between the second circuit layers. Thereafter, the second metal can is filled with another filler, wherein the adhesive layer is more in contact with the filler. After forming the adhesive layer, another filler is drilled to remove another filler, and the second metal cylinder is a second press fitting cylinder, wherein the second press fitting cylinder has a second press fitting hole The diameter of the second press-fit hole is larger than the inner diameter of the second gold 201251555. In an embodiment of the invention, the method of filling the filler includes: filling a filling material into the first metal cylinder. Thereafter, the filler material is heated to cure the filler material. In an embodiment of the invention, the method of forming an adhesive layer includes bonding a half of the cured film between the first insulating layer and the second insulating layer. In an embodiment of the invention, the first metal can is filled with a filler before the first circuit layer and the second circuit layers are formed. In an embodiment of the invention, the first substrate further includes two first metal layers, and the first insulating layer is disposed between the first metal layers. In an embodiment of the invention, the depth of the first press-fit hole is greater than the depth of the first consistent hole. In an embodiment of the invention, the depth of the first press-fit hole is smaller than the depth of the first consistent hole. In an embodiment of the invention, the first metal cylinder has a cylinder wall thickness of between 60 microns and 90 microns. In an embodiment of the invention, the first substrate further includes two first metal layers, and the first insulating layer is disposed between the first metal layers. The second substrate further includes two second metal layers, and the second insulating layer is disposed between the second metal layers. In an embodiment of the invention, the second press-fit hole has a depth greater than a depth of the second hole. In an embodiment of the invention, the depth of the second press-fit hole is smaller than the depth of the second hole of the 201251555. The invention further provides a circuit board comprising two first circuit layers, a first insulating layer, at least one first press-fitted cylinder, two second circuit layers, a second insulating layer and an adhesive layer. A first insulating layer is positioned between the first circuit layers. The first press-fit cylinder is located in the first insulation layer and is connected between the first circuit layers, wherein the first press-fit cylinder has a first press-fit hole, and the first press-fit hole has an axis and a first The axes of the press-fit cylinders do not overlap. A second insulating layer is positioned between the second wiring layers. The adhesive layer is formed between the first insulating layer and the second insulating layer, wherein the adhesive layer contacts the first insulating layer, the second insulating layer, a first wiring layer thereof, and one of the second wiring layers. In an embodiment of the invention, the circuit board further includes at least one second press-fit cylinder. The second press-fit cylinder is positioned within the second insulating layer and is coupled between the second circuit layers. The second press-fit cylinder has a second press-fit hole, and the axis of the second press-fit hole does not overlap with the axis of the second press-fit cylinder. In an embodiment of the invention, an offset reference line passes through and is perpendicular to the axis of the first press-fit hole and the axis of the first press-fit cylinder, and a diameter and offset reference of the first press-fit cylinder The line is not vertical. The thickness of the first press-fit cylinder in the direction in which the diameter extends is between 0 and 90 microns. In an embodiment of the invention, the first press-fit cylinder has a first finished hole. The first product hole is in communication with the first press-fit hole and is located between the first press-fit hole and the adhesive layer, wherein the axis of the first press-fit hole does not overlap with the axis of the first finished hole, and the circuit board is further A filler is included in at least one of the first product holes. 201251555 Based on the above-mentioned 'utilization of a filler filled in a metal cylinder (for example, a first metal cylinder and a first metal cylinder)', the present invention can block a chemical such as an etching liquid from entering into the metal interior to reduce the metal cylinder The situation of chemical damage. The above features and advantages of the present invention will become more apparent from the following description. [Embodiment] Figs. 1A to 1E are schematic cross-sectional views showing a method of manufacturing a circuit board according to an embodiment of the present invention. Referring to FIG. 1A, in the manufacturing method of the embodiment, first, a first substrate 110 and a second substrate 120 are provided. The first substrate 110 includes a first insulating layer 112 and two first metal layers 114, and the second substrate 120 includes a second insulating layer 122 and two second metal layers 124, wherein the first insulating layer 112 is disposed at the first The second insulating layer 122 is disposed between the metal layers 114 between the second metal layers 124. In the embodiment shown in FIG. 1A, the first substrate 11A and the second substrate may both be circuit substrates. In detail, the first substrate 11A may further include an internal line 116, and the second substrate 120 may further include an internal line 126. The internal lines 116 are distributed within the first insulating layer 112 between the first metal layers 114. Internal lines 126 are distributed within the second insulating layer 122 and are located between the second metal layers 124. The internal lines 116, 126 may each include at least one circuit layer 'and each of the circuit layers includes at least one trace (t_, not labeled) and at least one pad (not labeled), for example, FIG. 1A, internal lines 201251555 116 includes a two-layer circuit layer' and internal line 126 includes only one layer of wiring. However, in other embodiments, internal wiring 116 may include only one or more wiring layers, while internal wiring 126 may include multiple wiring layers. In addition, the internal wiring Π6 or 126 may further include a conductive connection structure (not shown) electrically connected to the above-mentioned circuit layer, and the conductive connection structure is, for example, a common conductive blind via structure, a conductive via hole. A conductive through hole structure or a conductive buried hole structure. Both the first insulating layer 112 and the second insulating layer 122 may have a multilayer structure, and each includes a plurality of insulating film layers (not shown), wherein each layer of the circuit layer in the internal line 116 is sandwiched between the first layer The insulating layer 112 is between adjacent two insulating film layers, and the wiring layer of the internal wiring 126 is sandwiched between adjacent two insulating film layers of the second insulating layer 122. It is to be noted that although the first substrate no and the second substrate 120 shown in FIG. 1A are both circuit substrates, in other embodiments, the first substrate 11 〇 and the second substrate 120 are not necessarily circuit substrates. In detail, the first substrate 110 and the second substrate 120 may not include the internal wiring ι16, and both the first insulating layer 112 and the second insulating layer 122 have only a single-layer structure. Therefore, the first substrate 11() and the second substrate 120 in Fig. 1A are for illustrative purposes only and are not intended to limit the invention. For example, at least one of the first substrate 110 and the second substrate 12 可 may be a copper foil substrate (Copper Clad Laminate ' CCL ), wherein the first metal layer 114 and the second metal layer 124 may be copper foil, and The first insulating layer ll2 201251555 and the first insulating layer 122 may both be blank cores containing a resin component. Further, both the first metal layer U4 and the second metal layer I% may be metal foils that have been ground or etched, or thin films formed by electroplating. In addition, the area density of the copper foil may be approximately ounce.5 oz / squared foot. The first substrate 110 further includes at least one first uniform hole T1 in the first insulating layer 112, and the second substrate 12 further includes at least one second through hole T2 in the second insulating layer 122. For example, in FIG. 1A, the first substrate 110 includes a first through hole T1, and the second substrate 120 includes a second through hole T2. However, in other embodiments, the first substrate 11A may include a plurality of first through holes. The hole T1, and the second substrate 120 may include a plurality of second through holes T2. The forming method of the first through hole T1 and the second through hole T2 may be the same. For example, the first through hole T1 and the second through hole T2 may be through mechanical drilling or laser drilling. And formed. Further, in the present embodiment, the aperture of the first through hole T1 may be substantially equal to the aperture of the second through hole T2. However, in other embodiments, the aperture of the first through hole T1 may not be equal to the aperture of the second through hole T2. In addition, although the first substrate 110 and the second substrate 120 illustrated in FIG. 1A include the first metal layer 114 and the second metal layer 124, in other embodiments, the first substrate 110 may not include any first metal layer 114. And the second substrate 120 may not include any second metal layer 124. For example, the first substrate 110 and the second substrate 120 may both be blank core layers. Therefore, the first metal layer 114 and the second metal layer 124 shown in FIG. 1A are only for example, 201251555, and do not limit the present invention. Referring to FIG. 1B, next, through the via plating, a first metal can 130 is formed in the first through hole T1, and a second metal can is formed in the second through hole T2. During the through-hole plating process, the first through hole T1 and the second through hole T2 are sequentially subjected to electroless plating and plating. Thus, metal is deposited in the first continuous hole T1 and the second through hole T2, thereby forming the first metal can 130 and the second metal can 140. Since the aperture of the first through hole T1 is substantially equal to the aperture of the second through hole T2, when the first insulating layer 112 and the second insulating layer 122 are immersed in the same plating solution and the same plating solution, and the first insulating layer 112 When the time for immersing the plating solution and the plating solution with the second insulating layer 122 is substantially equal, the wall thickness W1 of the first metal can 130 may be substantially equal to the wall thickness W2 of the second metal can 140. However, in other embodiments, the wall thickness W1 may not be equal to the wall thickness W2. Further, both of the wall thicknesses W1 and W2 may be between 60 micrometers and 90 micrometers. It should be noted that since the first metal cylinder 130 is formed in the first through hole ,1 and the second metal cylinder 140 is formed in the second through hole ,2, the number of the first through holes 可以1 may be equal to the first metal cylinder The number of the second through holes 可2 may be equal to the number of the second metal cylinders 140. Therefore, although FIG. 1A shows only one first metal cylinder 130 and one second metal cylinder 140, in other embodiments, when the first substrate 110 includes a plurality of first through holes ,1, and the second substrate 120 includes more When the second through holes are 2, the number of both the first metal cylinder 130 and the second metal cylinder 140 may be plural. In addition, in other embodiments, it may not be necessary to form any first metal cylinder 130 in a portion of the first through hole τ1, and it is not necessary to form any second metal cylinder 140 in a portion of the second through hole Τ2. In other words, the number of the first through holes 可以1 may be greater than the number of the first metal cylinders 130, and the number of the second through holes Τ2 may be greater than the number of the second metal cylinders 140. After the first metal cylinder 130 and the second metal cylinder 140 are formed, then, a filler 150 is filled in the first metal cylinder 130, and a filler 16 is filled in the second metal cylinder 140. Both the filler 150 and the filler 160 may be an insulator or a conductor. For example, the filler 15 and the filler 160 are both insulators or conductors; alternatively, the filler 15 is a conductor and the filler 160 is an insulator; alternatively, the filler 15 is an insulator and the filler 160 is a conductor. Both the filler 150 and the filler 160 may be a thermoset material, such as a thermoset resin. Thus, in the method of filling the filler 150 and the filler 16 ', 'first' may be within the first metal can 130 and the second metal can 140 Filled with a fill material, for example, a non-conductive material such as an epoxy resin. Thereafter, the filler material in the first metal can 13 and the second metal can 140 is heated to cure the filler. Since the filler 150 and the filler 160 may be conductors, the above filler material may be a conductive paste (e.g., silver paste or copper paste), a conductive material containing a tree material, or a conductive material such as a conductive south molecule. Further, when the filler 150 is a conductor, the filler 15 can also be a conductor crucible formed by electroplating 12 201251555 or electroless plating. Further, when the filler 150 is a conductor, the filler 16A may be an insulator. Alternatively, when the filler 150 is an insulator, the filler 16A may be a conductor. Therefore, the material of the filler 150 and the filler 16 can be different, so that the filling materials in the first metal cylinder 13 and the second metal cylinder 14 can be different. It should be noted that, in addition to the thermosetting material, both the filler 15〇 and the filler 16G may be used; other materials other than the thermosetting material, such as a photohardening material such as an ultraviolet curing adhesive. Therefore, the present invention* limits the filling of the filler material in the first metal cylinder 13G and the second metal cylinder 14〇 only by heating. Thereafter, two first wiring layers 171 and two second wiring layers 172 are formed, wherein the first insulating layer 112 is located between the first wiring layers 171, and the second insulating layer 122 is located between the second wiring layers 172. . A bamboo shoot metal cylinder 130 is connected between the first wiring layers 171, and a second metal cylinder 14 is connected between the second wiring layers 172. The method of forming these first wiring layers 171 and these second wiring layers 172 may include a semi-additive method (semi_Additive). In detail, the first wiring layer 171 and the second wiring layer 172 may be formed by electroplating. In detail, before electroplating, a plating seed layer (not shown) may be formed by electroless plating, wherein the electroplating seed layer completely covers the first through hole τι wall, the second through hole T2, and The surface of the first metal layer 114 and the surface of the second metal layer 124. Then, a patterned mask layer (not shown in 201251555) is formed to cover a portion of the surface of the first metal layer H4 and a portion of the second metal layer 124, and the first through hole T1 and the second through hole T2 are formed, wherein the pattern The material used for the mask layer is, for example, a photoresist that has been developed or a dry film. Next, electroplating is performed to form the first metal can 130 in the first through hole T1 while forming the second metal can 140 in the second through hole 2, and at the same time, the first metal layer exposed in the patterned mask layer A patterned metal layer is deposited on the surface of the 114 and second metal layer 124. Thereafter, the patterned mask layer is removed and then microetching is performed to remove the first metal layer 114 and the second metal layer 124 that were originally covered by the patterned mask layer. Thus, the first wiring layer 171 and the second wiring layer 172 are formed. Of course, before the micro-etching, the first metal can 130 may be filled with the filler 150, and the second metal can 140 may be filled with the filler 160. As such, the filler 150 can block the etching solution from penetrating into the interior of the first metal cylinder 130, and the filler 160 can block the etching solution from penetrating into the interior of the second metal cylinder 140, thereby protecting the first metal cylinder 130 and the second metal cylinder 140. Free from chemical damage such as etching chemicals. In addition to the semi-additive method, the method of forming these first wiring layers 171 and these second wiring layers 172 may also include subtractive. In detail, in the process of performing via plating of the first through hole T1 and the second through hole T2, the first metal can 130 and the second metal can 140 can be formed by electroless plating and electroplating, and at the same time A metal layer is deposited on the metal layer 114 and the second metal layer 124 to increase the thickness of both the first metal layer 114 and the second 14 201251555 metal layer 124. Thereafter, the thickened first metal layer ι4 and the second metal layer 124 are patterned by a lithography method and an etching method to form a first wiring layer l7i and a second wiring layer. 172. ~ ✓ The staff said that the moon's χ 力 力 力 力 力 力 力 力 力 力 力 力 力 力 力 力 力 力 力 力 力 力 力 力 力 力 力 力 力 力 力 力 力 力 力 力 力 力 力 力 力 力 力 力 力 力 力 力 力The steps of the above semi-additive method and subtraction method are explained. For those having ordinary knowledge, it is still easy to know how the first-line layer ΐ7ι and the second circuit layer 172 are via the semi-additive method according to the above content. Or formed by subtracting the law. Therefore, the above semi-additive method and the subtraction method are clear and fully disclosed in the field of financial knowledge, and can be implemented accordingly. Before the lithography, that is, before forming the first circuit layer Hi and the second circuit layer 172, the first metal can 13 is filled with the filler 15 〇, and the second gold Ml4G (four) full fill 160. In this way, the filler 15〇 can block the etching solution from penetrating into the interior of the first metal cylinder 130, and the filler 16〇 can block the penetration of the liquid into the interior of the second metal cylinder H0 to protect the first metal cylinder 13 (^ The second metal cylinder 14 is free from chemical damage such as etching chemicals. Referring to FIG. 1C, the first insulating layer 112 is formed between the first long layer 112 and the first layer 在 ^ 122. The layer (10), wherein the adhesive layer (10) contacts the filling pad, the filler 160, one of the first circuit layers 171 and one of the second circuit layers 172. The method of forming the bonding layer 18 can be to bond a piece of 15 201251555 cured film to the first layer. The bonding layer 180 may include a resin and a glass fiber. However, in addition to bonding the semi-cured film, the method of forming the adhesive layer 180 may be the first substrate 11 () Or a liquid glue or a fluid material is applied between the second substrate 12, which is, for example, a paste or a liquid resin material. Therefore, the present invention does not limit the adhesive layer 18, and only the semi-cured film can be used. To form. Please refer to 1C-1E, after filling the adhesive layer 180, the filler 150 and the filler 160 are drilled to remove the filler 150 and the filler 160' and the first metal can 13 is made into a first press fit. The barrel 132, and the first metal separation 140 becomes a second press-fit cylinder 142. The first press-fit cylinder 132 has a first press-fit hole H1, and the second press-fit cylinder 142 has a second press-fit hole H2. At this point, a circuit board for a backplane system has been manufactured, and both the first press-fit cylinder 132 and the second press-fit cylinder 142 can be inserted into the pins to make the pins and the first pressure The fitting 132 and the second press fitting cylinder 142 are tightly fitted. Specifically, the first press fitting hole H1 and the second press fitting hole H2 are formed by drilling the filler 150 and the filler 160 by the drills 11 and 12, respectively. Wherein the diameter R3 of the drill bit 11 is greater than the inner diameter R5 of the first metal cylinder 130, and the diameter R4 of the drill bit 12 is greater than the inner diameter R6 of the second metal cylinder 140, as shown in Fig. 1C and Fig. 1D. After drilling, the drill bits u, 12 will not only remove the filler 150 and the filler 160, but will also remove portions of the first metal cylinder 130 and portions. The inner surface of the second metal cylinder 140 serves as a partial metal cylinder wall thickness of 16 201251555, thereby forming a first press fitting cylinder 132 and a second press fitting cylinder 142. In other words, the first press fitting cylinder 132 is a removing filler 150. The portion of the first metal cylinder 130 that is contacted is formed, and the second press-fit cylinder 142 is formed by removing a portion of the second metal cylinder 140 that the filler 160 contacts, so that the aperture R7 of the first press-fit hole H1 is greater than The inner diameter R5 of the first metal cylinder 130 and the inner diameter R8 of the second press fitting hole H2 may be larger than the inner diameter R6 of the second metal cylinder 140. In addition, the difference between the aperture R7 and the inner diameter R5 (see Figure 1C) can be between 0.12 mm (mm) and 0.13 mm, while the aperture R8 and the inner diameter R6 (see Figure 1C) The gap between the two can range from 0.12 mm to 0.13 mm. Further, the drill bit 11 has a tapered head 11h, and the drill bit 12 has a tapered head 12h. During the drilling process, the tapered head 11h will first contact the filling 150, and the tapered head 12h will first contact the filling 160. Therefore, after the first press-fit hole H1 and the second press-fit hole H2 are formed, the first press-fit hole H1 and the second press-fit hole H2 have recessed bottoms B1 and B2, respectively. When both of the tapered heads 11h and 12h have a shape of a cone, both of the recessed bottom surfaces B1 and B2 may be substantially a curved-inward surface. 0 In the present embodiment, both the drill bits 11 and 12 The dimensions may be the same, for example the diameter R3 of the drill bit 11 may be the same as the diameter R4 of the drill bit 12. Therefore, the aperture R7 can be substantially equal to the aperture R8. However, in other embodiments, the sizes of the drill bits 11 and 12 may be different from each other, so the hole 17 201251555 may not be equal to the diameter R8. In addition, in this embodiment, the depth D1 of the first press-fit hole H1 may be greater than the depth D3 of the first through-hole T1, and the depth D2 of the second press-fit hole H2 may be greater than the depth D4 of the second through-hole T2, such as Figure 1E shows. In other words, the drill bit 11 shown in Fig. 1D can penetrate the first insulating layer 112, and the drill bit 12 can penetrate the second insulating layer 122. The circuit board 100 includes two first circuit layers 171, a first insulating layer 112 between the first circuit layers 171, at least one first press-fit tube 132 in the first insulating layer 112, and a second a circuit layer 172, a second insulating layer 122 between the second circuit layers 172, at least one second press-fit tube 142 in the second insulating layer 122, and a first insulating layer 112 and An adhesive layer 180 between the two insulating layers 122. The first press fitting cylinder 132 is connected between the first wiring layers 171 and has a first press fitting hole H1. The second press fitting cylinder 142 is connected between the second wiring layers 172 and has a second press fitting hole H2. The adhesive layer 180 contacts the first insulating layer 112, the second insulating layer 122, one of the first wiring layers 171, and one of the second wiring layers 172. 1E and 1F, wherein FIG. 1F is a top plan view of the first press fitting 132 of FIG. 1E. As seen from Fig. 1F, the axis R1 of the first press-fit hole H1 does not overlap with the axis P2 of the first press-fit cylinder 132. The same structure can also be applied to the second press fitting cylinder 142. In detail, the axis (not shown) of the second press-fit hole H2 and the axis (not shown) of the second press-fit cylinder 142 may not overlap. 18 201251555 The axis R1 of the first press-fit hole HI does not overlap with the axis P2 of the first press-fit cylinder 132, and the axis of the second press-fit hole H2 does not overlap with the axis of the second press-fit cylinder 142 The reason is that the drill bits 11, 12 are affected by machine errors during the drilling process, resulting in a slight offset of the shaft center. However, this offset does not affect the functions of both the first press-fit cylinder 132 and the second press-fit cylinder 142, and therefore does not affect the overall operation of the circuit board 100. Further, an offset reference line L1 passes through and is perpendicular to the axis R1 of the first press-fit hole H1 and the axis P2 of the first press-fit cylinder 132, and a diameter R9 and offset reference of the first press-fit cylinder 132 The straight line L1 is not vertical, wherein the thickness TH1 and TH2 of the first press-fit cylinder 132 in the extending direction of the diameter R9 are between 0 and the wall thickness W1 or W2 (see FIG. 1B), that is, the thickness TH1 and The difference between TH2 is between 0 and 90 microns. Further, the second press-fit cylinder 142 may have a difference as the aforementioned thicknesses TH1 and TH2, and the description thereof will not be repeated. 2 is a cross-sectional view of a circuit board manufactured in accordance with another embodiment of the present invention. Referring to FIG. 2, the circuit board 200 includes a first press-fit cylinder 232 and a second press-fit cylinder 242, wherein the first press-fit cylinder 232 has a first press-fit hole ΗΓ and a first finished hole F1, and the first finished product The hole F1 is in communication with the first press-fit hole , and is located between the first press-fit hole H1 ′ and the adhesive layer 180 . The second press-fit cylinder 242 is identical in construction to the first press-fit cylinder 232. Therefore, the second press-fit cylinder 242 also has a second press-fit hole H2' and a second finished hole F2, and the second finished hole F2 is The second press-fit hole H2' is in communication and is located between the second press-fit hole H2' and the adhesive layer 180. 19 201251555 The depth D1' of the first press-fit hole 也 may also be smaller than the depth D3 of the first through-hole T1, and the depth D2' of the second press-fit hole Η2 may also be greater than the depth D4 of the second through-hole Τ2, as shown in the figure 2 is shown. In other words, during the drilling process, the drill bit 11 (see FIG. 1D) does not have to penetrate the first insulating layer 112, and the drill bit 12 (see FIG. 1D) does not have to penetrate the second insulating layer 122. Therefore, a portion of the filler 150' remains in the first press-fit hole 1' and a portion of the filler 160 remains in the second press-fit hole 2'. Thus, the circuit board 200 can include a plurality of fillers 150, 160 that are located within the first finished aperture F1 and the second finished aperture F2, respectively. In addition, both the first press fitting cylinder 232 and the second press fitting cylinder 242 may have an axial center shifting structure as shown in Fig. 1F, and the description thereof will not be repeated here. It is worth mentioning that in other embodiments, the second substrate 12A may not have any second through holes ’2' so that the circuit boards 1〇〇, 2〇〇 may not have any second press-fit holes 2 and Η2'. In other words, in other embodiments, a press-fit cylinder (for example, the first press-fit cylinder 132 or the second press-fit cylinder 142) may be formed only on one of the substrates (for example, the first substrate 11 or the second substrate 120). ), while the other - block substrate does not make any press-fit cylinder at all. In summary, the present invention utilizes a filler (eg, filler 15〇 and filler (10)) filled in a metal cylinder (eg, first metal cylinder m and second gold cylinder (10)) to block (four) medicine" chemical infiltration. The person inside the metal cylinder' reduces the metal cylinder from chemical damage. Thus, the tightness between the pin and the press-fit cylinder can be maintained or improved to maintain or enhance the reliability of the backplane system. 201251555 Further, in an embodiment of the present invention, when the filler is a conductor, for example, the filler is formed of a conductive material such as a conductive polymer, residual filler adheres to the press-fit cylinder even after drilling. On the inner wall, the residual filler does not substantially cause a poor contact between the pin and the press-fit cylinder, so that the quality of the overall electrical connection between the pin and the press-fit cylinder is not affected. The embodiments are disclosed above, but are not intended to limit the invention, and those skilled in the art, without departing from the spirit and scope of the invention, BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1A to Fig. 1E are schematic cross-sectional views showing a method of manufacturing a circuit board according to an embodiment of the present invention. Fig. 1F is a top plan view of the first press fitting cylinder of Fig. 1E. Is a schematic cross-sectional view of a circuit board manufactured according to another embodiment of the present invention. [Main component symbol description] 11, 12 drill bit 11h, 12h tapered head 100, 200 circuit board 110 first substrate 112 first insulating layer 114 First metal layer 116, 126 internal circuit 21 201251555 120 second substrate 122 second insulating layer 124 second metal layer 130 first metal cylinder 140 second metal cylinder 132' 232 first press-fit cylinder 142, 242 second press-fit Cartridge 150' 160 filler 171 first circuit layer 172 second circuit layer 180 adhesive layer B1, B2 recessed bottom surface D1, Dr, D2, D2', D3, D4 depth FI first finished hole F2 second finished hole HI ' ΗΓ First press fitting hole H2, H2' Second press fitting hole LI Offset reference line R1 > P2 Shaft R7, R8 Aperture R3, R4, R9 Diameter R5, R6 Inner diameter T1 First consistent hole 22 201251555 Τ2 ΤΗ1 W1 , Second through hole ' TH2 thickness W2 wall thickness 23

Claims (1)

201251555 七、申請專利範圍·· 1. 一種電路板的製造方法,包括: 提供一第一基板,其中該第一基板包括一第一絕 緣層以及至少一位在該第一絕緣層内的第一貫孔; 形成二第一線路層,其中該第一絕緣層位在該些 第一線路層之間; 利用一通孔電鍵,在該第一貫孔内形成一第一金 屬筒,其連接在該些第一線路層之間; 在該第一金屬筒内填滿一填充物; 提供一第二基板,其中該第二基板包括一第二絕 緣層; 形成二第二線路層,其中該第二絕緣層位在該些 第二線路層之間; 在該第一絕緣層與該第二絕緣層之間形成一黏合 層,其中該黏合層接觸該填充物、該第一絕緣層、該 第二絕緣層、其中一第一線路層以及其中一第二線路 層;以及 在形成該黏合層之後,對該填充物進行鑽孔,以 移除該填充物,並使該第一金屬筒成為一第一壓配 筒,其中該第一壓配筒具有一第一壓配孔,而該第一 壓配孔的孔徑大於該第一金屬筒的内徑。 2. 如申請專利範圍第1項所述之電路板的製造方法,其 中該第二基板更包括至少一位在該第二絕緣層内的第 24 201251555 二貫孔,而該電路板的製造方法更包括: 利用該通孔電鍍,在該第二貫孔内形成一第二金 屬筒,其中該第二金屬筒連接在該些第.二線路層之間; 在該第二金屬筒内填滿另一填充物,其中該黏合 層更接觸該另一填充物;以及 在形成該黏合層之後,對該另一填充物進行鑽 孔,以移除該另一填充物,並使該第二金屬筒成為一 第二壓配筒,其中該第二壓配筒具有一第二壓配孔, 而該第二壓配孔的孔徑大於該第二金屬筒的内徑。 3. 如申請專利範圍第1或2項所述之電路板的製造方 法,其中填滿該填充物的方法包括: 填入一填充材料至該第一金屬筒内;以及 加熱該填充材料,以固化該填充材料。 4. 如申請專利範圍第1或2項所述之電路板的製造方 法,其中形成該黏合層的方法包括令一半固化膠片黏 合在該第一絕緣層與該第二絕緣層之間。 5. 如申請專利範圍第1項所述之電路板的製造方法,其 中在形成該些第一線路層與該些第二線路層之前,在 該第一金屬筒内填滿該填充物。 6. 如申請專利範圍第1項所述之電路板的製造方法,其 中該第一基板更包括二第一金屬層,而該第一絕緣層 配置在該些第一金屬層之間。 7. 如申請專利範圍第1項所述之電路板的製造方法,其 25 201251555 中該第一壓配孔的深度大於該第一貫孔的深度。 8. 如申請專利範圍第1項所述之電路板的製造方法,其 中該第一壓配孔的深度小於該第一貫孔的深度。 9. 如申請專利範圍第1項所述之電路板的製造方法,其 中該第一金屬筒的筒壁厚度介於60微米至90微米之 間。 10. 如申請專利範圍第1項所述之電路板的製造方法,其 中該第一基板更包括二第一金屬層,而該第一絕緣層 配置在該些第一金屬層之間,該第二基板更包括二第 二金屬層,而該第二絕緣層配置在該些第二金屬層之 間。 11. 如申請專利範圍第2項所述之電路板的製造方法,其 中該第二壓配孔的深度大於該第二貫孔的深度。 12. 如申請專利範圍第2項所述之電路板的製造方法,其 中該第二壓配孔的深度小於該第二貫孔的深度。 13. —種電路板,包括: 二第一線路層; 一第一絕緣層,位在該些第一線路層之間; 至少一第一壓配筒,位在該第一絕緣層内,並連 接在該些第一線路層之間,其中該第一壓配筒具有一 第一壓配孔,而該第一壓配孔的軸心與該第一壓配筒 的軸心不重疊; 二第二線路層; 26 201251555 一第二絕緣層,位在該些第二線路層之間;以及 一黏合層,形成在該第一絕緣層與該第二絕緣層 之間,其中該黏合層接觸該第一絕緣層、該第二絕緣 層、其中一第一線路層以及其中一第二線路層。 14. 如申請專利範圍第13項所述之電路板,更包括至少一 第二壓配筒,該第二壓配筒位在該第二絕緣層内,並 連接在該些第二線路層之間,該第二壓配筒具有一第 二壓配孔,而該第二壓配孔的軸心與該第二壓配筒的 轴心不重疊。 15. 如申請專利範圍第13項所述之電路板,其中一偏移參 考直線穿過並垂直於該第一壓配孔的軸心與該第一壓 配筒的軸心,而該第一壓配筒的一直徑與該偏移參考 直線不垂直,該第一壓配筒在該直徑的延伸方向上的 厚度差距介於0至90微米之間。 16. 如申請專利範圍第13項所述之電路板,其中該第一壓 配筒更具有一第一成品孔,該第一成品孔與該第一壓 配孔連通,並位在該第一壓配孔與該黏合層之間,其 中該第一壓配孔的軸心與該第一成品孔的軸心不重 疊,而該電路板更包括至少一位在該第一成品孔内的 填充物。 27201251555 VII. Patent Application Range 1. A method for manufacturing a circuit board, comprising: providing a first substrate, wherein the first substrate comprises a first insulating layer and at least one first in the first insulating layer Forming two first circuit layers, wherein the first insulating layer is located between the first circuit layers; forming a first metal can in the first through hole by using a through hole key Between the first circuit layers; filling a filler in the first metal can; providing a second substrate, wherein the second substrate comprises a second insulating layer; forming two second circuit layers, wherein the second An insulating layer is disposed between the second circuit layers; an adhesive layer is formed between the first insulating layer and the second insulating layer, wherein the adhesive layer contacts the filler, the first insulating layer, and the second An insulating layer, one of the first circuit layers and one of the second circuit layers; and after forming the adhesive layer, drilling the filler to remove the filler and making the first metal cylinder a first a press fitting, wherein The first press-fit cylinder has a first press-fit hole, and the first press-fit hole has a larger diameter than the inner diameter of the first metal barrel. 2. The method of manufacturing a circuit board according to claim 1, wherein the second substrate further comprises at least one of the 24 201251555 two-holes in the second insulating layer, and the circuit board manufacturing method The method further includes: forming, by the through-hole plating, a second metal cylinder in the second through hole, wherein the second metal cylinder is connected between the second circuit layers; filling the second metal cylinder Another filler, wherein the adhesive layer is in contact with the other filler; and after forming the adhesive layer, the other filler is drilled to remove the other filler and the second metal is The cylinder becomes a second press fitting cylinder, wherein the second press fitting cylinder has a second press fitting hole, and the second press fitting hole has a larger diameter than the inner diameter of the second metal cylinder. 3. The method of manufacturing a circuit board according to claim 1 or 2, wherein the filling the filling method comprises: filling a filling material into the first metal cylinder; and heating the filling material to The filler material is cured. 4. The method of manufacturing a circuit board according to claim 1 or 2, wherein the method of forming the adhesive layer comprises bonding a half of the cured film between the first insulating layer and the second insulating layer. 5. The method of manufacturing a circuit board according to claim 1, wherein the first metal can is filled with the filler before the first circuit layer and the second circuit layers are formed. 6. The method of manufacturing a circuit board according to claim 1, wherein the first substrate further comprises two first metal layers, and the first insulating layer is disposed between the first metal layers. 7. The method of manufacturing a circuit board according to claim 1, wherein the depth of the first press-fit hole is greater than the depth of the first through hole in 25 201251555. 8. The method of manufacturing a circuit board according to claim 1, wherein the depth of the first press-fit hole is smaller than the depth of the first through hole. 9. The method of manufacturing a circuit board according to claim 1, wherein the first metal cylinder has a wall thickness of between 60 micrometers and 90 micrometers. 10. The method of manufacturing the circuit board of claim 1, wherein the first substrate further comprises two first metal layers, and the first insulating layer is disposed between the first metal layers, the first The second substrate further includes two second metal layers, and the second insulating layer is disposed between the second metal layers. 11. The method of manufacturing a circuit board according to claim 2, wherein the second press-fit hole has a depth greater than a depth of the second through hole. 12. The method of manufacturing a circuit board according to claim 2, wherein the second press-fit hole has a depth smaller than a depth of the second through hole. 13. A circuit board comprising: two first circuit layers; a first insulating layer positioned between the first circuit layers; at least one first press-fit cylinder positioned within the first insulating layer, and Connected between the first circuit layers, wherein the first press-fit cylinder has a first press-fit hole, and the axis of the first press-fit hole does not overlap with the axis of the first press-fit cylinder; a second circuit layer; 26 201251555 a second insulating layer between the second circuit layers; and an adhesive layer formed between the first insulating layer and the second insulating layer, wherein the bonding layer contacts The first insulating layer, the second insulating layer, one of the first circuit layers, and one of the second circuit layers. 14. The circuit board of claim 13, further comprising at least one second press-fit cylinder disposed in the second insulation layer and connected to the second circuit layers The second press-fit cylinder has a second press-fit hole, and the axis of the second press-fit hole does not overlap with the axis of the second press-fit cylinder. 15. The circuit board of claim 13, wherein an offset reference line passes through and is perpendicular to an axis of the first press-fit hole and an axis of the first press-fit cylinder, and the first A diameter of the press-fit cylinder is not perpendicular to the offset reference line, and the thickness of the first press-fit cylinder in the direction in which the diameter extends is between 0 and 90 microns. 16. The circuit board of claim 13, wherein the first press-fit cylinder further has a first finished hole, the first finished hole is in communication with the first press-fit hole, and is located at the first Between the press-fit hole and the adhesive layer, wherein the axis of the first press-fit hole does not overlap with the axis of the first finished hole, and the circuit board further includes at least one filling in the first finished hole Things. 27
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