JP2002185144A - Multilayer printed wiring board and its manufacturing method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a multilayer printed wiring board which can be manufactured through a smaller number of production processes and where vias can be easily formed, and to provide its manufacturing method. SOLUTION: This multilayer printed wiring board comprises a first process of forming the buried vias 51 and 52 by burying the punched conductive materials 5 in core insulating materials 8 and 81, a second process of forming core conductor layers 11 and 12 on the core insulating materials, a third process of forming an interlayer insulating layer 82 on the surfaces of the core insulating materials, and fourth process of boring a viahole 6 in the interlayer insulating layer for positioning its bottom at the end of the buried via.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a multilayer printed wiring board and a method for manufacturing the same, and particularly to a via structure.

[0002]

2. Description of the Related Art Conventionally, as shown in FIG. 5, there is a multilayer printed wiring board 9 in which a core conductor layer 911 and surface conductor layers 912 and 914 are respectively laminated on upper and lower surfaces of a core insulating material 98. Core conductor layer 911 and surface conductor layer 91
2, interlayer insulating layers 99 and 910 are interposed between the surface conductor layers 912 and 914. The core insulating material 98 is provided with a through hole 95 having conductivity. Via holes 916 and 917 are provided in the interlayer insulating layers 99 and 910. The through-holes 95 and the via holes 916 and 917 are formed coaxially to form a connecting via 90 penetrating a plurality of layers.

The multilayer printed wiring board 9 has been conventionally manufactured by using, for example, a build-up method shown in FIG. Specifically, first, in S901, a copper foil is attached to the core insulating material 98. Next, in S902,
A through hole 95 is formed by a drill. Then, S
At 903, a thin film copper panel plating is performed to form a plating film 94 on the inner wall of the through hole 95. Then, S
In 904, the inside of the through hole 95 is filled with a copper paste 971 and dried, and then the surface is polished by buffing.

Next, in S905, the core insulating material 9
8, plating films 97 are formed on both surfaces. Thus, the upper and lower end surfaces of the through hole 95 are covered with the plating film 97. Next, in S906, after an etching resist is formed on the surface of the plating film 97, pattern etching is performed. Thereby, the core conductor layer 911 has a desired pattern shape. Thus, a core layer 92 is obtained.

[0005] Next, in S907, a photosensitive epoxy-based additive for an additive in which a resin filler relatively soluble in the oxidizing agent is dispersed in a resin matrix relatively insoluble in the oxidizing agent. Prepare This adhesive,
Coating on the surface of the inner surface conductor layer 912 to form an interlayer insulating layer 9
9 is formed. Next, in S908, exposure and development are performed to form a via hole 91 in the interlayer insulating layer 931.
6 is drilled. The via hole 916 is provided corresponding to the end face of the internal through hole 95.

Next, in step S909, the interlayer insulating layer 99 is chemically roughened using chromic acid as a roughening agent (oxidizing agent). Next, after a catalyst nucleus is applied to the surface, a permanent resist 913 is applied to a portion where the surface conductor layer is not formed.
To form Next, in S910, plating pretreatment and electroless copper pattern plating are performed, and a permanent resist 913 is formed.
The surface conductor layer 912 is formed in the portion where no is formed, and the plating film 94 is formed on the inner wall and the bottom of the via hole 916.

Next, in S911, the interlayer insulating layer 99
A metal mask having holes at positions corresponding to the formation positions of the via holes 916 is arranged on the surface of the substrate. Then, by moving the squeegee, the inside of the via hole 916 is filled with the copper paste 972 and the exposed surface height of the via hole 916 is flattened, and then the copper paste 972 is dried. Next, in S912, the plating film 9 is formed on the copper paste 972 by the thin panel plating described above.
7 is formed, and the opening end of the via hole 916 is covered. Thus, an intermediate layer 931 is obtained.

Next, similarly to the above-described steps S907 to S910 for forming the interlayer insulating layer 99, the outer interlayer insulating layer 910 is formed.
Formation (S913), via hole formation (S914), permanent resist (S915), and pattern plating (S91)
Perform 6). At this time, by exposing and developing the interlayer insulating layer 910, a via hole 917 is provided in a portion corresponding to the end surface of the via hole 916. Next, S917
After performing chemical roughening treatment and providing catalyst nuclei on the outer interlayer insulating layer 910, a portion excluding the via holes 917 and the like is covered with a surface permanent resist 915.
Thereby, the surface layer 932 is obtained. Thus, a multilayer printed wiring board 9 is obtained.

[0009]

However, in the above-mentioned conventional method for manufacturing a multilayer printed wiring board, the core insulating material 9 is used.
In forming the through hole 95 in the through hole 8, a through hole is drilled (S 902) and panel plating (S 902) is performed.
903), through-hole filling (S904), and lid plating (S905).

[0010] Also, when the intermediate layer 931 is formed between the core layer 98 and the surface layer 932 and a conductive via hole is formed in the intermediate layer 931 as in the above-mentioned conventional case, it is necessary to similarly perform many steps. is there. That is, after a via hole is formed by exposure and development (S908), the via hole is filled (S908).
911) and lid plating (S912).

SUMMARY OF THE INVENTION The present invention has been made in view of the above-mentioned problems, and an object of the present invention is to provide a multilayer printed wiring board and a method for manufacturing the same, which can easily form a via with a small number of manufacturing steps.

[0012]

According to a first aspect of the present invention, there is provided a via step of forming a buried via by embedding a punched piece of a conductive material in a core insulating material, and a core step of forming a core conductor layer in the core insulating material. Forming an interlayer insulating layer on the surface of the core insulating material, forming a via hole in the interlayer insulating layer, positioning at least one bottom of the via hole at an end of the buried via, and forming a surface conductor layer. And a surface layer step of forming a multi-layer printed wiring board.

The most remarkable point in the present invention is that a buried via is formed by punching a conductive material and embedding the punched piece in a core insulating material. A conductive material is laminated on the core insulating material, and a via-formed portion is punched to form a punched hole, and a punched piece of the conductive material punched by the punch is embedded in the hole. This gives
An embedded via in which a punched piece of conductive material is embedded can be formed in the core insulating material. According to this method, a via can be easily formed.

Therefore, the number of steps can be reduced as compared with the conventional case, and the manufacturing cost can be reduced.
Further, since the bottom of the via hole in the surface layer is disposed at the end of the buried via inside, these are electrically connected to each other. For this reason, a connection via penetrating a plurality of layers can be formed, and electricity can be freely led in and out between the layers. In this way, by connecting a buried via to the inside while opening a via hole on the substrate surface as in the conventional case, a connected via having almost the same function as the conventional one can be formed very easily.

In the above via step, when embedding the conductive material in the core insulating material, the conductive material is laminated on the core insulating material, and a predetermined portion of the conductive material and the core insulating material are punched by a punch. The punched piece is embedded in the punched hole of the core insulating material.

As the conductive material, a copper foil, a solder foil, a conductive film in which a metal powder is dispersed in a resin, an anisotropic conductive film exhibiting conductivity by applying pressure, and the like can be used. Preferably, the conductive material is made of solder. This is because the solder melts at a relatively low temperature, so that the conductive material is easily bonded to a conductor (for example, a plating film in a via hole) located at the end of the embedded via.

At least the upper and lower ends of the conductive material are
It is preferable to be made of a low melting point conductive material. This gives
The conductive material can adhere strongly to the conductor located at the end. The low-melting-point conductive material is a conductive material having a melting point lower than the temperature at which the interlayer insulating layer is heated and pressed, and includes, for example, solder and a conductive adhesive. The conductive adhesive is obtained by adding metal particles to a resin.

A low melting point conductive material may be provided only on the upper and lower ends of the conductive material, and a high melting point conductive material having a higher melting point than the low melting point conductive material may be provided on other portions (for example, the central portion). Examples of the high melting point conductive material include copper, aluminum, and nickel. Further, all of the conductive material may be the low melting point conductive material.

As the core insulating material, for example, a prepreg obtained by impregnating glass cloth with an insulating resin can be used. Examples of the insulating resin include an epoxy resin, a phenol resin, a bismaleimidotreazine resin,
Thermosetting resins such as polyphenylene resin, polyphenylene ether resin, and polyimide resin, or a mixture thereof can be used. The bonding substrate may include a reinforcing material such as a glass cloth or an inorganic filler.

The glass cloth is formed by weaving fiber bundles of glass fibers in two directions, an X direction and a Y direction orthogonal to the X direction. The core insulating material may have a property of contracting upon curing depending on the type of resin.
In this case, it is preferable to control the dimension of the core insulating material in order to prevent the embedded via from being displaced.

Specifically, the difference between the volume of the fibers arranged in the X direction and the volume of the fibers arranged in the Y direction is preferably 5% by volume or less. If it exceeds 5% by volume,
This is because the shrinkage rate of the core insulating material differs between the X direction and the Y direction, and the embedded via may be displaced.
Further, it is preferable to use the same fiber diameter in the X direction and the Y direction. Further, it is preferable that the fiber diameter is small. Thereby, the bonding area with the insulating resin can be made the same, and the bonding area can be increased.

Further, as another method of controlling the dimensions, there is a method of adding 30 to 80% by weight of an inorganic filler to the core insulating material. When the content is less than 30% by weight, the XY of the core insulating material is used.
There is a possibility that the shrinkage in the directions may be significantly different. 80% by weight
If the value exceeds, the adhesive strength of the core insulating material may be reduced.

Next, in an inner layer step, a core conductor layer is formed on the surface and / or inside of the core insulating material.
The core conductor layer may cover the opening end of the buried via provided in the core insulating material. In this case, the bonding strength between the conductive material in the embedded via and the via hole plating on the surface is improved.

Next, the interlayer insulating layer formed in the above-mentioned interlayer step is an insulating base material interposed between the core conductive layer and the surface conductive layer. As the interlayer insulating layer, the same as the above-mentioned core insulating material can be used.

Next, in the above surface layer process, via holes can be formed by, for example, an exposure / development method, a laser method, or the like. The via hole is coated with a plating film or filled with a conductor.

As in the second aspect of the present invention, it is preferable that the above-mentioned via forming step is performed on a plurality of core insulating materials, and after these are laminated and pressed, the above-mentioned interlayer step and the above-mentioned surface layer step are performed. Thereby, a plurality of layers of the core insulating material can be heated and pressed together at a time, and multilayering can be easily achieved.

According to a third aspect of the present invention, there is provided a multilayer printed circuit comprising a core insulating material having a core conductive layer, a surface conductive layer, and an interlayer insulating layer interposed between the core insulating material and the surface conductive layer. In the wiring board, a buried via in which a conductive material is buried is formed in the core insulating material, a via hole is formed in the interlayer insulating layer, and a bottom of at least one of the via holes is a buried via. Is a multilayer printed wiring board characterized by being disposed at an end of the multilayer printed wiring board.

Since the buried via is formed by embedding a conductive material in a core insulating material, the buried via can be easily manufactured with a smaller number of steps as compared with the related art. Therefore, manufacturing costs can be reduced. The bottom of the via hole is located at the end of the buried via. Therefore, they can be electrically connected to each other to form a connection via penetrating a plurality of layers.

It is preferable that the core insulating material is composed of a plurality of layers, and the buried via is formed for each layer. This makes it possible to realize a multilayer printed wiring board.

[0030]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiment 1 A multilayer printed wiring board and a method of manufacturing the same according to an embodiment of the present invention will be described with reference to FIGS. The multilayer printed wiring board of the present embodiment includes core layers 2 and 21 and a surface layer 3 provided on the surface thereof. Of the above core layers, core layer 2
Are arranged inside, and the core layer 21 is arranged outside.

The inner core layer 2 comprises a core insulating material 8 and core conductor layers 11 provided on both upper and lower surfaces thereof. The outer core layer 21 includes the core insulating material 81 and the core conductor layer 12 provided on the surface thereof. Embedded vias 51 and 52 each having the conductive material 5 embedded therein are formed in the core insulating materials 8 and 81, respectively. The surface layer 3 includes an interlayer insulating layer 82 and a surface conductor layer 14. The via hole 6 is provided in the interlayer insulating layer 82, and the wall surface thereof is covered with the plating film 61.

At the bottom of the via hole 6, the end of the buried via 52 is arranged. Some of the buried vias 51 and 52 are arranged at the same position. The via hole 6 and the buried via 52 or the via hole 6 and the buried vias 51 and 52 are connected to each other to form a connection via 50.

A permanent resist 15 is provided between the surface conductor layers 14.
Is provided. The surface of the surface layer 3 is covered with a surface layer permanent resist 16 except for the via holes 6 and the like. Although not shown, the multilayer printed wiring board 1 is provided with a mounting portion for mounting electronic components.

Next, a method of manufacturing a multilayer printed wiring board will be described with reference to FIG. First, in S1, a glass epoxy substrate as a core insulating material is prepared. Also, a solder foil having substantially the same thickness as the core insulating material is prepared as a conductive material for embedding.

Next, in S2, as shown in FIG. 3A, the conductive material 5 is embedded in the core insulating material 8. In particular,
An upper punch 71, a lower punch 72, and a die 73 are prepared. The die 73 has a guide hole 74 through which the upper punch 71 and the lower punch 72 are inserted. Next, the conductive material 5 is laminated on the core insulating material 8, and these are placed on the die 73. Next, as shown in FIG. 3B, the conductive material 5 and the core insulating material 8 are punched by the upper punch 71, and the punched holes 5 are formed.
In addition to forming 0,80, punched pieces 57,87 are obtained. Next, as shown in FIG. 3C, the punched piece 57 of the conductive material 5 is
Push back to 0. As a result, the punched piece 57 of the conductive material 5 is embedded in the core insulating material 8, and the embedded via 51 is formed. Next, in S3, as shown in FIG. 4, a core conductor layer 11 having a desired pattern shape is formed on both upper and lower surfaces of the core insulating material 8 by an additive method or a subtractive method.
To form Thereby, the inner layer 2 is obtained.

The above steps S1 to S3 are repeated to form the buried via 52 and the core conductor layer 12 in the other core insulating material 81. Some of the embedded vias 52 of the outer core layer 21 are formed at the same positions as the embedded vias 51 of the inner layer. Thus, the outer core layer 21 is obtained.

Next, in S4, outer core layers 21 are laminated on the upper and lower sides of the inner core layer 2, and these are heat-pressed and integrated. At this time, since the conductive material 5 is made of a solder foil made of a low melting point material, the end of the conductive material 5 is
The second pad portions 110 and 120 are fused.

Next, in step S5, a photosensitive epoxy-based additive adhesive in which a resin filler relatively easily soluble in the oxidizing agent is dispersed in a resin matrix relatively insoluble in the oxidizing agent. Prepare This adhesive is applied to the surface of the outer core layer 21 to form the interlayer insulating layer 82. Next, in S6, a via hole 6 is formed in the interlayer insulating layer 82 by performing exposure and development. This via hole 6 is provided corresponding to the end face of the embedded via 52 inside.

Next, in step S7, a chemical roughening treatment is performed on the interlayer insulating layer 82 using chromic acid as a roughening agent (oxidizing agent). Next, after a catalyst nucleus is applied to the surface, a permanent resist 15 is formed in a portion where the surface conductor layer is not formed. Next, in S8, pre-plating treatment and electroless copper pattern plating are performed to form the surface conductor layer 14 in a portion where the permanent resist 15 is not formed.
A plating film 61 is formed on the inner wall and the bottom of the via hole 6. Thereby, the surface layer 3 is obtained. Next, in S9,
A surface layer permanent resist 16 is formed on the surface of the surface layer 3 except for via holes 6 and external terminals. Thus, the multilayer printed wiring board 1 of the present example is obtained.

In this embodiment, the buried vias 51 and 52 are formed by embedding the conductive material 5 in the core insulating materials 8 and 81 by the punch method shown in FIG. According to this method, vias can be easily formed. Therefore, the number of processes can be reduced as compared with the related art, and the manufacturing cost can be reduced. In addition, since a plurality of core layers 2 and 21 are separately manufactured, and these are collectively laminated and pressure-bonded, it can be manufactured in a shorter time than the build-up method in which each layer is formed. it can.

Since the bottom of the via hole 6 in the surface layer 3 is located at the end of the buried via 52 inside,
These are electrically connected to each other. For this reason, the connection via 50 penetrating a plurality of layers can be formed, and electricity can be freely led in and out between the layers. In this example, the steps S1 to S3 are repeated twice, but may be repeated only once or three or more times.

[0042]

According to the present invention, it is possible to provide a multilayer printed wiring board in which the number of manufacturing steps is small and vias can be easily formed, and a method of manufacturing the same.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view of a multilayer printed wiring board according to a first embodiment.

FIG. 2 is an explanatory view showing a manufacturing process of the multilayer printed wiring board according to the first embodiment.

3A to 3C are diagrams illustrating a method of forming a buried via in the first embodiment.

FIG. 4 is a cross-sectional view of each core layer in the first embodiment.

FIG. 5 is a cross-sectional view of a multilayer printed wiring board in a conventional example.

FIG. 6 is an explanatory view showing a manufacturing process of a conventional multilayer printed wiring board.

[Explanation of symbols]

 1. . . Multilayer printed wiring board, 11,12. . . 13. core conductor layer; . . 14. Surface conductor layer, . . Permanent resist, 16. . . Surface layer permanent resist, 2,21. . . 2. core layer; . . Surface layer, 5. . . Conductive material, 50, 80. . . Punched holes, 51, 52. . . Embedded via, 57, 87. . . Punched pieces, 6. . . Via hole, 61. . . Plating film, 71. . . Upper punch, 72. . . Lower punch, 73. . . Die, 8, 81. . . Core insulating material, 82. . . Interlayer insulation layer,

Claims (4)

[Claims] 1. A via step of forming a buried via by embedding a punched piece of a conductive material into a core insulating material, a core step of forming a core conductor layer in the core insulating material, and a step of forming a buried via on the surface of the core insulating material. An interlayer step of forming an interlayer insulating layer; and a surface layer step of forming a via hole in the interlayer insulating layer, positioning a bottom of at least one of the via holes at an end of the buried via, and forming a surface conductor layer. A method for manufacturing a multilayer printed wiring board, comprising: 2. The multi-layer printing method according to claim 1, wherein the via forming step is performed on a plurality of core insulating materials, and after laminating and pressing the plurality of core insulating materials, the interlayer step and the surface layer step are performed. Manufacturing method of wiring board. 3. A multilayer printed wiring board comprising: a core insulating material having a core conductive layer; a surface conductive layer; and an interlayer insulating layer interposed between the core insulating material and the surface conductive layer. A buried via in which a conductive material is buried is formed in the core insulating material, a via hole is formed in the interlayer insulating layer, and a bottom of at least one of the via holes is disposed at an end of the buried via. A multilayer printed wiring board characterized by being made. 4. The core insulating material according to claim 3,
A multilayer printed wiring board comprising a plurality of layers, wherein the buried via is formed for each layer.