TW201218469A - Semiconductor chip assembly with bump/base heat spreader and inverted cavity in bump - Google Patents

Abstract

A semiconductor chip assembly includes a semiconductor device, a heat spreader, a conductive trace and an adhesive. The heat spreader includes a bump and a base. The conductive trace includes a pad and a terminal. The semiconductor device is mounted on the bump opposite a cavity in the bump, is electrically connected to the conductive trace and is thermally connected to the bump. The bump extends from the base into an opening in the adhesive and the base extends laterally from the bump. The conductive trace is located outside the cavity and provides signal routing between the pad and the terminal.

Description

201218469 VI. INSTRUCTIONS: Cross-references to relevant applications: This application is part of the continuation of US Patent Application No. 12/91, No. 729, filed on the 26th of the next month. The contents of this document are hereby incorporated by reference. The present application also claims priority to the filing of the U.S. Provisional Patent No. 61/429,455, filed on Jan. 4, 2011, which is incorporated herein by reference. The 12th of the US Patent Application No. 1,729, filed on October 26, 2010, is filed in November 2009, and the US Patent Application No. 2/6丨6,773 Part of the continuation case is also a continuation of the application of U.S. Patent Application Serial No. 12/616,775, filed on Jan. It was opened on the 12th and 91st of the application in the first month of 2010, and the US patent application of the ^ is also claimed in June 2012. U.S. Provisional Patent Application No. <RTI ID=0.0>> 1) The priority of the application of the first application of the application of the 61/350,036 May 1st, the content of the latter two cases is also

1 1曰 Application No. 12/557, 540, US 4 201218469 Patent Application, and US Patent No. 12/557,541, filed on September 11, 2009, filed in the US Patent Application No. 2/3 March Part of the continuation of U.S. Patent Application Serial No. 12/406,510. The US Patent No. 12/406, 51G claims the claim of the US Provisional Patent No. 61/071,589 filed on the 7th, 7th, 7th, and the 61st of the application on May 7, 2, 10, 8 U.S. Provisional Patent Application No. 71,588, No. 61/07W72, U.S. Provisional Patent, filed on April 11, 2008, and No. 61 of March 2 The priority of U.S. Provisional Patent Application Serial No. 648, the entire disclosure of which is incorporated herein by reference. The United States Patent Application No. 12/557, 54(), which was filed on September 11th, and the US Patent Application No. 12/557,541, which was filed on September 11 of the Year of the Year, also claims 2GG9. On February 9th, the priority of the US Patent No. 61/15G98 nickname No. 61/15G98 was filed, and the content is also quoted. BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor wafer package, and more particularly to a semiconductor device comprising a semiconductor device, a wire, an adhesive layer, and a heat sink, and a method of manufacturing the same. Ming [Prior Art] Old semiconductor components such as packaged and unpackaged semiconductor chips are used for South voltage, high-yield and high-efficiency applications; these applications are expected to perform certain functions. The higher the power, the more heat is generated by the semiconductor components. In addition, as the package density is increased and the size is reduced, the surface area available for heat dissipation is reduced, resulting in increased heat generation. Semiconductor components are prone to performance degradation and shortened service life under high temperature operation, and may even malfunction immediately. High heat not only affects wafer performance, but also thermally stresses the wafer and its surrounding components due to thermal expansion mismatch. Therefore, the wafer must be quickly and efficiently dissipated to ensure the efficiency and reliability of its operation. - The high thermal conductivity path is usually reduced and diverged to a region where the surface area is larger than the die pad where the wafer or wafer is located. C Light-emitting diodes (LEDs) have recently become popular as white-light sources, camping light sources and teeth. An alternative source of light source. Coffee can provide long-term lighting with high energy efficiency and low cost for medical, military, signage, signal, aviation: marine, vehicle, portable equipment, commercial and residential lighting applications. For example, led can be used for lamps, flashlights, headlights, searchlights, traffic lights, and displays: to provide a light source. The high power chips in the LEDs also provide a large amount of thermal energy while providing high brightness output. However, under high temperature operation, LEDs may suffer from color shift, brightness reduction, shortened service life, and immediate failure. In addition, the LED limits 'and thus its light output and reliability. Therefore, = ^ is required for high power chips with good heat dissipation. The led package typically includes an LED chip, a pedestal, electrical contacts, and a thermal contact. The pedestal is thermally bonded to the LED wafer and used to dent the LED wafer. The electrical connection is electrically connected to the anode and cathode of the LED chip. The 孰 contact is thermally bonded to the LED chip by the pedestal, and the τ side carrier is sufficiently cooled to prevent the 6 201218469 LED chip from being over-tracked. The industry is actively investing in the development of high-power chip packages and thermal boards with various design and manufacturing technologies. In order to meet the needs of this extremely cost-competitive environment, the plastic ball grid array (PBGA) package will be a wafer and a laminate substrate. Wrapped in a plastic outline, and then adhered to a printed circuit board (pCB) with solder balls. The laminate substrate comprises a dielectric layer typically composed of glass fibers. The thermal energy generated by the wafer can be transferred to the solder ball via the plastic and dielectric layers and then to the printed circuit board. However, due to the low thermal conductivity of the plastic and dielectric layers, the pBGA2 has poor heat dissipation. A quad flat no-lead (QFN) package places the wafer on a copper die pad that is soldered to a printed circuit board. The thermal energy generated by the wafer can be transferred to the brush circuit board via the die pad. However, due to the limited routing capability of the leadframe interposer, the QFN package cannot be applied to high input/output (ι/(7) chips or passive components. The thermal pad provides electrical routing, thermal management and mechanical support for semiconductor components. Function: The heat conducting board usually comprises a substrate for signal routing, a heat sink or heat sink for providing heat removal function, a solder joint for power supply connection to the semiconductor component, and - power supply connection to the lower layer group The substrate may be a dust layer structure having a single layer or a plurality of routing circuit systems and/or a plurality of dielectric layers. The heat sink may be a metal base, a metal block or a buried metal layer. For example, the next layer can be a lamp holder with a printed circuit board and a heat sink. In this example, a coffee package system is mounted on a heat conducting plate, and the heat conducting plate is mounted on the heat sink. The heat transfer plate/scatter 201218469 thermal device sub-assembly and the printed circuit board are further installed in the lamp holder. In addition, the heat conduction plate is electrically connected to the printed circuit board via a wire. The substrate will be a signal signal. The printed circuit board is directed to the LED package, and the heat sink diverges and transfers the thermal energy of the LED package to the Xuanzheng thermal device. Therefore, the heat conducting plate provides an important thermal path for the wafer. Granted to Juskey et al. U.S. Patent No. 6,5,7,1,2, the disclosure of which is incorporated herein incorporated by incorporated herein by incorporated by incorporated by incorporated by incorporated by incorporated The block is adhered to the central opening sidewall and is coupled to the substrate. The upper and lower conductive layers are respectively adhered to the top and bottom of the substrate, and are electrically connected to each other through the electric ore guiding holes penetrating the substrate. The heat dissipating block is wire bonded to the upper conductive layer '- the encapsulating material is formed on the wafer, and the lower conductive layer is provided with a solder ball. When the device is manufactured, the substrate is originally a B-stage placed on the lower conductive layer ( B_stage) The tree block is placed in the central opening and is located on the lower conductive layer and separated from the substrate by a gap. The upper conductive layer is disposed on the substrate. After the layers are heated and pressed together, the resin is melted and flows into the gap to be solidified. The upper and lower conductive layers form a pattern, thereby forming a circuit wiring on the substrate, and causing the resin flash to be exposed on the heat sink block. The pigment exposes the heat sink. Finally, the wafer is placed on the heat sink and bonded and packaged. Therefore, the heat generated by the wafer can be transferred to the printed circuit board via the heat sink. However, when it is produced, it is manually cooled. The operation of placing the block in the central opening is extremely labor-intensive and costly. Moreover, due to the small installation tolerance of the lateral direction, the heat-dissipating block is easy to be accurately placed in the ten-thick opening, resulting in an easy occurrence between the substrate and the heat-dissipating block. 8 201218469 Gap and uneven wiring. As a result, the substrate only partially adheres to the heat sink block 'cannot obtain sufficient support force from the heat sink block and is easy to delaminate. In addition, it is used to remove part of the conductive layer to reveal resin flash The chemical etching solution will also remove some of the heat-dissipating blocks that are not covered by the resin flash, so that the heat-dissipating block is not flat and difficult to combine, and finally the yield of the group is lowered. The reliability is insufficient and the cost is too high. U.S. Patent No. 6,528,882 to Ding et al. discloses a high heat-dissipating ball grid array package having a substrate comprising a metal core layer and a wafer disposed in a die pad region on the top surface of the metal core layer. An insulating layer is formed on the bottom surface of the metal core layer. The blind hole penetrates the insulating layer through the metal core layer, and the hole is filled with the heat-dissipating solder ball, and the solder ball corresponding to the heat-dissipating solder ball is disposed on the substrate. The thermal energy generated by the wafer can flow through the metal core to the heat sink balls and then to the printed circuit board. However, the insulating layer sandwiched between the metal core layer and the printed circuit board places a limit on the heat flow to the printed circuit board. U.S. Patent No. 6,67, 219 to Lee et al., which is incorporated herein by reference in its entirety in its entire entire entire entire entire entire entire entire----- a heat dissipating substrate, a substrate having a central opening is disposed on the grounding plate through an adhesive layer having a central opening, and a chip is mounted on the heat dissipating block, and is formed by a central opening of the grounding plate, and the substrate is provided with (4) m Since the solder ball is located on the substrate, the θ seat is fixed and the circuit board is printed, so that the heat dissipation effect of the heat sink is limited to heat convection instead of heat conduction, thereby greatly reducing the heat dissipation effect. U.S. Patent No. 1 provides a high T-shape and includes a pillar portion and a wider substrate. The adhesive layer is awarded to Woodall et al., a seventh, 38, 31 heat-dissipating BGA package having a heat sink that is an inverted substrate. A substrate system having a window opening is attached 201218469 The column portion and the wide substrate are adhered to the substrate. A wafer system is disposed on the pillar portion and wire bonded to the S-shaped substrate. A packaging material is molded on the wafer, and the substrate is provided with a solder ball. The pillar extends through the window opening and is formed by a wide substrate. The substrate is supported as the solder ball is located between the wide substrate and the periphery of the substrate. The thermal energy generated by the wafer can be transferred to the wide substrate via the post and then to the printed circuit board. However, since a space for accommodating the solder balls must be left on the wide base, the wide base protrudes below the substrate only at a position corresponding to the central window and the innermost tin ball. As a result, the substrate is unbalanced during the manufacturing process and is easily shaken and bent, which in turn leads to difficulty in mounting the wafer, bonding the wire, and molding the packaging material. In addition, the wide substrate may be bent due to the molding of the encapsulating material, and once the solder ball collapses, the package may not be soldered to the next layer. Therefore, the yield of this package is low, the reliability is insufficient, and the cost is too high.

U.S. Patent Application Publication No. 2/7/267,642 to Erchak et al., the disclosure of which is incorporated herein by reference in its entirety, the disclosure of the disclosure of the disclosure of Electrical contacts are provided on the insulating layer. A package system having a through hole and a transparent upper cover is disposed on the electrical contact. - The wafer system is disposed on the protrusion and connected to the substrate by wire bonding. The protruding portion is adjacent to the substrate and extends through the insulating layer and the through hole on the package body, and the insulating layer is disposed on the substrate, and the right layer __^ has an electrical contact. The package system is disposed on the electrical contacts and spaced apart from the insulating layer. The j-day generation can be transmitted from the φ output to the substrate, and then reaches a divergence step, and the electrical contacts are not easily disposed on the insulating layer, which is difficult to The acoustic phase is electrically connected to the layer and the layer is not connected. The epoxy-like package and the heat-conducting plate have major disadvantages. For example, the heat-insulating material with low thermal conductivity such as 201218469 resin has a heat dissipation effect. Restrictions, however, electrical insulation materials with high thermal conductivity, such as epoxy resin filled with Tauman or carbonized materials, have the disadvantages of low adhesion and low cost of production. The electrical insulation material may be in the process of being produced. Or delamination due to heat at the beginning of the operation. If the substrate is a single-layer circuit, the routing capability is limited, and the substrate is combined and aa ^ Γ but the substrate is a multilayer circuit system, and the substrate is too thick. The electric layer will reduce the effect of divergence. * & ^ ^ ^ ..., political fruit In addition, the case technology has insufficient heat sink performance, oversized or difficult to teach far 6 士 5 BA BA AJr P poor ..., 埂 knot to The next layer of the group and other issues. The manufacturing process is also not suitable for low-cost mass production operations. In view of the various developments and related limitations of existing high-power semiconductor device packages and heat-conducting plates, the industry needs a cost-effective, reliable, mass-produced, multi-functional The present invention provides a semiconductor wafer and a package including at least a semiconductor component heat sink, a wire and an adhesive layer. The device includes at least one bump and a pedestal. The wire includes a solder bump-terminal. The semiconductor component is disposed on the bump and located on the opposite side of the recess in the bump, and electrically connected to the simple conductor And being thermally coupled to the bump. The bump extends from the pedestal into the viscous layer - Ρ4π' and the pedestal extends from the side of the bump. The wire is located outside the 5 ridge cavity, and Providing signal routing between the pad and the terminal. According to one aspect of the invention, a semiconductor wafer package includes at least one half of an adhesive layer, a heat sink and a wire. The layer has at least one deg. The heat seat comprises at least a bump and a pedestal, wherein (1) the bump abuts the 201218469 5 sill base and is integrated with the pedestal, and a first vertical direction from the pedestal Extending, (nh the pedestal extends from the side of the block in a direction perpendicular to the side perpendicular to the first vertical direction, and (^) the bump has a recess, the recess being at the first vertical The direction is covered by the bump, but the recess is not covered by the bump in a second vertical direction opposite to the first vertical direction. The wire comprises a pad and a terminal. The component is disposed on the bump, extends on the outer side of the bump along the first vertical direction, and is located outside the recess and extends inward of a periphery of the recess. The semiconductor component is electrically connected to The pad is electrically connected to the 'Hai terminal. The semiconductor component is also thermally bonded to the bump to thermally bond to the pedestal. The adhesive layer contacts the bump and the base and extends laterally from the bump to the terminal or over the terminal. The wire is located outside of the recess. The bump and the recess extend into the opening. According to another aspect of the invention, a semiconductor wafer package includes at least half of the conductor elements, an adhesive layer, a heat sink and a wire. The adhesive layer has at least one opening. The heat sink includes at least one bump, a base and a cover, wherein (1) the bump abuts the base and is integrated with the base, and protrudes from the base in a first vertical direction The block is also adjacent to the cover and protrudes from the cover in a second vertical direction opposite to the first vertical direction; (ii) the base is oriented from the protrusion along a side perpendicular to the vertical direction (iii) the cover covers the protrusion in the first vertical direction and protrudes from the side of the protrusion; and (iv) the protrusion has a recess in the first a vertical direction is covered by the bump, but the recess is not covered by the bump in the second vertical direction, the bump separates the recess from the cover, and the recess is along the The vertical direction and the side directions 12 201218469 extend across most of the bump. The wire includes a pad and a terminal. The semiconductor component is disposed on the cover body, extends on the outer side of the cover body along the first vertical direction, and is located outside the recess and extends inward of a periphery of the recess. The semiconductor device is electrically connected to the device, and is electrically connected to the terminal. The semiconductor component is also thermally bonded to the cover to be thermally coupled to the base. The adhesive layer contacts the bump, the base and the cover, and is located between the base and the solder pad and between the base and the cover, and extends laterally from the bump to the terminal or Cross the terminal. The wire is located outside of the recess. The bump and the recess both extend into the opening. According to another aspect of the invention, a semiconductor wafer package includes at least half of the conductor elements, an adhesive layer, a heat sink, a substrate and a wire. The adhesive layer has at least one opening. The heat sink includes at least one bump, a base and a cover. (1) the bump abuts the base and is integrated with the base, and the first base Extending in a vertical direction, the bump also abuts the cover body and protrudes from the cover body in a second vertical direction opposite to the first vertical direction; (u) the base is vertical from the bump Extending out from the lateral direction of the vertical direction; (丨(1) the cover covers the protrusion in the first vertical direction and protrudes from the side of the protrusion; and (iv) the protrusion has a concave a hole, the recess is covered by the bump in the first vertical direction, but the recess is not covered by the bump in the second vertical direction, and the smect bump is the recess and the cover Separating, and the recess extends across the majority of the bumps in the vertical direction and the side directions. The substrate includes a dielectric layer, wherein a through hole extends through the substrate. The wire includes a pad and a semiconductor device disposed on the cover body and extending along the first vertical direction of the cover body The outer side of the recess is located outside the recess 6 and extends toward the inner side of the recess 13 201218469. The semiconductor component is electrically connected to the solder pad to be electrically connected to the terminal. The semiconductor component is also thermally coupled to the outer surface of the recess. The cover is thermally coupled to the pedestal. The adhesive layer contacts the bump, the pedestal, the cover and the dielectric layer, but is kept away from the solder plaque. The adhesive layer is located at the bump and the Between the dielectric layers, between the pedestal and the pad, between the pedestal and the cover, and between the pedestal and the dielectric layer and extending laterally from the bump to the terminal or The (four) terminal. The substrate is disposed on the layer. The dielectric layer is connected to the cover but spaced apart from the bump and the base. The wire is located outside the recess 6. The bump is The recesses extend into the opening and the through hole, and the bump extends in the vertical direction outside the through hole. The cover covers the opening and the through hole in the first vertical direction. The semiconductor component can be Provided on the bump, outside the recess, and on the inner side of the periphery of the bump and the recess For example, the semiconductor component may be disposed on the soldering pad and the cover body, extending along the first perpendicular direction and the outer side of the material and the cover body, and electrically connected to the solder pad by using the first solder. And bonding to the cover by a second solder. In this case, the semiconductor component can extend laterally within the periphery of the wire and beyond the periphery, and laterally extend within the periphery of the recess of the bump disk and Alternatively, the semiconductor component may be disposed on the cover body and not disposed on the solder pad 'and extend on the outer side of the solder pad and the cover body along the first vertical direction' while being electrically connected to the wire by a wire. The solder fillet' is thermally bonded to the cover by a die bonding material. In this example, the semiconductor component can be located outside the circumference of the wire and within the periphery of the bump and the cavity, and in the second vertical The direction is covered by the bump and the recess. In this example, the semiconductor component may also be located outside the circumference of the wire, extending laterally within the periphery of the bump and the periphery of the cavity, and outside the periphery. First—the vertical direction covers or does not cover the convex And the cavity. In the case of 14 201218469 2, the semiconductor component may also be located outside the circumference of the wire and in the periphery, (4) extending in the periphery of the cavity and outside the periphery, and covering the first r r a and The second vertical direction is covered by the bump. In any arrangement, the semiconductor and the dummy member are disposed on the bump, outside the pocket, and extend inward of the periphery of the pocket. The semiconductor component can be a sealed or unpackaged semiconductor wafer. For example, the lit package includes a chip package of the LED chip, and the device is placed on the pad and the cover, and is disposed on the outer side of the cover, so that the semiconductor component is electrically connected to the first solder. The solder pad, and using a second solder (four) to connect a semiconductor wafer such as an LED chip, and is disposed on the first: the soldering ..., and extending over the soldering ... The semiconductor component is electrically connected, and is electrically connected. The mat is attached to the lid by a solid-crystalline material. The middle connection =: 1 is in the through hole - a gap t between the bump and the substrate is connected to the dielectric layer, and the gap body and the dielectric layer. Contacting the pedestal, the cover, the bump between the bump and the base of the pedestal and the dielectric layer bump and the dielectric layer, and the pedestal is located at the protrusion a first-perpendicularly covering the base at the same time as the side of the 嗲, and covering the substrate in the second vertical direction, covering the side surface of the (four) side and surrounding the side wall of the bump, the pedestal One of::: the adhesive layer; one of the surface portions of the main I earth seat of the Ray® and the surface portion of the block that protrudes laterally from the block, and faces the (four)-vertical direction from the same side The surface of the dielectric layer of Table 15 201218469 faces the second vertical direction. The adhesive layer may also fill a space between the bump and the dielectric layer, a space between the base and the cover, and a space between the base and the substrate. The adhesive layer may be laterally from the bump. Extend to or over the terminal. For example, the ' _ layer and the terminal can extend to the peripheral edge of the group. In this example, the _ layer extends laterally from the bump to the terminal. Alternatively, the adhesive layer can be extended to the peripheral edge of the assembly and the terminal is spaced from the peripheral edge of the assembly. In this example, the adhesive layer extends laterally from the & block and over the terminal. The adhesive layer can pass through one of the imaginary horizontal two gates between the bump and the cover body, and the imaginary horizontal line between the core and the dielectric layer, the bump and the covered layer and the horizontal line, the bump and the bump One of the outer edges of one of the groups

An imaginary vertical line between the pedestal and the cover body, and a pseudo-Jiao and Fan Shoujie between the pedestal and the cymbal. A 罝 ^ ” right omits the dielectric layer, the adhesive layer may also pass through the imaginary vertical line between the base and the terminal between the pads. ^Vertical line 'and the pedestal and the single For example, the bump and the base may be a metal body, wherein the single metal body: the second adhesive layer may be coplanar at the cover. The bumps may also be viscous = but maintain a distance from the dielectric layer and extend into the opening and the through hole while extending in the vertical direction outside the through hole. The bump extends to the portion of the pedestal The first bent corner may be included, and the portion of the convex ghost extending to the cover may include _ (four) " the base may be read at an angle of about 90 degrees along the 7th angle. The convex portion is adjacent to the outward outward f fold And the bump is adjacent to the 16 201218469 cover body can be stamped at an angle of about 90 degrees of the special irregular thickness "; ! = two = can have a diameter greater than the diameter of the bump at the cover. For example, the diameter or pyramidal shape is reduced in diameter from the base along the ', ' dome coned. Alternatively, the bump may be a cylinder or a moment: the cover hands the base along the first The diameter of the factory is changed in the bump. The process of extending the gold straight direction to the cover is fixed::: it can be a flat-top cone or a pyramid, and its diameter is along the first-vertical The body H or the pocket may be a cylindrical or rectangular prism shape, and the straight 疋 is in the process of extending the pocket along the first vertical I straight universal edge. The hole can also be. The door is enlarged, has a circumference of a circle, a square or a rectangle, and the ^ 忒 八 can also have a 172 and a through hole corresponding to the protrusion, along the vertical and side directions Extending across a majority of the bump. The recess may be exposed toward the second vertical direction or may be covered in the second vertical direction. For example, the recess may be in a hollow and non-hermetic state. Exposed to the first vertical direction of the crucible, and the protrusion is also exposed toward the second vertical side. Or the concave The cavity may be filled with a filler such as an epoxy resin, a polyimide or a solder, wherein the filler contacts the bump and extends across the & block mass in the vertical and lateral directions, and further The filler is confined to the pocket and fills most or all of the pocket. For example, the pocket may be in an unsealed state, and the crucible filler may be substantially coplanar with the base and toward the Further, the vertical direction is exposed. For another example, the recess may be sealed by the base, and the filler may be in contact with both the bump and the base while being surrounded by the two, and in the vertical direction of the 201218469 Covered by the pedestal. The pedestal can support the bump, the substrate and the layer of the patch, extending laterally to the iliac crest and extending to the peripheral edge of the set or to the periphery of the set The pedestal 1 is also capable of contacting the adhesive layer and maintaining a distance from the substrate while extending along the first and the outer sides of the adhesive layer and the substrate. The pedestal can be in the second vertical The direction covers the wire and the substrate. The cover may have a uniform hook The thickness of the uneven sentence. For example, the cover may have a uniform thickness and maintain a distance from the conductive layer and the dielectric layer. In this example, the cover may extend laterally from the bump to the Adhesive layer does not extend to the conductive layer or the dielectric layer ′ and covers the opening in the first vertical direction without covering the through hole. Alternatively, the cover body may have a first thickness adjacent to the bump. And having a second thickness greater than the first thickness adjacent to the dielectric layer, and further having a flat surface facing the first vertical direction. In this example, the cover may contact the adhesive layer and the a dielectric layer, wherein a portion of the cover adjacent to the adhesive layer and spaced apart from the dielectric layer may have the first thickness, and the cover contacts the dielectric layer adjacent to the bonding pad and in the first vertical direction The portion covering the opening and the through hole has the second thickness. The cover may also be spaced from the peripheral edge of the set and provide a wafer holder for the semiconductor component. The cover may be rectangular or square, and the protrusion may be circular. In this case, the cover is sized and shaped to match the thermal contact surface of the semiconductor component. The size and shape of the bump is not designed in accordance with the thermal contact surface of the semiconductor component. In any case, the cover is thermally coupled to the base through the bump. The heat sink can be composed of the bump, the base and the cover. The heat sink is also made of steel, aluminum or steel/nickel/aluminum alloy on 201218469. The heat sink can also be composed of a copper, aluminum or copper/nickel/my alloy core and a covered joint of the surface layer, wherein the covered layer is composed of ', 'έ ίτ, composed of gold, silver and/or nickel. _ _ composition mode, Xuan Zheng hot seat can provide heat dissipation, the thermal energy of the semiconductor component is diffused to the next layer of assembly. > hai substrate can contact the cover, and keep the distance from the bump and the pedestal The substrate may also be a laminated structure. The substrate may also include the bonding pad and may or may not include the terminal. The bonding pad and the cover may have the same thickness adjacent to each other, but the cover is adjacent to each other. The thickness of the bump may be different from the solder bump. Further, the solder pad and the cover may be co-located on a surface facing the first vertical direction. The solder pad may have the same thickness as the terminal, ^ Cooperating in the __ surface facing the first-vertical direction. Or, the pedestal and the terminal are 'and co-located on the surface facing the second vertical direction. The factory of the door θ the wire can contact the adhesive layer or Keeping distance from the adhesive layer. For example, the pad "this Promoter may be in contact with the adhesive layer, the adhesive layer and extends in the first direction - the outer side of the vertical direction. In this case, the solder bumps and the terminals may have the same thickness & are coplanar with each other. Similarly, the solder tab may contact the adhesive layer and extend over the outer side of the adhesive layer along the first-vertical direction, and the terminal contacts the adhesive layer to extend along the outer side of the second layer. In this case, like 2 = the sub-layers may have the same thickness and be coplanar with each other. Alternatively, the material and the handle may contact the dielectric layer and maintain a distance from the adhesive layer while extending the outer side of the adhesive layer and the dielectric layer along the first-vertical direction. In this case, _塾 and the terminals may have the same thickness and be coplanar with each other. For another example, 19 201218469 contacts the dielectric layer but maintains a distance from the adhesive layer and extends to the outer side of the first vertical direction, and the terminal is: and = the dielectric layer maintains a distance, and The layer extending at the point has the same thickness as the layer, and the domains are coplanar. Η 5 line seat and the terminal can be included in the __ routing line, the routing line extends over the dielectric layer along the first sage of the ancient A + from the buckle Μ ^ Μ π located between the (four) and the terminal The guiding circuit is searched. For example, the lean soldering, the Laoshan 2 Le 〇鳊 〇鳊 与 and the routing line may extend beyond the = layer and the riding layer along the outer side of the first vertical direction. In this example, (iv) the wire can provide a horizontal route between the wire and the terminal. Similarly, the wire can include a coated perforation extending through the (IV) dielectric layer of the adhesive layer and on a conductive path between the bond pad and the terminal. For example, the solder bump may extend over the adhesive layer and the dielectric layer along the first vertical direction. The terminal may extend over the adhesive layer and the dielectric layer may be covered by the second vertical direction. The adhesive layer and the dielectric layer are penetrated. In this example, the coated via can provide a vertical route between the pad and the terminal. Similarly, the bonding pad and the routing line may extend along the first vertical direction of the adhesive layer and the dielectric layer, and the terminal may extend between the adhesive layer and the dielectric layer along the second vertical direction. The outer side of the coated via may penetrate the adhesive layer and the dielectric layer and electrically connect the routing line to the terminal. In this example, the routing line provides a horizontal route between the bond pad and the covered via, which provides a vertical routing between the routing line and the terminal. Additionally, the coated perforations may extend to or away from the peripheral edge of one of the sets. The wire can consist essentially of copper. The wire may also consist of - an inner steel core and a covered joint of the surface layer 20 201218469 ' wherein the covered joints are comprised of gold, silver and/or nickel. The wire can provide a signal route between the pad and the terminal regardless of the composition. The pad can serve as an electrical contact of the semiconductor component, the terminal can serve as an electrical contact of the next layer, and the pad and the terminal can provide a signal between the semiconductor component and the next layer routing. The base, the cover, the solder pad and the terminal can be made of the same metal. For example, the pedestal, the cover, the pad and the terminal may comprise a gold, silver or nickel surface layer and an inner copper core, but mainly copper, as for the bump, the routing line and the coated perforation It can be mainly copper or all copper. In this example, a covered contact may include a gold or silver surface layer and an inner nickel layer, wherein the inner nickel layer contacts and is located between the surface layer and the inner copper core; or 'the covered contact may A recording surface layer that contacts the inner copper core is included. The heat sink can include a copper core that is shared by the bump and the base. The wire can include a copper core that is shared by the terminal. For example, the heat sink may include a gold, silver or nickel surface disposed on the base and the cover, and an inner copper core disposed on the bump, the base and the cover, and the heat dissipation The seat is mainly steel. In this case, 'the base material includes a coated contact as its surface layer'. The cover may also include a covered contact as its surface layer, and the bump may be a copper or contain-covered contact as a The bump is on the surface layer of the recess. Similarly, the wire may include a gold, acoustic or surface layer disposed on the pad and the terminal, and an inner steel core disposed on the pad and the terminal, and the 2 wires are mainly copper. In this case, the pad may include a coated contact as a surface layer, and the terminal may also include a covered contact as its surface layer. 201218469 The group body may include a semiconductor material covering the first perpendicular square, and the contact material - LEDa > i' is used to convert the color to be emitted by the LED chip. Medium B------------- In addition to the color-changing packaging material, the (four) core cover is used to convert the color of the packaging material. The transparent «(4)it packaging material may comprise a stone oxide resin and a phosphor, and the material ''4' contains a siloxane resin but does not contain a phosphor. The group body may be a first ray ten alpha group or a package of two or two early crystal or polycrystalline. For example, the first level package of the set of BB pieces or eve pieces. Alternatively, the LED package or the second LED of the plurality of LED packages may comprise a single LED wafer or a plurality of substrates. The present invention provides a method of fabricating a semiconductor wafer assembly. The method comprises: providing a bump and an overhanging platform; and providing an adhesive layer on the overhanging platform, the step comprising inserting the bump into one of the openings of the adhesive layer; and providing a conductive ~ mysterious adhesive layer on the step of Aligning the bump with the through hole of the conductive layer; (4) an adhesive layer flowing between the bump and the conductive layer; curing the adhesive layer; providing two wires, the wire comprising n-terminal and the conductive layer Selecting a portion of the semiconductor component on the bump and placing the semiconductor component on a side opposite to a recess in the bump, wherein a heat sink includes the bump and a base, the base includes the outer Extending the platform adjacent to the portion of the bump; electrically connecting the semiconductor=piece to the wire; and thermally bonding the semiconductor component to the heat sink. According to one aspect of the present invention, a method 22 201218469 for fabricating a semiconductor wafer package includes: (1) providing a bump, an overhanging platform, a landing layer, and a conductive layer, wherein (4), the ridge bump abuts the overhang Forming and integrating with the platform, further, the bump extends perpendicularly from the overhanging platform in a -first-vertical direction while extending into one of the openings of the adhesive layer, and is aligned with one of the through holes of the conductive layer, (8) the outer The extension platform extends from the side of the protrusion along a direction perpendicular to the first vertical end θ, and (C) the protrusion has a recess facing the first and the vertical a direction perpendicular to the vertical direction and covered by the bump in a first vertical direction, (4) the adhesive layer is disposed on the overhanging platform, between the overhanging platform and the conductive layer, and is uncured, Further, (4) the conductive layer is disposed on the adhesive layer; (7) the X station is layered. The first vertical direction flows into the through hole and is formed by a gap between the bump and the conductive layer; (3) curing the point layer; (4) providing a wire comprising a solder pad, a terminal and the conductive layer a selected portion; (7) a semiconductor component is disposed on the bump; wherein (4) a heat sink includes the bump and a pedestal' (8) the bump abuts the pedestal' and is perpendicular to the pedestal in the first vertical direction Extending (c) the base includes a portion of the overhanging platform that abuts and is integral with the projection I and extends from the side of the projection, and (4) the semiconductor member L extends beyond the side The bump is located on the outer side of the first-perpendicular direction, and is located outside the recessed portion 6 and extends inside the periphery of one of the recesses; (6) electrically connecting the semiconductor component to the solder pad to electrically connect the semiconductor component To the terminal; and (7) thermally bonding the semiconductor component to the bump 'by thermally bonding the semiconductor component to the pedestal. According to another aspect of the present invention, a method of fabricating a semiconductor wafer package 匕3(1) provides a bump and an overhanging platform, wherein the bump abuts and is integrated with the overhanging platform, and The bump extends perpendicularly from the overhanging platform along a first vertical direction 23 201218469, and (b) the overhanging platform extends from the side of the bump along a side perpendicular to the first vertical direction, and (c) the bump has a recess six, wherein (1) the recess is facing a second perpendicular direction opposite the first vertical direction, (π) the recess is in the first vertical direction by the & a block covering and (ni) the recess extending across the majority of the bump in the vertical and lateral directions; (2) providing an "adhesive layer" wherein the opening extends through the adhesive layer; (3) providing a conductive layer Wherein - the via extends through the conductive layer; (4) the adhesive layer is disposed on the overhanging platform, the step comprising inserting the bump into the opening, wherein the ingot and the recess both extend into the opening; 5) setting the conductive layer on the adhesive layer, this step includes the convex Aligning the block with the through hole, wherein the adhesive layer is between the overhanging platform and the electrical layer and is not cured; (6) heating and tying the adhesive layer; (7) causing the overhanging platform and the conductive layer to be mutually Relying, thereby causing the bump to move in the first perpendicular direction in the through hole while applying pressure to the melted adhesive layer between the overhanging platform and the conductive layer, the pressure forcing the (four) adhesive layer along the first Vertically flowing into the through hole - a gap between the bump and the conductive layer; (8) heat curing the molten (four) layer, thereby mechanically adhering the bump to the overhanging platform to the conductive layer; (9) Providing a wire comprising a pad, a terminal and a selected portion of the conductive layer; (10) providing a semiconductor component on the bump, wherein (4) the heat sink comprises the bump and a pedestal, (8) a bump abutting the base: and extending perpendicularly from the base in the first-vertical direction, (4) the base includes a portion of the overhanging platform, the portion is adjacent to the bump and integral with the same (d) the coffee is extended, and (4) the semiconductor component extends along the bump along the first The outer side of the vertical direction is located outside the recess and extends inward of one of the circumferences of the recess; (11) electrically connecting the semiconductor component to the soldering pad, thereby electrically connecting the 24 201218469 semiconductor component to the a terminal; and (12) thermally bonding the semiconductor component to the bump, thereby thermally bonding the semiconductor component to the pedestal.设置 Setting the conductive layer may include: separately arranging the conductive layer on the adhesive layer. Or 'setting the conductive layer may include: disposing the conductive layer and the carrier on the adhesive layer such that the conductive layer contacts and is located between the adhesive layer and the carrier 2, and then after the adhesive layer is cured The carrier is first removed and the wire is provided. Alternatively, the providing the conductive layer may include: disposing the conductive layer on the adhesive layer together with the dielectric layer to keep the conductive layer away from the adhesive layer, and: the dielectric layer is in contact with and located at the conductive layer Between the layer and the adhesive layer. Another aspect of the present invention includes: (1) providing a bump, an overhanging platform, an adhesive layer, and a conductive layer, wherein (4) the bump abuts the overhanging platform and Forming the body, in addition, the bump system: - a first vertical direction extending perpendicularly from the overhanging platform while extending into the port of the port and aligning the through hole of the conductive layer, (b) The outrigger platform extends from the side of the bump in a direction perpendicular to the first vertical direction. (4) the bump has a recess. (1) the recess is facing away from the first vertical direction. a second vertical direction '(Η) the recess is covered by the bump in the first vertical direction and (iii) the recess extends across the majority of the & block along the vertical and lateral directions (4) the adhesive layer is disposed on the overhanging platform, between the overhanging platform and the conductive layer, and is not cured, and further, (4) the conductive layer is disposed on the adhesive layer; (7) the adhesive layer is along The first vertical flow = the inside of the through hole - a gap between the bump and the conductive layer; Curing the adhesive layer; (4) providing a wire comprising a soldering ring and a terminal, wherein the soldering wire comprises a germanium portion of the electrical layer; (5) providing a heat sink, the heat sink 25 201218469 a bump, a pedestal and a cover, wherein (a) the bump abuts the pedestal and extends perpendicularly from the pedestal in the direction of the first - red; ancient + ^ ^ direction (b) the base The seat contains the extension of the second - ^ σ < -.卩 'This part is adjacent to the bump and is integrated with it, and extends from the side of the bump to 'further' (4) the cover abuts the & block and covers the bump in the first-vertical direction Extending from the side of the bump and including a selected portion of the conductive layer, (6) providing a semiconductor component on the cover, wherein the half-piece extends in the first vertical direction The outer side is located at the outer side of the recess and electrically extends the semiconductor element to the solder pad on the inner side of one of the holes (7) to electrically connect the semiconductor component to the terminal; and (8) thermally couples the semiconductor component to The cover thereby thermally bonding the semiconductor component to the pedestal. According to still another aspect of the present invention, a method of fabricating a semiconductor wafer package includes: (1) providing a bump and an overhanging platform, wherein (4) the bump abuts and is integrated with the overhanging platform. The bump protrudes perpendicularly from the overhanging platform in a first vertical direction, and (8) the overhanging platform extends from the side of the bump along a side direction perpendicular to the first straight direction and (4) the convex The block has a concave six, wherein (1) the recess is facing a first vertical square (four), (8) the recess is covered by the (four) block in the first-vertical direction, and =) the straight recess is along the vertical And the lateral direction extends across a majority of the bump, and (d) the recess has a population located on the overhanging platform; (7) provides a point layer, wherein an opening extends through the point layer; (3) provides a conductive a layer, a through hole extending through the conductive layer; (4) providing the adhesive layer on the overhanging platform, the step of inserting the bump into the opening, wherein the bump and the recess mouth extend into the opening; Setting the conductive layer on the adhesive layer, this step includes the 26 2 01218469 The bump is aligned with the through hole 'where the adhesive layer is between the overhanging platform and the conductive layer and is not cured; (6) heating and melting the adhesive layer; (7) the overhanging platform and the conductive layer Engaging each other, thereby moving the bump in the first vertical direction in the through hole, and applying pressure to the molten adhesive layer between the overhanging platform and the conductive layer, the pressure forcing the molten adhesive layer along the first a vertical direction flowing into the through hole and a gap between the bump and the conductive layer; (8) heating and curing the molten adhesive layer, thereby mechanically adhering the bump to the overhanging platform to the conductive layer ( 9) providing a wire comprising a pad and a terminal, wherein the pad comprises a selected portion of the conductive layer; (1G) provides a heat sink, the heat sink includes the bump base and a cover Wherein 0) the bump abuts the base and extends perpendicularly from the base in the first vertical direction, (b) the base includes a portion of the overhanging platform, the portion is adjacent to the bump and Forming one body and extending from the side of the bump, in addition, c) the cover body abuts the bump and covers the bump in the first vertical direction while extending from the side of the bump and includes a selected portion of the conductive layer; (11) providing a semiconductor component In the cover body, the semiconductor component extends on the outer side of the cover body in the first-vertical direction, outside the recess, and extends inward of the circumference of the recess; (12) electrically connecting the semiconductor An element to the solder pad, thereby electrically connecting the semiconductor component to the terminal; and (13) thermally connecting the semiconductor component to the cover, thereby thermally bonding the semiconductor component to the pedestal. Providing the bump may include mechanically stamping a metal plate to form the bump on the metal plate and forming the recess in the bump. In this case, the bump is a stamped portion of the metal sheet, and the overhanging platform is the gold: an unpunched portion of the sheet. Providing the adhesive layer can comprise: providing a film of uncured epoxy. Making 27 201218469 The point-to-layer flow can include: smashing the uncured epoxy resin and extruding the uncured epoxy resin between the overhanging platform and the conductive layer. Curing the adhesive layer can comprise curing the melted uncured epoxy resin. Providing the bond pad can include removing selected portions of the conductive layer after curing the adhesive layer. The removing can include wet chemical etching the conductive layer with a patterned etch stop layer defining the pad such that the pad includes a selected portion of the conductive layer. Providing the cover may include removing selected portions of the conductive layer after curing the adhesive layer. The removing may include wet chemical etching the conductive layer with a patterned etch stop layer defining the cover such that the cover includes a selected portion of the conductive layer. Providing the terminal can include removing a selected portion of the conductive layer after curing the adhesive layer. The removing can include wet chemical etching the conductive layer with a patterned J I1 layer defining the terminal such that the terminal includes a selected portion of the electrical layer. The second terminal 2 may include: after curing the adhesive layer, removing the portion of the outer extension. The removing may include: wet chemical etching the overhanging platform with a patterned etch stop layer that defines the terminal such that the terminal includes a selected portion of one of the mysterious extension platforms. Providing the base can include: a selected portion of the table. Removing the etch stop layer from the overhanging platform - the selected portion after curing the adhesive layer - removing the overhang may comprise: performing a wet chemical etch using a pattern defining the pedestal to Having the susceptor to provide the bond pad and the cover can include removing a selected portion of the conductive layer using a patterned etched resist layer that defines the bond pad and the cover 28 201218469 body. The solder pad and the cover body can be simultaneously formed by using the same pattern in the π _, s > μ , ^ ^ ; Similarly, the 烨塾 and the terminal are provided to be packaged m: a patterned etched resist layer of the solder pad and the terminal may be defined to be removed simultaneously using the same patterned (four) resist layer in the step (4). Also large for the solder potential, the terminal and the cover may comprise: removing the selected <section of the conductive layer using a definable =, the terminal and the patterned (four) resist layer of the cover. In this way, the solder bump, the terminal and the cover can be formed simultaneously using the same patterned etching resist layer in the same thirst and etching step. Providing the pedestal and the terminal can include removing a selected portion of the overhanging platform by a patterned silver etch resist layer defining the pedestal and the end. In this way, the susceptor and the terminal can be formed simultaneously in the same wet chemistry step using the same patterned etch stop layer. The pad can be formed before, after, or during the formation of the terminal. Therefore, the material and the material can be simultaneously formed or purely formed in the same-wet chemical etching step by using different patterned_resistive layers. Similarly, the susceptor may be formed before, after, or during formation of the cover. Therefore, the pedestal and the cover body can be formed simultaneously or sequentially using different chemistries, or the cover can be used instead of the pedestal. The etched resist layer successively forms the pedestal and the cover. Similarly, the pad, the terminal, the base and the cover may be formed simultaneously or successively. Providing the bonding pad may include: grinding the bump after curing the adhesive layer

S 29 201218469 /1 layer and the conductive layer, such that the bump, the adhesive layer and the conductive layer are laterally flush with each other on a facing surface of the hypotonic-vertical direction; then using -ϋ Ββ焊^•θθ化@刻阻层 Remove selected portions of the conductive layer to: 吏X solder pad package 3 5H conductive layer - selected part. The grinding may include: grinding the adhesive layer without grinding the bump, and then grinding the bump and the conductive layer. The removing can include wet chemical etching the conductive layer using a patterned etch stop layer that defines the solder fillet. provide. The fcf·pad may include: after the grinding is completed, depositing a conductive metal on the adhesive layer and the conductive layer of the bump to form a coating layer, and then removing selected portions of the conductive layer and the edge coating layer, The solder fillet is selected to include selected portions of both the conductive layer and the cover layer. Depositing a conductive metal to form the coating layer 3. A thin coating layer is provided on the bump, the adhesive layer and the conductive layer in an electroless plating manner, and then a thick coating layer is plated on the thin coating layer on. The removing may include wet chemical etching the conductive layer and the coating layer with a patterned etch stop layer defining the bonding pad. Providing the cover body may include: depositing a conductive metal on the bump, the adhesive layer and the conductive layer to form a coating layer after the polishing is completed, and then removing selected portions of the conductive layer and the coating layer, The cover is provided with selected portions of both the conductive layer and the cover layer. Depositing the conductive metal to form the coating layer may include: disposing a thin coating layer on the bump, the adhesive layer and the conductive layer in an electroless plating manner, and then plating a thick coating layer on the thin coating layer . The removing may include wet chemical etching the conductive layer and the coating layer with a patterned etch stop layer defining the cover. Providing the terminal may include: after the polishing is completed, depositing a conductive metal on the bump, the adhesive layer 30201218469 and the edge conductive layer to form a coating layer, and then removing selected portions of the conductive layer and the coating layer, The terminal includes selected portions of both the conductive layer and the cover layer. Depositing the conductive metal to form the coating layer may include: disposing a thin coating layer on the bump, the adhesive layer and the tantalum conductive layer in an electroless plating manner, and then plating a thick coating layer on the thin coating layer . The removing may include wet chemically etching the conductive layer and the coating layer with a patterned etch stop layer defining the terminal. Providing the terminal to the stomach may include: depositing a conductive metal on the overhanging platform to form a coating layer after the grinding is completed, and then removing selected portions of the overhanging platform and the covering layer, so that the terminal includes the outer portion The extension platform and the coating layer are both fixed. Scythe. > The formation of the conductive metal to form the coating layer may include: disposing a thin coating layer on the overhanging platform in an electroless ore-free manner, and then electro-concentrating a thick coating layer on the thin coating layer. The removing may include: performing a wet chemical button on the overhanging platform and the coating layer by using a patterned (four) resist layer defining the terminal. The providing the base may include: after the grinding is completed, the overhanging Depositing a conductive metal on the platform to form a coating layer' and then removing selected portions of both the overhanging platform and the covering layer such that the pedestal comprises a conductive portion of the overhanging platform and the selected portion of the covering layer The metal to form the coating layer may include: a thin coating = a non-electrical chain covering on the overhanging platform 1 and a thick coating layer on the electrical coating layer. The removing may include: utilizing - the pedestal = hydrazine! resist layer to perform wet chemistry on the overhanging platform and the coating layer for the pedestal, the pedestal may include: after the grinding is completed, A conductive metal is deposited on the overhanging platform and a fill in the 201218469 recess to form a coating. Depositing the conductive metal to form the coating layer may include: placing a thin coating layer on the overhanging platform and the filler in an electroless plating manner, and then electrically depositing the thick 35 coating layer on the thin coating layer . Additionally, the base can enclose the recess and cover the bump, the recess and the filler in the second vertical direction. Providing the wire can include providing the pad, the terminal, and a routing line, wherein the routing line is on a conductive path between the pad and the terminal. The routing line can include a selected portion of the germanium conductive layer and extend the outer side of the adhesive layer and the dielectric layer along the first vertical direction. Providing the pad and the routing line can include removing a selected portion of the conductive layer using a patterned etch stop layer defining the pad and the routing line. In this way, the tantalum pad and the routing line can be formed simultaneously using the same patterned molybdenum layer in the same wet chemical etching step. Providing the wire can include: providing the pad, the terminal, and a covered via, wherein the 泫-coated via is located on a conductive path between the pad and the terminal. The coated perforation may be formed first, and the pad and the terminal are formed, wherein the through hole extends through the conductive layer, the adhesive layer, the dielectric layer and the overhanging platform. & The susceptor, the cover, the solder pad, the terminal and the coated via may comprise: after curing the adhesive layer, drilling through the conductive layer, the adhesive layer, the dielectric layer and the overhanging platform to form a hole And depositing a conductive metal on the bump, the adhesive layer, the dielectric layer, the conductive layer and the overhanging platform, and the hole to open/form the coating layer, wherein the coating layer is on the bump, the adhesive layer Forming a first coating layer on the layer and the conductive layer, and forming a second coating layer on the overhanging platform while forming the coated perforation in the hole; and then forming a smear on the first coating layer 32 201218469 Determining the etch resist layer with the first pad of the cap and forming a patterned etch stop layer defining the pedestal and the terminal on the cap layer using the first patterning (4) a resist layer (4) the conductive layer and the first cladding layer are formed to form a pattern defined by the first patterned etch stop layer; and the first patterned (four) resist layer _ the overhanging platform and the second cladding layer are Form it into the ® case defined by the second (10) layer; Such a patterned etch resist layer is removed. The first coating layer on the bump, the adhesive layer and the conductive layer may contact the bump, the adhesive layer and the conductive layer, and cover the bump in the first vertical direction, and respectively form the solder bump , the terminal 'the routing line and the cover body of the four parts. Similarly, the second covering layer on the overhanging platform can contact the overhanging platform to contact the bump and/or one of the fillings in the recess, and cover the bump in the second vertical direction while separately A portion of the base and a portion of the terminal are formed. The routing line can contact the dielectric layer but is at a distance from the adhesive layer. The coated via can contact the adhesive layer and the dielectric layer in the hole. Further, engraving the conductive layer and the first cladding layer may include exposing the dielectric layer toward a first vertical direction, but not exposing the gradation layer toward the first vertical direction. Etching the overhanging platform and the second covering layer can include exposing the adhesive layer toward the second vertical direction without exposing the dielectric layer toward the second vertical direction. The pocket may be hollow or contain a filler. Also, for example, after the semiconductor element is disposed, the recess may have a hollow space and the hollow space extends across the majority of the bump in the vertical and lateral directions. In this case, the concave semiconductor element is exposed to the second vertical direction after the arrangement is completed and the bump is also exposed toward the second vertical direction. Or 'in the setting of the semiconductor component: 33 201218469 month j χ 八 八 八 八 八 八 八 八 八 八 八 八 八 八 八 八 八 八 八 八 八 八 八 八 八 八 八 八 八 八 八 八 八 八 八 八 八 八 八 八 八 八 八The block is 4 knives and fills most or all of the pocket. For example, the filler may be first true/concave and then placed on the adhesive layer. For another example, the V-filling of the filler in the recess can be performed after curing the adhesive layer and before the wire is provided. In this example, the filler can be filled into the cavity first, and then the filler can be filled into the cavity. Second 覆 cladding. Again. The sinusoidal extension platform and the filler; or, the second coating layer α may be first. On the meta-bump and the overhanging platform, the filler is filled into the recess. In addition, the 5x filler can be ground after the filling is completed, so that the filler is not only placed in the concave concave portion, but also on the side of the protruding platform or the second covering layer facing the first vertical direction. It is laterally aligned to the plane. The flowing the adhesive layer may include: filling the gap with the adhesive layer. Flowing the adhesive layer may also include: pressing the adhesive layer to pass through the notch and extending along the vertical direction to the bump and In addition to the conductive layer, the surface portion of the bump and the conductive layer is finally reached, wherein the surface portions are adjacent to the notch and face. The first vertical direction of the porch, because the sputum occupies the layer system The bump and the conductive layer are along the outer side of the first vertical direction. Curing the adhesive layer may include: mechanically bonding the bump to the overhanging platform to the conductive layer. The semiconductor device may be disposed on the bump, and the semiconductor device may be disposed on the bump. The semiconductor device may also include the semiconductor device positioned in the periphery of the cover and Outside the periphery of the tantalum, or positioning the semiconductor component in the periphery of the cover and the periphery of the dummy solder joint. The semiconductor component may also be located in the periphery of the bump cough pocket 34 201218469 or extend in the periphery Two Outside the circumference or extending in the circumference of the guide and outside the circumference 'and outside the circumference of the wire _ line and outside the circumference. In addition, the abundance conductor element can be located on the R 矣 ° axis of the pedestal The semiconductor element may include: providing - the first solder and the second solder: The first solder is located between the LED package including the LED chip and the ¥ pad, and the first pinch is located between the LED package and the cover. The conductor element may include: providing the first solder between the LED package and the soldering iron. thermally bonding the semiconductor member may include: providing the second solder between the LED package and the cover. Further, the meta-semiconductor component may include: providing a semiconductor material between a semiconductor wafer (such as an LED chip and a side body). electrically connecting the semiconductor component may include: providing between the wafer and the bonding pad - Wire bonding. thermally bonding the semiconductor component can include 'on the wafer and the cover Providing the bonding material between the bonding layer, the pedestal, the pedestal, the cover body and the dielectric layer, and covering the wire and the substrate in a vertical direction, and covering the side surfaces And extending around a sidewall of the bump to simultaneously extend to a peripheral edge formed by separating the other components of the same batch after the assembly is completed. The pedestal can support the bump, the substrate and the adhesive layer Extending laterally to the outside of the cover and extending to the peripheral edge of the set or at a distance from the peripheral edge of the set after the set is manufactured and separated from the other batches produced in the same batch. The heat sink has excellent heat dissipation effect, and the heat energy does not flow through the adhesive layer. Therefore, the adhesive layer can be low in thermal conductivity and low in thermal conductivity and is not easy to delaminate. Thinner metals provide a relatively large surface area', which helps to reduce weight and cost. The bump and the recess can be mechanically stamped to thereby improve the fineness, and the bump and the base can be integrally formed to improve reliability. The cover body can be tailored to the semiconductor component to enhance the thermal connection. The filler provides mechanical support for the bump to increase strength. The pad and the cover may include selected portions of the conductive layer superposed on the adhesive layer or superposed on the dielectric layer to improve reliability. The adhesive layer may be located between the bump and the substrate, between the base and the substrate, and between the cover and the substrate, thereby providing a strong mechanical connection between the heat sink and the substrate. The wire can be formed into a simple circuit pattern to provide signal routing or to form a complex circuit pattern for flexible multilayer signal routing. The wire can also provide a vertical signal path between the pad and the terminal by extending through the adhesive layer and the coated via of the dielectric layer. In addition, the coated perforation may be formed after the adhesive layer is cured, and is maintained in an empty tubular shape, or is cleaved at a peripheral edge of the group to cause the solder to be subsequently reflowed to the surface of the terminal to be wetted and flow into the covered perforation. 'This avoids the formation of voids in the fresh tin because the coated perforations are filled by the adhesive layer or other non-wettable insulating material. This design helps to improve reliability. The base can provide a mechanical support for the substrate to prevent it from being bent and deformed.哕έ 辨 α α ω 古 古 低温 低温 低温 低温 低温 低温 低温 低温 低温 低温 低温 低温 低温 低温 低温 低温 低温 低温 低温 低温 低温 低温 低温 低温 低温 低温 低温 低温 低温 低温 低温 低温 低温 低温“The factory can be manufactured with a high degree of control process. Secondly, the above and other features and advantages will be further explained below through various examples. 3 6 201218469 [Embodiment] 1A and 1B FIG. 1 is a schematic view showing a method for manufacturing a bump and an overhanging platform according to an embodiment of the present invention, and FIG. 1C is an enlarged cross-sectional view of FIG. 1B. FIGS. 1D and 1E respectively. It is a top view and a bottom view of the first two B drawings. Fig. 1A is a metal plate 1 丨讳 丨讳 砚 砚 砚 ' ' ' 金属 金属 金属 金属 金属 金属 金属 金属 金属 金属 金属 金属 金属 金属 金属 金属 金属 金属 ' ' ' ' ' ' ' ' 。 。 10 series - thickness is 50 microns copper plate. Copper has the advantages of high thermal conductivity, good bonding and low cost. The metal plate 10 can be made of various metals, such as steel media, ZJ, iron-nickel alloy 42, iron , nickel, silver, gold, mixtures thereof and alloys thereof. 1B, 1C, 1D and 1卩 and 1E Do not form bumps 16 for the metal plate 10,

After standing out of the platform 18 and the recess 20, the stand 3 is solid L. , 砚 map, enlarged section view, top view and bottom view. The bumps 16, the recesses 20, and the bumps "". The guide corners 22, 24 are mechanically stamped from the metal plate 10, wherein the male tails 16 are the portions of the metal plate 1 which are stamped, and are extended. The platform 18 is a part of the metal plate 10 that is not subjected to the middle portion, and the bent corner 22 spot 24 is a bent portion of the metal plate 1 '. The projection 16 abuts the overhanging platform 18 and is integrated with the overhanging platform a. And the extension 1000 is extended in the upward direction, and the overhanging platform a is in the direction of the side in the upward and downward directions. The universal direction (such as left and right) extends from the side of the block 16 and the bump 16 includes Bending corners 7κ. <& .. , and 24, side wall 26 and top plate 28. The bending angles 22 and 24 are quite complicated by stamping, ... ^, "and ^, the resulting side wall 26 also has stamping Shape and slope. The corners 2, ^ are attached to the top plate 2 § and extend inwardly in the lateral direction. The corners 24 of the test are adjacent to the outward extension D and / σ extend laterally outward. The side wall 3 7 201218469 26 extends vertically in the upward and downward directions between the bend angle & 22 π μ, while the top plate 28 extends laterally inward from the bent corner 22 . Further, the bent β corner 22 has an angle θ|' whose value is 9 〇, and the bent corner 24 has a value of 90 degrees (see 1C0). Therefore, the angle % of the side wall % relative to the second plate 28 is 9 degrees, and the side wall 26 is also 90 degrees with respect to the overhanging platform. The month from h, the bump 丨6 is cylindrical, and its diameter is in the vertical direction between the bent corners 22_! H is unchanged. The height of the bumps 16 (relative to the overhanging micrometers) is 1000 micrometers in diameter. In addition, the bumps i6 are stamped and have a thickness of no. For example, the side walls 26 elongated by stamping are thinner than the top plate 28. In order to facilitate the drawing, the bumps 6 have a uniform thickness in the figure. The recesses 20 extend into the human bumps 16 and are covered by the bumps 16 from the upper side while facing downwards, and further, the pockets 2 are oriented downward. The direction is exposed and the projection "the portion constituting the recess 20 is also exposed downward toward the outside. Therefore, the recess 2 is hollow". The entrance at the overhanging platform 18 is not closed and the projection Μ is not covered from below. The recess 20 has a cylindrical shape with a fixed diameter due to the shape of the recess 2 。. Further, the recess 2 延伸 extends in a vertical and lateral direction across a majority of the projection 16 . The second and second views are cut The present invention is directed to a method of making an adhesive layer. The second and second views of the 2nd and 9D drawings are the top view and the bottom view, respectively, according to the 2nd figure. & The cross-section of the adhesive layer is 3, where the adhesive layer is B-sUge. A film of cured epoxy resin, which is a sheet of _ un-formed and has a thickness of 250 μm. ' 38 201218469 Adhesive layer 3 〇 can be a film of M or a film. For example, or various types of inorganic electrical insulators The dielectric thermosetting epoxy tree 匕 reading _ 3 〇 can be a film at first, in which the resin type ^ a ^ ^ ^ fr.4 ;; ΓΓ " 0 three _ (four) resin and other epoxy trees: two pairs of two to brew : vinegar 'poly-imine and polytetrafluoroethylene (p ^ 疋 application #, gas-acid strong material can be electronic grade glass' is also a suitable material. The glaze, low induction rate = English? for other reinforcement Materials, such as high-strength glass =; materials can also be woven, non-woven or non-directional micro-fibers such as crushed (sand powder fused silica (four) dimensionality: thermal shock resistance and thermal expansion matching. Thermal conductivity, such as the United States Å 克莱 威 威 威 WL As As As As As As SP SP SP SP SP SP SP SP SP SP SP SP SP SP SP SP SP SP SP SP SP SP SP SP SP SP SP SP SP SP SP SP SP SP SP SP SP SP SP SP SP SP SP SP SP SP SP SP SP SP SP SP SP SP SP It is a cross-sectional view and a bottom view of the adhesive layer 3 having the opening 32. The opening 32 is a window which penetrates the adhesive layer 30 = 1050. Micron. The opening 32 is mechanically drilled through the film to form 'but can be made by other techniques, such as stamping and stamping, etc. and 3B is a cross-sectional view' illustrating a method of soil in the embodiment of the present invention, and The 3C and 3D plans are respectively based on a top view and a bottom view. Back, a third view of the substrate 3 is a cross-sectional view of the substrate 34. The substrate 34 includes a conductive layer % 盥 dielectric layer 38. The conductive layer 36 is an electrical conductor, the contact Dielectric layer 38 extends over "I electrical layer 38. Dielectric layer 38 is an electrical insulator. For example, the conductive layer 36 is a copper plate having no pattern and having a thickness of 5 μm, and the dielectric layer μ is an epoxy resin having a thickness of 39 201218469 degrees and 350 μm. The 3C and 3D views are respectively a cross-sectional circle, a top view, and a bottom view c through hole 4 of the substrate 34 having the through hole 40 as a window penetrating through the substrate and having a diameter of 1050 μm. The via 4 is mechanically drilled through the conductive layer % and the dielectric layer 38 to form 'but may be fabricated by other techniques such as stamping and stamping. The opening 32 has the same diameter as the through hole 40. Further, the drill having the same opening η and the through hole can be formed in the same manner on the same drill floor, or formed in the same manner on the same punch by the same punch. The substrate 34 is illustrated as a laminate structure, but the substrate 34 can also be other electrical interconnect structures such as ceramic plates or printed circuit boards. Similarly, substrate 34 can additionally comprise a plurality of layers of embedded circuitry. &4; 4A to 4L are cross-sectional views illustrating a method of fabricating a heat conducting plate in an embodiment of the present invention. The heat conducting plate includes bumps 16, an adhesive layer 30, and 4M and 4N circles of the substrate are respectively a top view of the 4th L. And the bottom view. The structures of Figs. 4A and 4B are in a state in which the recesses are downwardly arranged to set the adhesive layer 30 and the substrate 34 on the overhanging platform 8 by gravity. The structure in the figure 4L still maintains the state of the pocket down. In other words, the pocket (9) is η square and is covered by the bump 16 from above. However, regardless of the orientation of the pocket 2, the relative orientation of the structure is unchanged. In particular, regardless of whether the structure is inverted, rotated or tilted, the pocket 2 is always covered by the ghost 16 in a first vertical direction. Similarly, w~ a second vertical direction extends beyond the substrate 34, regardless of whether the structure is inverted or not, 'rotation or tilting block 16 always extends along the first vertical direction to the overhanging platform'. The first and second vertical directions are opposite to each other with respect to the direction of the structure, and are perpendicular to the side direction of the front 40 201218469. 4A is a cross-sectional view of the adhesive layer 30 disposed on the overhanging platform ^. The Zhan 30 series is lowered onto the overhanging platform 18, so that the bump (10) is inserted into the opening 32, and finally the adhesive layer 3 is contacted and positioned. The overhanging platform... The bump 16 is aligned with the opening 32 and the central position within the location 32 after insertion and penetration through the opening 32 without contacting the adhesive layer 30. In the structure shown in Fig. 4B, the substrate 34 has been placed on the adhesive layer. The plate 34 is lowered onto the adhesive layer 30 such that the bumps 16 are inserted upward into the through holes 4, and finally the substrate 34 is brought into contact and positioned in the adhesive layer 3''. The bump 16 is aligned with the through hole 4 while being inserted (but not penetrating) through the through hole 40 and located at a central position within the through hole 40 without contacting the substrate 34. Therefore, it is located in the through hole 40 and between the bump 16 and the substrate %. The notch surrounds the bump 16 while being laterally surrounded by the substrate 34. Further, the openings 40 are aligned with each other and have the same diameter. At this time, the substrate 34 is disposed on the adhesive layer 3 and above the adhesive layer 30. Bumps] 6 pulls, s touches and k stretches the bumps 6 extend through the opening 32 and reach the dielectric layer 38. The bump 16 is 5 μm lower than the top surface of the hole 40 and the gate 40 is kept upward. The trepidation layer is in contact with the outrigger platform 1 8盥 ^ 34 and is located between the two. The adhesion layer% contacts the dielectric layer to maintain the distance. At this stage, the adhesive layer 30 is still B-stage (B; film of cured epoxy resin, and air in the notch 42. No. 4C shows that the adhesive layer 3 is heated and pressurized, and the flow diagram is forced. The method of applying the adhesive layer 3 to the notch 2 is to apply a downward pressure to the conductive layer 36 and/or to apply an upward pressure to the outwardly extending platform 18, that is, to press the overhanging platform 201218469 18 against the substrate 34, thereby The adhesive layer 3 is pressed; at the same time, the adhesive layer 30 is heated. The adhesive layer 3 of the heat can be arbitrarily formed under pressure. Therefore, the adhesive layer 30 between the cubic 'outset Dingtai 8 and the substrate 34 is received. After squeezing, the original shape is changed and flows upward into the missing portion 4. The eight-notch 42 is grasped. The overhanging platform 8 and the substrate 34 are continuously pressed toward each other until the adhesive layer 3 is filled with the notch 42. Further, in the overhang After the gap between the platform 8 and the substrate 3 4 is reduced, the adhesive layer 30 still fills the narrowed gap. For example, the overhanging platform 18 and the conductive layer % can be set in a press machine. Above and below the fort (not shown). In addition, an upper bumper and upper buffer can be used. Paper (not shown) is interposed between the conductive layer 36 and the upper pressing table, and the lower and lower cushioning sheets (not shown) are sandwiched between the overhanging platform 18 and the lower pressing table. The stacked body is composed of an upper pressing table, a buffer plate on the upper baffle, a substrate 34, an adhesive layer 30, an outer flat a 1 8β, a ten σ 18 under buffer paper, a lower baffle and a lower pressing. In addition, the stacking body can be positioned on the lower pressing table by a tool pin (not shown) extending upward from the lower pressing table and passing through the metal plate ig aligning hole (not shown). The lower pressing table is heated and pushed forward to each other', whereby the adhesive layer 3 is heated and pressed. The broadcasting plate can disperse the heat of the M stage, and apply the heat to the outer flat plate 18 and the substrate 34 or even the adhesive layer 30. The buffer paper disperses the pressure of the pressing table, and the pressure is uniformly applied to the overhanging platform 18 and the substrate 34 or even the adhesive layer. Initially, the dielectric layer 38 is in contact with and pressed against the adhesive layer. With the action and continuous heating, the adhesive layer 3〇 between the overhanging platform 18 and the substrate 34 is squeezed and begins to melt 'and thus flows upward into the notch 42' The conductive layer 36 is etched through the dielectric layer 38. For example, the 'uncured epoxy resin is heated and squeezed into the notch 42 after the heat is tempered', but the reinforcing material and the filler remain on the overhanging platform 18 and the substrate "42 201218469 rises The speed is greater than the bump 16 and finally fills the gap 42. The adhesive layer 30 also rises by 5 λ 1 , and opens to a position slightly facing the notch 42 , and overflows to the Λ before the pressure stop stops. A Τ7; the top surface of the bump 16 and the top surface of the conductive layer 30 are adjacent to the notch 42. This may occur if the thickness of the film is slightly larger than that of the vacant hole in the shell. Thus, the adhesive layer 3 is in the squat. The top surface of the convex 彳6 n ι 凸 及 16 and the top surface of the conductive layer 36 form a thin layer of cover. The platen is in contact; the 5 λ +6 1 r μ port stops after touching the bump 16' but continues to heat the adhesive layer 30. The direction in which the adhesive layer 3 flows upward in the notch 42 is as shown by the upward arrow in the figure, and the upward movement/movement of the block 16 and the overhanging platform 18 with respect to the substrate 34 is as shown. The upper arrow is not, and the downward movement of the substrate 34 relative to the bump 16 and the overhanging platform is as indicated by the downward arrow. The adhesive layer 3 in Fig. 4D has been cured. For example, 'the platen continues to clamp the bump 16 and the overhanging platform Μ and heats after stopping the movement', thereby converting the melted (10) (B_stage) epoxy resin into a C-stage - e) cured or hardened epoxy resin . Because of this, the epoxy resin is cured in a manner similar to conventional lamination. After the epoxy resin is cured, the platen is separated to remove the structure from the press. The cured adhesive layer 30 provides a secure mechanical bond between the bumps 16 and the substrate 34 and between the overhanging platform 18 and the substrate 34. The adhesive layer can withstand the normal operating pressure without deformation and damage, and only temporarily twists when subjected to excessive pressure. Further, the adhesive layer 30 can absorb the thermal expansion mismatch between the bump 16 and the substrate 34 and between the overhanging platform 18 and the substrate 34. At this stage, the bumps 16 are substantially coplanar with the conductive layer 36, and the adhesive layer 3 and the conductive layer 36 extend to the top surface of the upward direction. For example, the outer layer 43 201218469 The adhesion layer 3 between the platform 18 and the dielectric layer 38 is 2 microns thicker than the initial level of 250 microns by 50 microns; that is, the bumps 6 are in the through holes. The dry rice, while the wire 34 is lowered by 50 microns relative to the bump 16. The height of the bumps 16 is substantially the same as that of the conductive layer 30 (% micrometer), the micro-magic layer and the lower adhesive layer 30 (200 micrometers). The 350 16 is still located in the center of the opening 32 and the through hole 4. Position and ride 34: away from the (four) layer 30 fills the full gap 42 between the overhanging platform 18 and the substrate 34. For example, the width of the notch 42 (and the Δ block 16 and the substrate 34 ^ adhesive layer 30) is 25 microns ((1〇5〇一刚)/2). The puncture layer μ extends across the dielectric layer π, λ, and the electrocardiogram layer 38 in the notch 42. For the Lu, the adhesion layer % in the notch 42 is y ° and The dielectric layer = layer, which extends in the downward direction and spans the outer sidewall of the indentation 42, also includes a thin top portion of the indentation, which contacts the face of the bump and the top surface of the conductive layer 36 and extends 10 microscopically over the bump 16.

In the structure shown in Fig. 4E, the bumps 16 and the top of the adhesive are removed. The top of the electrical a W = block 16, the adhesive layer 3 , and the conductive layer 36 are polished: the stone is treated with a diamond wheel and distilled water to treat the top of the structure. At first, f only grinds the layer %. Continuous grinding, the surface is moved down and thinned. The micro-τ take diamond wheel will eventually contact the bump 1 导电 with the conductive layer 36 (not necessarily α at the same time), so the p-bend π starts to grind the bump 16 and the conductive layer 36. After continuous grinding, the slabs 16 and 13⁄4 are continuously polished and the conductive layer 36 is thinned by the worn surface. Dirt. f, the thickness of the cloth, and then rinse the structure with distilled water to remove 44 201218469 The above grinding step will grind the top of the adhesive layer 3 to the top of the 6 grinding 15 microns, and the conductive layer micron 'heart block thickness « less pairs of bumps 】 6 or dotted layer 30 has no clear micron. The thickness has been greatly reduced from 50 microns to 35 microns. The conductive layer 36 to the 'bumps' 6, the adhesive layer 3, and the top of the thundering layer 38 are located on the side of the 6 曰 36 series, which is located on the smooth splicing side top surface of the dielectric center of view. The structure indicated by θ has a coating layer 44 and %·ώ m β. It is formed in a convex (four) or a dotted layer 3. And on the conductive layer 36,; = layer (four) shaped bumps 16 and the overhanging platform 18. The fracture layer 46 is formed on the coating layer 44, which is deposited on the convex portion 16, the adhesive layer and the laterally exposed top surface, and is contacted and covered from the electric day 1 toward the cladding layer 44. By. The copper layer of the pattern of ... is 25 microns thick. The coating layer 46 is deposited on the bottom surface of the bump 16 and the overhanging platform, and is in contact with the copper in the direction of the outer direction. The fracture layer 46 is a J 僧 having a thickness of 25 μm. 30 ΓΓElectrical I:: The structure is immersed in the activator solution, so that the adhesive layer can be absorbed by the catalyst. Then, an upper electroless copper ore layer is disposed on the bump 16, the adhesive layer 30 and the conductive layer 36 in a manner of A: the lower-lower electroless steel layer is disposed on the bump and overhang in an electroless ore-free manner to: Second: Then, an upper electroplated steel layer of the second layer 44' is electrically connected to the upper electroless copper layer, and a lower plating layer is formed on the lower electroless copper layer to form a fracture layer 46. The thickness of the electroless steel layer is about 2 micrometers; the thickness of the electroplated copper layer is about 23 micrometers, so the coating layer is 25 micrometers. Thus, the thickness of the bump 16 and the overhanging platform 18 == 45 201218469 the direction increases substantially 'and the thickness of the conductive layer 36 increases substantially in the upward direction. In addition, the pockets 20 are still hollow, and are still exposed outwardly toward the outside so that the bumps 6 are exposed downward toward the outside and continue to extend across the majority of the bumps 16 in the vertical and lateral directions. The cover layer 44 serves as a cover layer for one of the bumps 16, a thick layer for the conductive layer, and a bridge structure between the & block 16 and the conductive layer 36. The gastric coating J is a thickened layer of the bump 16 and the overhanging platform 18. For ease of illustration, the bumps 6' conductive layer 36 and the coating layer are shown in a single layer. Similarly, for ease of illustration, bumps! 6, the outreach platform! The 8 and the coated layer 46 are also shown in a single layer. Since copper is the boundary between the homogenous coating 'bump 16 and the coating material, the boundary between the conductive layer 36 and the coating layer 44, the boundary between the bump 被 ^ coating layer 46, and the boundary between the overhanging platform 18 and the coating layer (both shown in dotted lines) may be difficult to detect or even detect. • Then, the boundary between the adhesive layer and the coating layer 44 is clearly visible. / The coating layers of the structure shown in Fig. 4G are provided with etched resist layers 50 and 52, respectively. The illustrated etch stop layers 50 and 52 are respectively deposited on the coating layers 44 and 46. The photoresist layer is formed by using a dry stamper technique to simultaneously press the photoresist layer to the coating layer 44 by using a hot roller. 46. Wet spin coating and curtain coating are also suitable photoresist forming techniques. The button resist layer 5 is a patterned photoresist layer, and the second resist layer 52 is a patternless light. The resist layer can be used as a resist layer. Move a mask (not shown) to the photoresist layer 5〇, and then change the light-receiving portion of the light to be selectively passed through the mask according to the conventional technique. For the insoluble 46 201218469 solution, the phase (four) liquid removes the unreceived filament soluble resist layer to form a pattern. Therefore, the photoresist layer 2' causes the selected portion of the light to be exposed upwards to the outside. And from the bottom test L 2 to maintain no pattern under the cover and cover the bump 16 from below. 〇52 knife from the structure shown in the two! Figure 2, the conductive layer 36 and the coating layer... Material (4) The pattern defined by the remaining layer 5G of the wire. The u is the front wet chemical touch c, for example, the body is inverted (four) Please go down, the resistance layer 52 is facing up, _= body and = the bottom mouth of the etched layer 50 (not shown) will be broken, and the layer of Na. 5. At the same time, _ face money resistance = The top of the nozzle (not shown) does not tilt. So by (4) by-products, or, a layer of 52 provides two gravity to the engraving. The chemical wheel can be surnamed two: =36, so that the dielectric layer 38 Exposed in the upward direction, thereby converting the original (four) conductive layer 36 and the coating layer 44 into a pattern layer. However, the bump 16 is extended by the platform (4) coating layer 46 and is not affected by the chemical (four) liquid, and the overhanging flat 18 and the covering layer 46 are still It is a non-patterned layer. Therefore, the adhesive layer % is still maintained from above. The exposed outer layer is not facing downward. The electrical layer 38 is only facing upwards: the chemical money engraving suitable for the upper (four) engraving operation and highly selective to copper may be included a gas test solution or a diluted mixture of nitric acid and hydrochloric acid. The chemical solution may be acidic or alkaline. The ideal etching time is sufficient to form a pattern without excessive exposure of the conductive reed 36 and the coating layer 44 to the chemical etching solution. test

S 47 201218469 Mistaken decision. In Fig. 41, the etched layers 5 and 52 on the structure have been removed. The specific resist layer is removed by solvent treatment. For example, the state used: a strong alkaline potassium hydroxide solution. The conductive layer 36 and the coating layer 44 after the pH is 丨4 include the solder terminal 58 and the lid 64. Thus, conductive layer 36 and cladding; 44; 塾 塾 54, routing lines 56, terminals 58 and/or tantalum pads 54, routing lines 56, terminals 58, and cover 36 and selected portions of cover layer 44 are defined. Conductive layer of germanium The pad 54 is a portion of the conductive layer 36 and the cladding layer 44 which is etched by the silver, which is adjacent to the routing line 56 but which is to be protected by the terminal and the conductive layer 36 is held at a distance from the coating layer. The portion of the route is adjacent to the tamping pad 54 and the end = two = protection and is not extended in the etch direction, while the electrical connection & solder pad' pad 54 and terminal 58 are electrically connected to the pad 54 and the terminal 58. 36 and the coating layer 44 are etched. The 58-type conductive layer is so protected from the unbroken portion, and adjacent to the line 56 but kept away from the pad 54. The cover body M is also damaged by the etched layer 5而 and is not 曰 = Μ and self-bump-out, and the bump adjacent to the bump covers the bump... but with the pad 54 and the road; _, routing line 56 and terminal 58 = two sub-58 maintain distance. (35+25). The thickness of the cover 64 is adjacent to the bump ^

The location (this section is the distance from the dielectric, :: = layer J 48 201218469 via 40) is also 25 micron' and is also 6 micron (35 + 25) at the contact dielectric layer 38. The bumps 16 that are thickened by the coating layer 46 include portions of the coating layer 46 that are located within the pockets 20. Similarly, the overhanging platform 8 is thickened by the covering layer 46 and includes the portion of the covering layer 46 outside the recess 20. The base 62 includes a portion of the outwardly extending platform is formed by the metal plate 10, the portion being formed integrally with the projection 16 by the abutment projection 16' and extending from the side of the projection 16. The base 62 also includes a portion of the cover layer 46 that covers the portion of the overhanging platform 18 from below. Therefore, the pedestal 62 abuts the bump 16 and is integrally formed with the bump 16 while extending from the side of the bump ,6 to a thickness of 75 micrometers (150+25). The solder bumps 54, routing lines 56 and terminals 58 together form a wire 70. Thus, the wire 70 includes selected portions of both the conductive layer 36 and the cover layer 44, and the selected portions are spaced from the bumps 16, the pedestal 62, and the cover 64. The wire 7 is located outside the pocket 20. In addition, the routing line 56 forms a conductive path between the pad 54 and the terminal 58. Wire 70 provides horizontal (lateral) routing from pad 54 to terminal 58 via routing line 56. The wire 70 is not limited to this configuration. For example, the conductive circuit may include conductive vias through the adhesive layer 30 and/or the dielectric layer 38, and additional routing lines (which are located above and/or below the adhesive layer 3 and/or the dielectric layer 38). And passive components (such as resistors and capacitors placed on other pads). The bump 16, the base 62 and the cover 64 together form a heat sink 72. Therefore, the heat sink 72 includes the metal plate 10, the conductive layer 36, and the portions of the cover layers 44, 46, and the selected portions are all kept away from the wires 7A. In addition, the bumps 49 201218469 block 16 form a thermally conductive path between the base 62 and the cover body 64. The monthly hot seat 72# is a heat-dissipating block of a shape, which comprises a column (bump) 6), a relatively large lower wing (base 62) and a relatively small wing ( Cover 64). The structure shown in Fig. i is provided with a solder resist green paint 74 on the substrate 34, the wires 70, and the heat sink 72. ' ' The solder resist 74 is an electrically insulating layer having a selected pattern so that the solder bumps 54 , the terminals 58 & the cover 64 are exposed outwardly and cover the routing line 56 from above while covering the dielectric Layer 38 is originally exposed outwardly toward the top. The solder resist green paint 74 is on the solder pad 54, the routing line 56, the terminal 58 and the cover 64, and is slightly Γ (Γ 252) 5. The micron' anti-tank paint 74 extends over the dielectric layer 38. 85 = the paint 74 is initially applied to the structure - the light-developing liquid tree J penetrates through the 1st: the pattern on the solder resist green paint 74' The method is to make the light selection narrow and use the second light to make the part of the light-proof green paint into insoluble, after: (4)-(4) the solution is removed without being exposed to light and still paintable, and finally hard baked, the above steps are The wire 7〇 and the heat sink η of the structure shown in the 4th circle are provided with a multi-layer metal coating with a covered contact point 7 8 as a _ A® Jfl rjh 触 contact copper surface. Therefore, the covered contact 78 contacts the pad 54, covers the exposed portion of the three, 64, and covers the other from the upper ^ and from below. The contact bump 16 and the pedestal are also coated on the exposed copper 2:::2-nickel layer on the electroless surface, and then a silver layer is coated on the nickel layer by electroless 50 201218469 plating. The upper nickel layer is about 3 microns thick, and the silver surface layer is about 5 microns thick. Therefore, the thickness of the coated contact 78 is about 35 microns. The surface treatment with the covered contacts 78 as the bumps 16, the pads 54, the terminals 58, the pedestal 62 and the cover 64 has several advantages. The inner nickel layer provides the primary mechanical and electrical connection and/or thermal connection' while the silver surface provides a wettable surface for solder reflow to match solder and wire. The covered contacts can also protect the wires 70 from the heat sink 72 from corrosion. The overlay contact 78 can include a variety of $ genities to meet the needs of externally coupled media. For example, a gold layer may be coated on the inner layer or a nickel surface layer may be used alone. For convenience of illustration, the bumps 16, the pads W, the end pedestals 62, and the cover 64 provided with the covered contacts 78 are shown as a single layer. The contact block 16, the pole pad 54, the terminal 58, and the convex/recording interface. The boundary between the earth seat 62 and the cover 64 is made of copper to the heat conducting plate 80. The 4th, 4th and 4th drawings respectively道道也> ^ 'For the cross-sectional view, top view and bottom view of the hot plate 80', the edge of the heat-conducting plate 8〇 has been separated along the cutting line from the adjacent heat-conducting plate of the cut = batch. 'Or the same heat conduction The board 80 includes an adhesive layer 30, a substrate 34, a wire 70, and a solder resist green paint 74. The substrate 34 includes a socket 72 and a socket 72. The wire 70 includes a constant rail routing line 56 and a terminal 58. Pads 54, 64. The seat 72 includes a projection 16, a base 62, and a cover = block 16 adjacent the base 于 at the bent corner 24 and the top cover 28 at a position adjacent to the cover 64. The ghost 16 extends from the base 62 molybdenum 6 l + on the one hand, and extends from the cover 02 to the upper direction on the one hand, and is integrated with the base 62 shape 201218469. The projection 16 extends into the opening 32盥After the hole 40 is 'still located in the opening', the central position in the through hole 40. In addition, the outer bump 16 extends above and below the convex layer V丨6 of the dielectric layer 38. And the cover 64 is coplanar with the adhesive layer 30. The old recess 2 is formed, and the recess 2 is covered from above, and has a special irregular thickness of stamping. The bump is also connected to the layer 3 ( (10) The dielectric layer 38 maintains a distance while maintaining a circular cylindrical shape, that is, the bumps 6 are fixed in diameter from the base 62 to the cover 64. Further, the bending angle is: Each of the 22 is still bent inwardly at an angle of about 9 degrees from the adjacent cover 64. The ridged corner 24 is still laterally outwardly bent at an angle of about 9 degrees from the adjacent base 62. And the side wall 26 still vertically separates the f-folded corners 22 and 24. The recess 20 extends into the bump 16 and is covered by the bump 6 from above. The recess 20 faces downward and outwards toward the lower side, causing the convex The portion of the block i6 constituting the recess (9) is also exposed downward toward the outside. Therefore, the recess 2 is hollow and the inlet is not closed and is not covered by the projection 16 from below. The recess also extends into the opening 32 and the through hole 40, And the recess 2 is separated from the cover by the bumps 6. The shape of the concave eight 20 is in conformity with the bumps! 6 that both are fixed diameter cylinders In addition, the recess 20 extends in a vertical and lateral direction across most of the 0 of the bump 16 . The pedestal 62 is located below the adhesive layer 3 , the substrate 34 and the wire 7 . The pedestal 62 contacts the adhesive layer 30 but with the substrate 34 and the cover body to maintain the distance. The base 62 protrudes from the side of the bump 16 and extends beyond the cover body M and the wire 7 while extending to the outer side of the adhesive layer 30 and the substrate 34 in the downward direction, and The wire 70' is covered underneath to support the bump 16, the adhesive layer 3, the substrate 34 and the wire 70. The cover 64 contacts the adhesive layer 3 and the dielectric layer 38' and extends over the two sides 52 201218469. The cover body 64 has a first thickness adjacent to the bump 16 and the cover body 51 adjacent to the dielectric layer 38 has a second thickness greater than the first thickness. The cover body μ has a flat surface with a face-up direction. Further, the cover 64 is adjacent to the adhesive layer and has a first thickness in a portion spaced apart from the dielectric layer 38, and the portion of the cover 51 adjacent to the dielectric layer 3+8 and spaced apart from the adhesive layer 3G has the second thickness. The adhesive layer 30 is disposed on the base 62 and extends above the base Q. The adhesive layer 30 is in contact between the bumps 42 and between the bumps 16 and the dielectric layer %, and fills the space between the bumps 16 and the dielectric layer 38. The adhesive layer % is in contact with the gap material and is located between the pedestal 62 and the dielectric layer 38 and fills the space between the pedestal 介 and the dielectric layer 38. The adhesive layer 3 is also in contact and is located between the base 62 and the cover μ but is spaced from the wire 7G. The adhesive layer 3G;f extends only across the dielectric layer 38 within the gap 42, also between the pedestal 62 and the pad M, between the pedestal "and the routing line 56, and between the pedestal 62 and the end 58". The adhesive layer 3〇 also extends laterally from the bump 16 and over the wire 7. The adhesive layer 3 is cured at this time. The adhesive layer 30 covers in the lateral direction and surrounds the sidewall % of the bump 16 from which the base 62 is located. A portion of the periphery of the periphery of the bump 16 covers the portion of the cover 64 outside the periphery of the bump 16 from below and covers the substrate 34 from below. The adhesive layer 3 is also coated on the sidewall 26 of the bump 16 and the dielectric layer 38. A top surface of the bottom surface 62 is located outside the periphery of the bump 16 and a portion of the bottom surface of the cover 64 outside the periphery of the bump 16. The adhesive layer 30 can pass through the gap between the bump 16 and the dielectric layer 38. An imaginary horizontal line, an imaginary horizontal line between the bump i6 and the cover 64, an imaginary vertical line between the electrical layer 38 of the pedestal 62, and an imaginary vertical line between the pedestal 62 and the cover 64. However, the adhesive layer 30 It does not pass through the imaginary line of the pedestal 62 and the wire 7 〇 '53 201218469 alone. Therefore, 'there is a strip extending from the convex (four) The false 4 horizontal line extending to the dielectric layer only passes through the adhesive layer 3〇, p is between θ any horizontal, vertical and (4) 7G because the false line is in the A block...: the line only passes through the adhesive layer 3° , is bound to pass through the wire 7〇 except through the adhesive layer 'spoon eight 34' is placed on the adhesive layer 3〇, extending above the base 62, and two: = line 7. The dielectric layer 38 is in contact with Located between the adhesive layer 3. between the solder bumps 54, between the == by the wires 56, and between the adhesive layer 3. and the ends. " Electrically contacting the cover 64' but maintaining a distance from the bumps 16 and the base. Pointing on the residence, routing line %, and terminal 58 are all in contact with the dielectric layer 38, and both are spaced from the square = retention distance (4) extending over the (four) layer 30 and the dielectric layer 38 has the same thickness on the two-way tr terminal 58, and The common surface-to-face orientation is the same; in addition, the solder pad 54 and the cover body 64 have a phase-welded disk body 64 adjacent to each other. The thickness of the adjacent bumper 16* is different from that of the solder bump 54. The cover body 64 is co-located. - the top surface facing upwards. 38. After the heat conducting plate 80 is cut, the adhesive layer 30, the dielectric layer 62 and the solder resist 74 are extended to the vertical direction. The interface is ιΓ, ——electricity tailored for semiconductor components such as LED chips. 5=Semiconductor components will be placed above the cover in subsequent processes. Terminal ^ ) ^ ^ 1 ^ ^ ^ ^ ^ Custom-made the printed circuit board or an electric; the lower-layer assembly (such as the surface. The heat sink of the flying electronic attack) is tailor-made for the heat medium 54 201218469 soldering 54 and the top surface of the terminal hot plate 80, For horizontal signal routing. 58 are offset from each other in the horizontal direction, and are exposed to the guide between the semiconductor element and the next layer assembly for convenience of illustration, the line _ poetry, Λ line 7 is in the cross-sectional view Shown as a continuous circuit trace. However, the wire 7 ^ can ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ 丨 』 0 ^ χ χ χ χ 水平 水平 水平 水平 水平 水平 水平 水平 水平 水平 水平 水平 水平 水平 水平 水平 水平 水平 水平 水平 水平 水平 水平 水平 水平 水平 水平 水平 水平 水平 水平 水平 水平 水平A lateral misalignment is formed. The wires 7A and the heat sinks 72 are kept apart from each other, and therefore, the wires 7A are mechanically connected to the heat sinks 72 and electrically isolated from each other. The heat sink 72 can diffuse the semiconductor element which is subsequently disposed on the cover 64, and diffuse the moon into the lower layer of the heat conducting plate 8〇. The thermal energy generated by the I conductor element flows into the human cover 64 and then 'flows the bumps from the cover 64' 6 and enters the pedestal 62 via the bumps 16 and finally scatters from the pedestal 62 in a downward direction, such as diffusion. To a lower heat sink. The bumps 16, the pads 54, the terminals 58, the pedestal 62 and the cover 64 are all of the same metal, i.e., steel/recorded/silver. The bump 16, the pad 54, the terminal 58, the base Μ and the cover 64 are composed of a silver surface layer, an inner copper core and an inner layer, wherein the inner nickel layer contacts and is located on the silver surface layer. Between the inner copper and the inner core. The bump 16, the pad 54, the terminal 58, the pedestal 62 and the cover 64 == the steel core is mainly copper. The silver surface layer and the inner nickel layer are provided by a coated contact 78, and the inner copper core is provided by a plurality of combinations of a metal plate 1 , a conductive layer 36 and a cover 44, 46. The wire 70 includes a solder core Μ, a routing wire 56 and a terminal 58 ϋ田, the inner steel core ′ used, and the heat sink 72 includes an inner copper core shared by the bump 16, the pedestal 62 and the cover 64. In addition, the wire 70 includes a 55 201218469 covered contact 78 disposed on the pad 54 and another covered contact disposed on the terminal 58 , and the heat sink 72 includes a bump 16 and a base 62 . The covered contact (which is spaced from the cover μ) and the other covered contact 78 (1 which is spaced from the bump 16 and the base 62) provided on the cover 64. In addition, the wire 7 turns and the heat sink are composed of copper/recorded/silver' and the inner copper core is mainly copper. Both the bumps 16 of the heat conducting plate 80 and the routing wires 56 are not exposed outwardly. For convenience of illustration, the bumps 16 and the routing lines 56 are shown in dashed lines in the fourth embodiment. The thermally conductive plate 80 can include a plurality of wires 70 comprised of pads 54, routing lines 56, and terminals. For ease of explanation, only the single-wire is described and labeled herein. In such conductors 70, pads 54 and terminals 58 generally have similar shapes and sizes, while routing lines 56 may (but need not) have different routing configurations. For example, portions of the wires 70 are spaced apart from each other and electrically isolated, and the partial wires 70 are staggered or directed to the same pad 54, routing line % or terminal 58 and electrically connected to each other. Similarly, a portion of the pads 54 can be used to receive independent signals, while a portion of the pads 54 share a signal, power or ground. The heat conducting plate 80 is suitable for a LED package having blue, green and red LED chips, wherein each LED chip comprises an anode and a cathode, and each LED sealing body comprises a corresponding anode terminal and cathode terminal, in this example, The thermally conductive plate can include six pads 54 and four terminals 58 for directing each anode from a separate pad W to a separate terminal 58 and directing each cathode from a separate pad to a common ground terminal 58. A simple cleaning step can be used at each stage of manufacture to remove oxides and residues from the exposed metal. For example, a short oxygen plasma cleaning step can be applied to the structure of the present invention. Alternatively, a potassium permanganate solution can be used for the case. The structure is carried out on the second 56 201218469 short wet chemical cleaning step. Similarly, the structure can be rinsed with distilled water to remove dirt. This cleaning step cleans the desired surface without causing significant damage or damage to the structure. The advantage of this case is that the conductor 70 does not need to be separated or separated from the junction or associated circuitry. The confluence point can be separated in the wet chemical engraving step of forming the wire 7〇. The heat conducting plate 80 may include a counter hole (not shown) formed by drilling or cutting through the adhesive layer 3, the dielectric layer 38, the pedestal 62 and the solder resist green lacquer 74. In this way, when the heat conducting plate 80 needs to be disposed on a lower carrier in a subsequent process, the tool pin can be inserted into the alignment hole to position the heat conducting plate 80. The heat conducting plate 80 can accommodate a plurality of semiconductor components instead of a single bump. The bumps can only accommodate a single semiconductor component. Therefore, a plurality of semiconductor elements can be disposed on the single-bump, or a plurality of semiconductor elements can be respectively disposed on the block. If a single bump of the heat conducting plate 80 is to accommodate a plurality of semiconductor components, the residual resist layer 5 can be adjusted to define more wires 7Q. The lateral positions of the turns can be readjusted to provide an array of four semiconductor components. In addition, the cross-sectional shape and height (ie, the side shape) of the wire 70 may also form a plurality of bumps on the heat conducting plate 80 to accommodate a plurality of semiconductor components, which may be stamped with additional bumps 16 on the metal plate. The adhesive sound is adjusted to include more π 32' adjustment substrate 34 to include more vias of the entire etch stop layer 50 to define more covers 64 and wires 7 〇. The lateral positions of the bumps 盖, cover 64 and wires 7〇 can be readjusted to provide an array of W for the four semiconductors. In addition, the shape of the bump 16, the cover 64, and the wire 5 Ί 201218469 may be as follows: (4) mi (four) μ 16 can have a separate base 62 or a common pedestal q, and the etch stop layer 5 2 Design depends. 5 and 5C are respectively a view and a bottom view of a heat conducting plate according to an embodiment of the present invention, and the wires of the heat conducting plate are in contact with the adhesive layer. " In this example, the substrate is provided only by the conductive layer' and no dielectric layer is provided. The relevant statements for 〃 a'g 8G are incorporated in this example and are not repeated. Similarly, the components of the heat conducting plate of this embodiment are similar to those of the guide member 80. The plate 82 includes an adhesive layer 3, a wire 7, a heat sink 72, and a solder resist green paint 74. Wire 70 includes pad 54, routing line % and terminal 58 including bumps 16, base 62 and cover 64. The conductive layer 36 in the embodiment is thicker than the conductive layer W in the previous embodiment. For example, the thickness of the electrical layer 36 is increased from 5 〇 micron to 15 〇, so that the conductive can be prevented. The layer 36 is bent or shaken during handling, and the pad 54, the routing terminal 58 and the cover 64 are thus thickened.

The dielectric layer 38 is omitted, and the 悝埶 悝埶 丄 令 令 令 令 犯 犯 犯 犯 犯 犯 犯 犯 犯 犯 犯 犯 犯The routing line 56 and the terminal 58 are both in contact with the adhesive layer 30 and are located between the base 62 and the wire %. Therefore, (four) layer 3. Can be used alone; true: =1 with one of the imaginary vertical lines of the 54th floor, the Uf' between the base 62 and the routing line 56, and an imaginary vertical line between the base 62 and the terminal 58. Further circuit:: ° has been thickened to fill the gap of the dielectric layer 38, and in response to the increase in the thickness of the itch pad, the terminal 58 and the cover 64, the solder resist green lacquer 58 201218469 is also thickened. The guide plate and the plate 82 are made in a similar manner to the heat conductive plate 80, but must be appropriately adjusted for the conductive screen 36. For example, a metal plate ι () is stamped to form a bump w, an overhanging platform 18, and a recess 20, and then the adhesive layer 30 is placed on the overhanging platform 18, and the conductive layer 36 is separately disposed on the adhesive layer 3''. The adhesive layer is then heated and pressurized to cause the adhesive layer 30 to flow and solidify. The bumps 16' are then adhered to the top surface of the layer and conductive layer 36 to planarize them. Next, the coating material and 46 are placed on the structure. The above steps have been explained in the foregoing. The back layer is etched to form the solder bumps 54, the routing lines 56, the terminals 58 and the body 64: while the overhanging platform 18 and the cladding layer 46 remain unpatterned. The latter formed a solder resist green paint 74 on the top surface, and then surface-treated with the bump contacts Μ as the bump 16, the solder bump 54, the terminal 58, the pedestal 62, and the cover M. Finally, the adhesive layer %, the pedestal a and the solder resist green lacquer 74 are cut or cleaved at the peripheral edge of the heat conducting plate 82 to separate the heat conducting plate 82 from the other heat conducting plates produced in the same batch. 6A and 6C are respectively a cross-sectional view, a top view and a bottom view of a guide plate according to an embodiment of the present invention, which can provide vertical signal routing. In the present embodiment, the terminal system extends below the adhesive layer, and the routing line and the terminal are electrically connected by the covered through hole. For the sake of brevity, the relevant descriptions of the heat-conducting plates are applicable to this embodiment and are incorporated herein. The same description is not repeated. Similarly, the components of the heat transfer plate of the present embodiment are similar to those of the heat transfer plate, and corresponding reference numerals are used. The heat conducting plate 84 includes an adhesive layer 30, a wire 7 and a heat sink to prevent the green paints 74 and 76. The wire 70 includes a pad 54, a route (4), a terminal μ, and a covered via 60. The heat sink 72 includes a bump 16, a base 62 and a cover (4). 59 201218469 The wire 70 can be provided not only through the routing line 56 for horizontal (lateral) routing from the pad 54 to the covered perforation 6 but also through the covered perforation 60. Routing from route line 56 to sub-58 is vertical (top to bottom). Therefore, the routing line 56 forms a conductive path between the crucible 54 and the covered via 6 , and the covered via 6 forms a conductive path between the routing line 56 and the terminal 58 , and the routing line % and the covered via 60 together form a pad. A conductive path between 54 and terminal 58. The solder bumps 54 and the routing wires 56 both contact the dielectric layer 38, both of which are spaced from the adhesive layer 30, and both extend above the adhesive layer 30 and the dielectric layer 38. The terminal 58 contact adhesive layer is spaced from the dielectric layer 38 and extends below the adhesive layer 3A and the dielectric layer 38. The coated vias are in contact with each other and extend through the adhesive layer % and the dielectric layer 38. The pedestal 62 is spaced from the peripheral edge of the thermally conductive plate 84 and does not cover the adhesive layer 30, the substrate 34, the routing wires 56, the terminals 58, the coated perforations 60 or the solder resist green lacquer 74 from below. In addition, terminal 58 and base 62 include selected portions of overhanging platform 18 having the same thickness and co-located on the bottom surface of the structure. The solder resist green paint 74 is an electrically insulating layer having a selected pattern so that the solder pads 54, the covered vias 60 and the cover 64 are exposed outwardly and cover the portion of the dielectric layer 38 that is originally exposed upwards. . The solder resist green paint% is the same as the electrical insulating layer, which has a selected pattern, so that the bump 16, the terminal Μ and the pedestal 62 can be exposed downward toward the bottom, and cover the adhesive layer 3 which is originally exposed downward. . ° The heat conducting plate 84 is fabricated in a similar manner to the heat conducting plate 8〇, but must be appropriately adjusted for the wire 7〇, the heat sink 72 and the solder resist green paint 74 and %. For example, '' the metal plate 1 is pressed to form the bumps 16, the overhanging platform 18, and the recesses 2, and then the 201218469 adhesive layer 30 is placed on the outer flat aw., A. On the 18th, the sub-substrate 34 is placed on the adhesive. Then, the adhesive layer 3 is heated and pressurized to cause the adhesive layer 30 to flow and solidify. Then, the bumps 16, the adhesive layer 3, and the top surface of the conductive layer % are polished and planarized. The above steps have been explained in the foregoing. ', then, through the overhanging platform 18, the adhesive layer 3, the conductive layer 乂 and the dielectric sound 38 to form a hole' and then deposit a conductive metal on the structure, thereby forming a coating layer 44 on the top surface of the body, A coating layer 46' is formed on the bottom surface of the structure, and a covered perforation 6〇 is formed in the hole. Then, an etching resist layer 5 is formed on the coating layer 44 to form a pattern of the soldering line (4) of the routing line 56 and the cover 64, from the "outer layer 44". Further, a resist layer 52 is formed on the coating layer 46 to form a pattern of the terminal 58 and the pedestal 62, thereby exposing selected portions of the covering layer 46, and then (4) the conductive layer 36 and the covering layer 44 to form a resist layer. . :. The pad 54, the routing line 56, and the cover 64 further expose the dielectric layer % upwards to the exposed surface without exposing the adhesive layer 30 upward. The wire is overstretched to form a layer 58 and a pedestal defined by the etched layer 52. The adhesive layer 30 is exposed outwardly but does not expose the dielectric layer 38 toward the second. The terminal 58 and the pedestal 62 includes a portion of the overhanging platform δ δ and the cover layer μ that are protected by the etched layer 52 and are not engraved by the surname, the selected portions being spaced apart and spaced apart from each other (four). In particular, the terminal 58 includes an overhang: 18 mesh = part, this part is separated from the bump 16 and keeps a distance. One of the bases extends to a part of the platform 18, but this part is adjacent to the bump 16, and is integrally formed with the bump, and the self-bump 16 The side is stretched out, and then formed on the top surface of the structure to form an anti-mite green paint 74, °. The body of the body 61 201218469 The bottom surface forms a solder-proof green paint 76. The top and bottom of the structure are protected by a light paint 74 76 is initially applied to the patterning method to make the light: the resin is formed after the 'resistance', and part of the solder resist green paint becomes impossible (4) '4 over-mask (circle not shown)' to receive light and still The soluble part of the solder mask Μ' then uses the 'developing solution to remove unskilled technology. Finally, the hard baking 1 step is followed by the coating contact 78 as the λ secret κ # ^ horse bump I6, the pad 54, the terminal 58, the covered perforation 60, the pedestal 62 and the cover 4 Finally, at the peripheral edge of the guide plate 84, the green paint 74 and 76 are cut, so that the rail plate 84: the layer 3, the dielectric layer 38 and the solder resist (4) plate 84 - the other batch (4) Separation of the board. The smart and 7C diagrams are respectively the core diagram, the view and the bottom view of the guide slab in the invention-embodiment, and the heat conducting board can provide vertical signal routing. In this embodiment, the terminal system extends over Under the adhesive layer, the route is omitted, but the covered perforation is additionally provided to provide electrical connection between the soldering ring and the terminal. For the purpose of the description of the heat-conducting plate 80, the relevant description is applicable to the embodiment. The description of the heat conducting plate of the present embodiment is similar to that of the heat conducting plate 80. The heat conducting plate 86 includes an adhesive layer 30, a wire 7 and a heat sink 72. 7〇 includes a pad 54, a terminal 58 and a covered perforation 60. The heat sink 72 includes a bump 16, a base 62 and a cover Body 64. Conductor 70 can provide not only horizontal (lateral) routing from pad 54 to coated vias 6 but also vertical (top to bottom) routing from pad 54 to terminal 58 via covered vias 60. The coated vias 6 are formed to form a conductive path between the pads 54 and the terminals 58. 62 201218469 The solder pads 54 contact the dielectric layer 38' and the adhesive layer 30 remain above the adhesive layer 30 and the dielectric layer 38. _ The scorpion 58 contacts the adhesive dielectric layer 38 to maintain a distance and extends over the puncturing layer 3() and the contact layer 6G of the two coated vias and extends through the adhesive layer % and the dielectric layer pedestal a = and = 486 The peripheral edge maintains a distance and does not cover the "layer, substrate 34, pad 54, terminal 58 or covered perforations 6" from below. In addition, the terminal

58 and base 62 include selected portions of the overhanging platform 18, having the same thickness, and co-located on the underside of the structure. 'X Since this (4) is not equipped with anti-welding, the green paint 74' is covered with 85% to 95% of the top surface of the snack board 86. The covered point 78 also provides a highly reflective top surface that reflects the light emitted by the coffee day and day film that is subsequently placed on (4) 64. The heat conducting plate 86 is fabricated in a manner similar to the heat conducting plate 8A, but must be appropriately adjusted for the wire 70 and the heat sink 72. For example, the metal plate 1 is stamped to form a projection i6, an overhanging platform 18, and a recess 2, and then the adhesive layer 3 is placed on the overhanging platform 18, and the substrate 34 is placed on the adhesive layer 3''. Then, the adhesive layer 30 is heated and pressurized to cause the adhesive layer 3 to flow and solidify. Then, the top surfaces of the bump 16, the adhesive layer 3G, and the conductive layer 36 are polished to be planarized. The above steps have been explained in the foregoing. Next, the overhanging platform 18, the adhesive layer 30, the conductive layer 36, and the dielectric layer 38 are drilled to form holes, and then conductive metal is deposited on the structure. Thus, a coating layer 44 is formed on the top surface of the structure, in the structure. A coating layer 46 is formed on the bottom surface, and a covered perforation 60 is formed in the hole. Then, a resist layer 5 is formed on the cladding layer 44 to form a pattern defining the pad 54 and the cap 64 to expose selected portions of the cap layer 44. 63 201218469 An etch stop layer 52 is further formed over the cladding layer 46 to form a pattern </ RTI> defining the terminal u and the pedestal 62 to expose selected portions of the cladding layer 46. Then, the conductive layer 36 and the coating layer 44 are formed to form the pad w and the lid 64' defined by the etching resist layer 5, and the dielectric layer 38 is exposed outwardly outward without exposing the adhesive layer 30 upward. The overhanging platform 18 and the cladding layer are further etched to form the terminal 58 and the pedestal 62 defined by the etch stop layer 52, thereby exposing the adhesive layer 3 () toward the direction; but not exposing the dielectric layer 38 downward. The terminal 58 and the pedestal 62 comprise a portion of the overhanging platform 18 and the covering layer 46 which are etched by the etching resist layer. The receiving portion is used to close the material distance. In detail, the end? 58 includes a portion of the overhanging flat 18 that separates and maintains the distance; the base 62 also includes a portion of the overhanging platform 8 but this portion is adjacent to the bump 1 6, and the disc is said to be 1 6 A, BA, /, and ϋ are now integrated into one and extend out from the side of the bump 16. Next, the bumps 78 are used as the bumps 16 'pad Μ, the terminal 58, the covered vias 60, the pedestal 62 and the lid 64 for surface treatment. Finally, the adhesive layer 3 and the dielectric layer 38 are cut or cleaved at the peripheral edge of the heat conducting plate 86 to separate the heat conducting plate 86 from the other heat conducting plates produced in the same batch. Sections 8, 8 and 8C are respectively a cross-sectional view, a top view and a bottom view of a heat conducting plate according to an embodiment of the present invention, the heat conducting plate having a closed recess containing a filler. In this embodiment, the filler is first filled into the recess, and the adhesive layer is placed on the extension platform and the recess is closed by the base. For the sake of brevity, the description of the heat conducting plate (10) is applicable to this embodiment, and the same description will not be repeated. Similarly, the components of the heat conducting plate of this embodiment are similar to those of the heat conducting plate 8 64 64 201218469. The heat conducting plate 88 includes an adhesive layer 3Q, a substrate 34, a filling (4), a wire 7A, a dispersion, a seat 72, and a solder resist green paint 74. The substrate Μ contains a dielectric layer %. The wire package 3 is soldered 54, the routing line 56 and the terminal 58. The heat sink 72 includes a bump 6 and a cover 64. The filler 48 is an electrically insulating epoxy which is located in the recess 20 and fills the recess 2' and the recess 20 is no longer empty once the filler 48 is loaded. Filling the bumps 16 into the recesses 18 and contacting the bumps 16 extends across the vertical and lateral directions across most of the bumps 16. The filler 48 also covers the recess 20 from below and maintains a distance between the adhesive layer 3G, the substrate 34, the cover 64 and the wire 7Q while providing mechanical support for the bump 16. Further, the base 62 seals the recess 20. Therefore, the filler 48 contacts the bump 16 and the pedestal 62 and is surrounded by the bump 16 and the pedestal 62. The pedestal 62 further covers the bump 16, the recess 20, the filler 48 and the cover from below. 64. With the brothers 48, the guide plate I is made in the same way as the heat transfer plate 8〇, but it must be adjusted for the filler. For example, the metal plate is first stamped to form the bump Μ And the pocket 2〇 a. Then 'the filler 48 is formed in the pocket 20&quot; the true filling material is originally one: 虱 resin reward' and is selectively printed in the pocket by screen printing. Epoxy resin paste 'make it at a relatively low temperature (such as 19 〇. under the enamel hardening: grinding the filler 48 to form a plane. For example, rotating the diamond wheel * and Luo Gu water treatment of the bottom of the structure. At first, diamond The grinding wheel only grinds the filler = ° continuous grinding 'the filler 48 becomes thinner due to the upward movement of the ground surface. Diamond sand Will contact the overhanging platform i 8 'and also begin to grind the overhanging platform ^ 8. Continue to study 65 201218469 rear extension platform] 8 and filler 48 grinding until the removal of the required u surface loading (4). #冰占1 is again..., 'after washing the structure with Luo distilled water to remove the septic temple' outreach platform 丨8 and fill the smooth splicing side of the bottom surface. Commonly located - face down === adhesive layer 3G is set outside Extending the platform 丨8, and heating and pressing the substrate 30 on the substrate 30, the adhesive layer is heated and pressurized, and the adhesive layer is parallelized and then the bumps 16, the adhesive layer 30 and the conductive layer 36 are surfaced. A conductive metal is deposited on the structure to form a coating "', 46 wherein the coating 46 is attached to the filler 48 and the filler is covered from below. Thus, the idtr arrow a /1 /: / - The cover layer 46 (or even the pedestal 62) closes the recess 20 and seals the filler 48 in the recess 2. Then the conductive layer 36 and the cover layer 44 are surnamed to form the cymbal pad 54 and the routing line. 56, the terminal 58 and the cover 64, at the same time, the overhanging platform 18 and the covering layer 46 remain in a state of no pattern. Then in the structure The top surface is formed with a solder resist green paint and the surface is treated by the solder joint 54, the terminal 58, the base 62 and the cover 64. Finally, the adhesive layer 30 is cut or split at the peripheral edge of the heat conductive plate 88. The dielectric layer 38, the pedestal 62 and the solder resist green lacquer 74 separate the heat conducting plate 88 from the other heat conducting plates produced in the same batch. FIGS. 9A, 9B and 9C are respectively sectional views of a heat conducting plate according to an embodiment of the present invention. The top plate and the bottom view, the heat conducting plate has a closed cavity containing a filler. The present embodiment is to fill a cavity with a filler after the adhesive layer is cured, and close the cavity with the base. For the sake of brevity, the description of the heat-conducting plate 8 is applicable to the embodiment. The same description will not be repeated. Similarly, the elements of the heat conducting plate of the embodiment of the present invention are similar to those of the heat conducting plate 80, and the corresponding reference numerals are used. / The heat conducting plate 9G includes an adhesive layer 3G, a substrate 34, a filler 48, a wire 7A, a heat sink 72, and a solder resist green paint 74β substrate 34 including a dielectric layer 38. The wire contains a weld oath 54, a routing wire 56 and a terminal 58. The heat sink 72 includes a bump 16, a base 62 and a cover 64. The filler 48 is an electrically insulating epoxy which is located in the recess 20 and fills the recess 20' and the recess 2 is no longer hollow after being filled with the filler 48. The filler is placed in the concave contact bump 16 and extends in the vertical and lateral directions 5 = most of the block 16. The filler 48 also covers the recess from below and maintains a distance from the adhesive layer 30, the substrate 34, the 筌·!* κ增 &amp; ^ J4 cover 64 and the conductor 70 while providing mechanical support for the bumps 16. In addition, the base 62 seals the pockets 2〇. Because the contact bump 16 and the pedestal ... are surrounded by the bump 16 and the pedestal 62. The pedestal 62 further covers the bump 16 , the recess 2 , the filler 48 and the cover 64 from below. The manufacturing method of the plate 90 is 48% - -3⁄4 ^... The plate 80 is similar, but must be properly adjusted for the filler 48. For example, the medium pressure 卬魇 metal plate 10 to form the bump 16, overhang, 1 8 and concave 8 2, and then set the adhesive layer 3〇 on the outreach platform],

The substrate 34 is placed on the mark @1L Μ, and then the adhesive layer 30 is heated and dusted to cause the adhesive layer 30 to flow and solidify. ‘then’ to make the filler 48 in the pocket? η &amp; 士, π ^ production window heart shape. The filler 48 was originally - % rolled and was poorly printed and selectively printed in the pockets 20 by screen printing. Connect: heat the epoxy paste to make it hard at a relatively low temperature (such as _ under hardening. Then grind the filler 48, so that #亚品., more, 'forms a plane. For example, rotating diamond wheel 67 201218469 and steaming water The bottom of the structure is treated. Initially, the diamond wheel only grinds the filler 48 for continuous grinding, and the filler 48 becomes thinner as the surface is moved upwards. The diamond wheel will eventually contact the overhanging platform 18 and also begin to grind the overhanging platform. After continuous grinding, the overhanging platform 8 and the filler 48 are both thinned by the upward movement of the surface to be polished. The grinding is continued until the required thickness is removed, and then the structure is washed with steaming water to remove the dirt. The overhanging platform 18 and the filler 48 are located on the side of the smooth splicing side of the side in the downward direction. The grinding operation is also applied to the top surface of the bump 16, the adhesive layer 3 and the conductive layer % to planarize it. A conductive metal is deposited on the structure to form cladding layers 44 and 46, wherein the cladding layer 46 is attached to the filler 48 and covers the filler 48 from below. Thus, the cladding layer 46 (or even the pedestal 62) will The pocket 20 is closed and the filler 48 The conductive layer 36 and the coating layer 44 are etched to form the pad 54, the routing line 56, the terminal 58 and the cover 64. At the same time, the overhanging platform μ and the covering layer 46 are maintained. The state of the pattern is not formed. Then, the solder resist green paint 1 is formed on the top surface of the structure, and the solder bumps 54 are used as the solder pads 54, the terminals 58, the pedestal &amp; and the cover body: surface treatment. Finally 'on the heat conduction plate Cutting or splitting at the peripheral edge of 9(): layer 30, dielectric layer 38, pedestal 62 and solder resist green paint 74, separating the heat conducting plate from other heat conducting plates produced in the same batch. 10A 10B and 10C 1 is a cross-sectional view, a top view, and a bottom view of a guide plate according to an embodiment of the present invention. The heat conductive plate has a filler: a non-closed cavity. This embodiment deposits a conductive metal on the structure to form a coating. The layer will be filled with a filling of 68 201218469, and the shape of the heart will remain unclosed. For the sake of simplicity, the description of the heat-conducting plate 80 will not be repeated. Similarly, this embodiment is based on her. For example, the components of the heat conducting plate are similar to those of the guiding plate 80, and the corresponding reference numerals are adopted. The heat conducting plate 92 is covered with (4) 3Q, the substrate (four) seat 72 and the solder resist green paint 74. The substrate 34 comprises a dielectric layer %. The conductive wire 7 is covered with a solder pad 54, a routing line 56 and a terminal 58. 62 ^ 1 Μ 64 〇匕 5 bump 16 base filler 48 is an electrically insulating epoxy resin, which is located in the pocket 2 且 and fills the hole 20 ′ - the pocket 2 〇 _ after loading the filling material It is no longer hollow. Fill the 'Μ Μ Μ contact bump Μ ' and extend in the vertical and side direction across the majority of the bump 16 a filler 48 door B and adhesive layer; 〇, substrate 34, cover 64 and ::: Square... 2°, and cover 64 and wire 70 to keep the distance, at the same time for the bump! 6 provides mechanical cutting. In addition, the filler 48 is exposed to the outside by the fact that the 2 () material is not closed. ~ 48 into the heat conduction two production method is similar to the heat transfer board 8〇, but the butterfly, the shape is 1. For example, the metal plate 1G is stamped to form a bump μ, an overhang σ 18 and a concave yoke 20, and then the adhesive layer 3 is placed on the overhanging platform 8 to be placed on the adhesive layer 30. Then, the adhesive layer 3 is heated and the layer 3 is flowed and solidified, and then the top surfaces of the bump 16, the adhesive layer 3, and the conductive layer 36 are polished to be planarized. A tantalum conductive metal is then deposited over the structure to form cladding layers 44 and 46. The above steps have been explained in the foregoing. Then, the filler 48 is formed in the pocket 2G. The filler 48 was originally an epoxy resin f' and was selectively printed in the pocket Μ 69 201218469 by screen printing. The epoxy paste is then heated to a relatively low temperature (e.g., %) and then the filler 48 is ground to form a plane. For example, to rotate the diamond stone &gt; 'round and (4) water to treat the bottom of the structure. , the diamond grinding wheel only grinds the filler 48 ^ continued grinding, then the filler _ the surface is moved up and thinned. The diamond stone wheel will eventually contact the coating layer 46, and also begin to grind the coating layer ^. After grinding, cover Both the layer 46 and the filler 48 are thinned by the upward movement of the surface to be abraded. The grinding continues until the desired thickness is removed, and (4) the water rinses the structure to remove the dirt. At this time, the coating layer 46 and the filler 48 are co-located on one side. The lower side is smoothly spliced to the lateral bottom surface. Then, the conductive layer 36 and the cladding layer 44 are etched to form a pad ", a routing line %, a terminal 58 and a cover 64, while the overhanging platform and the covering layer 46 are maintained. The state of the money case. Then, the solder mask green paint 7\ is formed on the top surface of the structure body, and the surface of the solder bump 54, the terminal portion 62, the base 62 and the cover body 64 are treated with the covered joint 78. Finally, the heat conduction is performed. Cutting or splitting the adhesive layer 30 at the peripheral edge of the plate 92, The electrical layer 38, the pedestal 62 and the solder resist green lacquer 74 separate the heat conducting plate % from the other heat conducting plates produced in the same batch. The 11A, 11B and 11C are respectively a cross-sectional view and a top view of a heat conducting plate according to an embodiment of the invention. And the bottom view 'the heat conducting plate has a raised edge. In the embodiment, a raised edge is disposed on the solder resist green paint. The relevant description for the heat transfer plate 8〇 is applicable to this embodiment. The same description is not repeated. Similarly, the components of the heat conducting plate of this embodiment are similar to those of the heat conducting element 80. The heat conducting plate 94 includes the adhesive layer 30, the substrate 34, and the raised edge 68. The wire 70, the heat sink 72 and the solder resist green paint 74. The substrate 34 includes a dielectric layer 38. The wire 70 201218469 〇匕δ烊 pad 54, the routing line 56盥 + #为+甘—子58° heat sink 72 includes The bump 16, the base 62 and the cover 64. The edge 68 is a square frame that contacts the solder resist green paint 74 and extends over the solder resist green paint 74. Both the bump 16 and the cover 64 are located on the periphery of the raised edge (four) The inner position is inside, and the terminal 58 is located outside the periphery of the raised edge 68. The height of the raised edge 68 is 600 μm, the width (the distance between the inner side wall and the outer side wall) is 5 〇 0 μm, and the lateral distance between the ridge edge 68 and the pad 54 is also 500 μm. The edge, '彖68 contains a solder resist green paint, a stack of composites and a braided adhesive; θ : ', more than the illustration 'the raised edge 68 is only shown in the figure as a single layer. The solder resist green paint contacts the laminate and extends Above it, thus forming a top surface. The film = adhesively contacts the laminate and extends below it, thereby forming a bottom surface. The laminate body contact 1 is pressed against the solder resist green paint and the film-like adhesive Glue ^ The anti-weld green paint ° Hai vertical composite and the film adhesive are electrical insulators. For example, the solder resist green paint is 50 microns thick, the laminate is 5 microns thick, and the film adhesive is % micron thick, so the height of the raised edge 68 is 600 microns (50 + 500 + 50). The abundance can be a variety of dielectric films made from a variety of organic and inorganic electrical insulators. For example, the laminate may be a polyimine or an FR-4 epoxy resin, but other epoxy such as polyfunctional and bismaleimide-triazabenzene (BT) may also be used. Alternatively, the raised edge 68 can comprise a metal ring disposed on the film-like adhesive. The 'hot plate 94 is produced in a similar manner to the heat transfer plate 80, but must be appropriately adjusted for the ridges and ridges. For example, the metal plate 1 is stamped to form the bump 16, the overhanging platform 18, and the recess 2, and then the adhesive layer 3 is placed on the overhanging platform i 8 201218469, and the substrate 34 is placed on the adhesive layer 3〇. The upper layer is then pressed (4) and pressurized to cause the adhesive layer 30 to flow and solidify ^3. And electrically conductive ... top surface, making it flat (four) layer of electrical metal to form coating layers 44 and 46. The above steps are all in the previous section. Then, the conductive layer 36 and the coating layer 44 are formed to form the routing line 56, the terminal 58 and the cover 64. At the same time, the overhanging platform 18 and the μ 46 remain unpatterned. Next, a solder resist green lacquer 74 is formed on the top surface of the structure, and a raised edge 68 is provided on the solder resist green paint 74, and then (4) (four) 78 is used as the bump 16, the pad 54, the terminal 58, the base Q and the cover. Body (four) line surface treatment. Finally, the adhesive layer 3, the dielectric layer 38, the pedestal 62 and the solder resist green lacquer 74 are cut or cleaved at the peripheral edge of the heat conducting plate 94 to separate the heat conducting plate 94 from the other heat conducting plates produced in the same batch. 12, 12, and 12C are respectively a cross-sectional view, a plan view, and a bottom view of a semiconductor wafer package in the embodiment of the present invention, the semiconductor wafer package including a heat conducting plate, a semiconductor element, and a package material. In this embodiment, the semiconductor component is a blue-emitting LED chip that is disposed on the cover body and electrically connected to the solder bump and thermally bonded to the cover by a solid material. The sinusoidal LED chip is covered by a packaging material that converts blue light into white light. The semiconductor wafer package 100 includes a heat conductive plate 80, an LED wafer 1 2' wire 104, a die bonding material 106, and an encapsulating material 108. The LED chip 1〇2 includes a top surface no, a bottom surface 112, and a wire bonding pad U4. The top surface 11 is an active surface and includes a wire bond pad 1 14 'the bottom surface 1 1 2 is a thermal contact surface. The LED chip 102 is disposed on the heat sink 72, electrically connected to the wire, 72 201218469 and thermally coupled to the heat sink 72. In detail, [ED wafer 102 is disposed on the cover 64 (or even the bumps 6), on the opposite side of the recess 2〇, and extends over the cover 64 (ie, the bumps 16 and the recesses 2) Above the ,), and overlapping the bump 16, the recess 20 and the cover 64 (i.e., laterally extending in the periphery of the bump 丨6, the recess 2〇 and the cover 64), but not overlapping the substrate 34 and the wire 7〇 (that is, the LED chip 1〇2 is located outside the periphery of the substrate 34 and the wire 7〇). The LED wafer 102 is routed through! The crucible 4 is electrically connected to the pad 54 and thermally bonded via the die bonding material 1 〇6 and mechanically adhered to the cap 64. In addition, the cover 64 covers the led wafer 102 from below and provides a recessed wafer holder and a reflector for the LED wafer 1A. For example, the bonding wire 104 is connected to the electrically-bonded bonding pad 54 and the bonding pad 114' to electrically connect the LED chip 1〇2 to the terminal 58. The die bonding material 1〇6 contacts and is located between the cover 64 and the thermal contact surface 112 while thermally bonding and mechanically bonding the cover 64 to the thermal contact surface 112, thereby thermally bonding the lED wafer 1〇2 to the bump 1 6. The LED chip i 〇 2 is further thermally coupled to the pedestal 62. The encapsulating material 108 is a solid electrically insulating protective covering for converting color, which can provide environmental protection against moisture and anti-grain for the LED chip 1 〇 2 and the wire 1 〇 4. Package material contact pad 54, routing line 56, cover 64, solder resist green paint 74, LED chip 1 〇 2, wire 1 〇 4 and solid crystal material, but with bump 16, adhesive layer 3 介, dielectric Layer 38, terminal 58 and pedestal 62 maintain a distance. Further, the encapsulating material 1〇8 covers the bumps 16, the pads 54, the cover 64, the LED chips 102, the wires 1〇4, and the die bonding material 1〇6 from above. The encapsulating material 1〇8 is transparent in the figure for convenience of illustration. It is known that the upper/lower coated metal contacts are used to facilitate the transfer bonding with the wire 1 to improve the signal transmission from the wire 70 to the LED chip 102. The cover body 73 201218469 64 is also provided with a nickel/silver coated metal pad for stable bonding with the die bonding material 1 〇6, thereby improving heat transfer from the LED chip 1〇2 to the heat sink 72. The cover 64 also provides a highly reflective surface that reflects the light from the LED chip 1 射 2 toward the silver surface layer, thereby increasing the amount of light exiting in the upward direction. In addition, since the shape and size of the cover 64 are matched with the thermal contact surface U2, the shape and size of the bump need not be matched with the thermal contact surface; 112. The LED chip 102 can emit blue light and has high luminous efficiency. And forming a compound semiconductor of a pn junction. Suitable compound semiconductors include gallium nitride (GaN), gallium arsenide (GaAs), gallium phosphide (GaP), gallium arsenide (GaAsp), and aluminum gallium phosphide (GaAlP). 'GaAiAs, Indium Phosphide (ίηρ) and InGaP) In addition, the LED wafer has a high light output but also produces thermal energy. The encapsulant 108 contains transparent epoxy resin. And a yellow phosphor (not shown as a black dot in the drawing 2a). For example, the epoxy resin may be a polydecane resin, and the yellow phosphor may be a yttrium-doped aluminum garnet ( Ce:YAG) fluorescent powder. The yellow phosphor emits yellow light when it is irradiated with blue light, and the blue and yellow light mixes to form white light. Therefore, the encapsulating material 108 can convert the blue light emitted by the LED chip j 〇2 into white light. The group 100 is made into a white light source. In addition, it is called a hemispherical dome shape, which can be mentioned. For the convex-convex refracting surface, the white first direction is concentrated. If a semiconductor wafer package is to be fabricated, the LED wafer 102 can be disposed on the cover 64 by using a solid crystal material 〇6, and then the bonding pads 54 and the bonding wires are bonded. The junction 114' finally forms the encapsulating material 1 〇 8. For example, the solid crystal material 106 is originally a silver-containing epoxy resin 74 201218469 paste with high thermal conductivity and is selectively printed on the cover by screen printing. 64. Then using the grab head and an automated pattern recognition system, the LEd 曰: sheet 102 is placed on the 6 ϊ ϊ ϊ 银 银 。 。 。 。 。 。 。 。 。 。 。 。 It is relatively low temperature (such as _. 〇 T hardening to complete the solid 曰曰曰 1 〇 6. Line 104 is the gold wire, which is then connected to the bonding pad 54 and the wire bonding pad U 4 by thermal ultrasonic. Finally, the packaging material] The 晶片8 is molded on the structure. The LED chip 02 can be electrically connected to the pad 54 through a plurality of bonding media, thermally bonded by a plurality of thermal adhesives and mechanically adhered to the heat sink 72, and packaged in a plurality of packaging materials. The semiconductor wafer package 100 is a first-order single crystal 13A, 13B and 13C are respectively a cross-sectional view, a top view and a bottom view of a semiconductor wafer package according to an embodiment of the present invention, the semiconductor wafer package comprising a heat conducting plate for providing vertical signal routing, and a semiconductor component. And a package material. In this embodiment, the terminal extends below the adhesive layer and omits the routing line, but is additionally provided with a covered via to provide electrical connection between the pad and the terminal. The description of the application of this embodiment is incorporated herein, and the same description is not repeated. Similarly, the components of the group of the embodiment are similar to those of the component of the group 1 Reference number, but the base of its code is changed from 100 to 200. For example, LED chip 202 corresponds to LED wafer 1〇2, wire 204 corresponds to wire 104, and so on. The semiconductor wafer package 200 includes a heat conducting plate, [ED wafer 202, wire bonding 204, die bonding material 206, and encapsulating material 208. The LED wafer 202 includes a top surface 210, a bottom surface 212, and a wire bonding pad 214. The top surface 21 is an active surface and comprises 75 201218469 which is bonded to the wire 70, and the wire connection 214 'the bottom surface 212 is a thermal contact surface. The LED chip 202 is disposed on the heat sink 72, and the battery 202 is disposed on the cover and thermally coupled to the heat sink 72 via a die bonding material. In detail, the LED wafer body 64 is electrically coupled to the pad 54 206 via the wire 204 and thermally bonded to the cover 64. The aa encapsulating material 208 contacts the dielectric layer 38, the pad 54, the cover 64, the sheet 202, the bonding wires 204, and the die bonding material 2〇6, but with the bump i6, the adhesive layer % terminal 58, the covered via 60, and the pedestal 62. keep distance. In addition, the encapsulating material 208 covers the bump 16, the cover 64, the LED chip 2, the wire (10), and the die bonding material 206 from above. The LED chip 202 emits blue light, and the encapsulating material 2〇8 converts the blue light into white light, making the assembly 200 a white light source. If the semiconductor wafer package 2 is to be fabricated, the LED wafer 202 can be placed on the cover 64 by means of a die bonding material 2, 6, and then the bonding pads 54 and the bonding pads 214' can be wire bonded to form the encapsulating material 208. The semiconductor wafer package 200 is a first-level single crystal package. 14A, 14B and 14C are respectively a cross-sectional view, a plan view and a bottom view of a semiconductor wafer package in accordance with an embodiment of the present invention, the semiconductor wafer package including a heat conducting plate having a raised edge, a semiconductor component and an upper cover. In this embodiment, the upper cover is placed on the ridge edge&apos; while the packaging material is omitted. For the sake of brevity, the description of the group is applicable to this embodiment and the same description will not be repeated. Similarly, the components of the group of the embodiment are similar to those of the component 100, and the corresponding reference numerals are used, but the base of the code is changed from 100 to 300. For example, the LED chip 3〇2 corresponds to the led曰 76 201218469 piece l〇2 'the line 304 corresponds to the line i〇4, and so on. The semiconductor wafer package 300 includes a heat conducting plate 94, an LED chip 302, a wire bonding 3〇4, a die bonding material 306, and an upper cover 316. The LED chip 3〇2 includes a top surface 3丨〇, a bottom surface 3 1 2 and a wire bonding pad 3 1 4 . The top surface 310 is an active surface and includes a wire bond pad 314, and the bottom surface 312 is a thermal contact surface. The LED chip 302 is disposed on the heat sink 72, electrically connected to the wire 7〇, and thermally coupled to the heat sink 72. In detail, the LED chip 302 is disposed on the cover 64, electrically connected to the pad 54 via the bonding wire 304, and thermally coupled via the die bonding material 306 and mechanically adhered to the cover 64. The upper cover 316 is a glass plate and is disposed on the raised edge 68, thereby forming a ceremonial enclosure surrounding the LED chip 3〇2 and the wire 3〇4 on the opposite side of the cavity 20. The LED chip 302 and the wire bonding 304 provide environmental protection such as moisture-proof fishing and anti-particles. Further, the upper cover 316 is transparent and cannot be converted into a light color. The LED chip 302 emits white light which can pass through the upper cover 316 to emit light, so that the assembly 300 becomes a white light source. If the semiconductor wafer package 3 is to be fabricated, the LED wafer 302 can be disposed on the cover 64 by using the die bonding material 3〇6, and then the bonding pad 54 and the bonding pad 314 are finally wired and the upper cover 316 is finally placed on the ridge. On the edge 68. The semiconductor wafer package 300 is a first-level single crystal package. 15A, 15B and 15C are respectively a cross-sectional view, a plan view and a bottom view of a semiconductor wafer package in accordance with an embodiment of the present invention, the semiconductor wafer package including a heat conducting plate and a semiconductor component having a back contact. The semiconductor component in this embodiment is a -led cracker instead of an LED crystal 77 201218469. Further, the semiconductor element is disposed on the heat sink and the wire, and is superposed on the heat sink and the wire □ while being electrically connected to the pad through the solder and thermally coupled to the cover through the other solder. The semiconductor wafer package 400 includes a heat conducting plate 80, an LED sealing body 402, and solders 404, 406. The LED package 402 includes an LED wafer 408, a pedestal 410, a wire 412, electrical contacts 414, thermal contacts 416, and encapsulation material 418. The LED chip 408 includes a wire bonding device (not shown) electrically connected to one of the pedestals 4 1 0 (not shown) via the wire 4 j 2 , thereby electrically connecting the LED chip 408 . Connected to electrical contact 414. The LED chip 408 is disposed on the susceptor 410 through a die attach material (not shown) while being thermally bonded and mechanically adhered to the pedestal 41 0 to thermally bond the LED chip 408 to the thermal contact 416. The pedestal 410 is a ceramic block having low conductivity and high thermal conductivity, and the contacts 414 and 416 are h-covered on the back surface of the pedestal 41 0 and protrude downward from the back surface of the pedestal 41 〇. Further, the 'LED wafer 408 is similar to the wafer 1 〇 2, the wiring 412 is similar to the wiring 104, and the encapsulating material 418 is similar to the encapsulating material 1. The LED package 402 is disposed on the wire 70 and the heat sink 72, electrically connected to the wire 70, and thermally coupled to the heat sink 72. - is disposed on the pad or even the substrate 34) and the cover 64 (ie, the convex block 16), extending over the pad 54 (or even the substrate 34) and the cover material (even to the bump 16 and the recess 2) Above the ,), and covering the bump 16, the recess 2, the pad 54 and the cover 64 from above (that is, laterally extending in the periphery of the bump 16, the recess 20, the pad 54 and the cover 64) ), but does not overlap the terminal 5 "that is, the (four) package 402 is located outside the periphery of the end 58). The coffee package system is electrically connected to the solder bump 54' via solder 404 and is soldered via soldering iron 78 201218469 For example, the solder 404 contacts and is located between the pad 54 and the electrical contact 414, and electrically and mechanically bonds the pad 54 to the electrical contact 4 1 4 , thereby electrically connecting the LED chip 408 Connected to the terminal 58. Similarly, the solder 4〇6 contacts and is located between the cover 64 and the hot junction 416' while thermally bonding and mechanically bonding the cover 64 to the thermal contact 416' thereby thermally bonding the LED wafer 408 To the bump 16, and then the LED chip 408 is thermally coupled to the pedestal 62. The shims 54 are provided with a metal/silver coated metal joint to facilitate solid bonding with the solder 404. The signal transmission from the wire 70 to the LED chip 408 is improved. The cover body 64 is also provided with a nickel/silver coated metal pad for stable bonding with the solder 406, thereby improving heat transfer from the LED chip 408 to the heat sink 72. In addition, since the shape and size of the cover 64 are designed to match the thermal contacts 4丨6, the shape and size of the bumps 6 are not required to be matched with the thermal contacts 416. If a semiconductor wafer package is to be fabricated. Solder can be deposited on the pad 54 and the cover 64, and then the contacts 4] 4 and 416 are placed on the solder on the pad 54 and the cover 64, respectively, and then the solder is reflowed to form a solder. And 406. For example, the solder paste is selectively printed on the pad 54 and the cover 64 by screen printing. Then, the grabbing head and the automated pattern recognition system are used to step-repeat the 16 LED package. 402 &amp; placed on the thermal conductive 8 。. The pick-up head of the reflow machine places the contacts 414 and 416 on the solder paste M and the solder paste above the cover 。. Then the solder paste is heated to make it relatively low. The temperature "mouth 19〇〇C" reflowed 'money to remove the heat source, waiting for the solder paste to cool Hardened to form a solder of 404 and 406. Alternatively, a solder ball may be placed on the solder bump 54 and the cover M, 79 201218469, and then the contacts 414 and 416 are respectively placed on the solder balls above the solder pad 54 and the cover 64, and then the solder balls are heated to be reflowed. To form the next solder 4〇4 and 4〇6. The solder may initially be deposited on the thermally conductive plate 8 or the LED package 402 via coating, printing or placement techniques between the thermally conductive plate 8 and the led package 402 and then solder reflowed. Solder may also be placed on terminal 58 and pedestal 62 for use in the next layer if desired. In addition, a conductive adhesive (e.g., a silver-containing epoxy) or other bonding medium may be used in place of the solder, and the bonding medium on the pad 54, terminal 58, and the base 62 and the cover 64 need not be the same. The semiconductor wafer package 400 is a second-level single crystal module. The semiconductor wafer package and the heat conducting plate described above are merely illustrative examples, and the present invention can be implemented by other various embodiments. In addition, the above embodiments can be used in combination with or in combination with other embodiments according to the design and the degree of the test. For example, the substrate can comprise a complex array of single layer conductors and a complex array of multilayer conductors. The heat shield can include a plurality of bumps, wherein the bumps are arranged in an array for use with a plurality of semiconductor components; and in conjunction with additional semiconductor components, the heat shield can include more wires. The heat conducting plate may also include a wire that only contacts the adhesive layer and provides a vertical signal path. The heat conducting plate may also include a wire that only contacts the adhesive layer and is provided with a filler in the cavity. The heat conducting plate may also include a wire for providing vertical signal routing and a filler in the recess. The heat conducting plate may also include a wire that provides vertical signal routing through the covered perforations that lie from the peripheral edge of the heat conducting plate. The heat conducting plate may also include a raised edge disposed on the solder resist green paint and a filling in the recess. The semiconductor component of the present invention may be covered by a transparent, translucent or opaque encapsulating material in a first vertical direction and/or covered by a transparent, translucent or opaque overlying cover. For example, the semiconductor component of the present invention may be a blue light 80 201218469 BB chip and covered by a transparent encapsulating material or an upper cover to make the group a blue light source; or the LED chip is used to convert the color of the package. The material or cover is covered to 'make the group a green, red or white light source. Similarly, the semiconductor component of the present invention can be an LED package having multiple wafers, and the thermally conductive plate can contain more wires to accommodate additional wafers. The semiconductor component of the present invention can use a heat sink alone or share a heat sink with other semiconductor components. For example, a single semiconductor component can be placed on a heat sink or a plurality of semiconductor components can be placed on the same heat sink. For example, four small wafers arranged in a 2x2 array can be attached to the cover and additional wires can be placed on the thermal plate to match the electrical connections of the wafers. This approach is much more economical than setting a tiny bump for each wafer. The semiconductor wafer of the present invention may be optical or non-optical. For example, the wafer can be an LED, an infrared (IR) detector, a solar cell, a microprocessor, a controller, a dynamic random access memory (DRAM), or a radio frequency (RF) power amplifier. Similarly, the semiconductor package of the present invention can be an LED package or a radio frequency module. Thus, the semiconductor component of the present invention can be an optical or non-optical wafer that is packaged or unpackaged. In addition, a plurality of bonding media can be used to mechanically, electrically, and thermally bond semiconductor components to a thermally conductive plate, including by soldering and using conductive and/or thermally conductive adhesives. The heat sink of the present invention can quickly, efficiently and evenly dissipate the heat generated by the semiconductor component to the next layer without passing heat through the adhesive layer, the substrate or the heat conducting plate. In this way, the adhesive layer with lower thermal conductivity can be used, thereby reducing the cost of large and medium s. The heat sink can include integrally formed bumps and pedestals, and a cover that is connected and thermally coupled to the bumps, thereby improving reliability and reducing cost. The body can be coplanar with Tan ’ to electrically, thermally, and mechanically bond with the semiconductor component. The cover body can be tailored to the semiconductor component, and the base can be customized according to the next layer, thereby enhancing the thermal connection from the semiconductor component to the next layer. For example, the cover may be square or rectangular on one side of the plane and have the same or similar side shape as the thermal junction of the semiconductor component; the pedestal may be square or rectangular on one side of the plane, and - heat dissipation The devices have the same or similar side shapes. In addition, if the opening and the through hole of the present case are not formed by drilling, and are square or rectangular instead of circular, the convex piece may be square or rectangular in one side plane and has and The opening σ and the through hole have similar side shapes and side shapes that are the same as or similar to the thermal contacts of the semiconductor component. In any of the above settings, the heat sink can use a variety of different heat conducting structures. The heat sink can be electrically or electrically isolated from the wires. For example, a routing line extending from the _ and the dielectric layer on the outer side of the first vertical direction can be electrically connected, soldered to the cover, and extended to the outer side of the adhesive layer and the dielectric layer along the second vertical direction. The base and the terminal can be electrically connected, or the soldering iron can be combined with the cover body. The terminal can be electrically grounded to electrically ground the cover. The bumps can be integrally formed with the base&apos; thus becoming a single-metal body (e.g., copper or copper). The block can also be integrally formed with the base, and the interface between the two includes a single metal body such as a column of copper, as well as other metals (such as a covered joint). The bumps may also be formed with the pedestal-body and the interface between the two may comprise a plurality of layers of a single metal body (e.g., a nickel buffer layer on the outer periphery of the -Ilu core and a copper layer on the nickel buffer layer). 82 201218469 The base provides mechanical support for the bumps, substrate and adhesive layer. For example, the U.S. can prevent the substrate from bending and deforming during metal grinding, wafer placement, wire bonding, and molding of the package. Additionally, the back side of the base may include fins that project toward the second vertical direction. For example, a rig can be used to cut the exposed lateral surfaces of the pedestal to form lateral grooves, and such lateral grooves can form fins to increase the surface area of the pedestal. Therefore, if the fins are exposed to the air rather than being disposed on a heat sink, the thermal conductivity of the susceptor via thermal convection can be enhanced. The cover can be formed by a variety of deposition techniques after the adhesive layer is cured, including forming a single or multi-layer structure by electroplating techniques such as electroless plating, evaporation, and sputtering. The strike can be made of the same or different metal material as the bump. Further, the cover may span the through hole and extend to the substrate or be located within the periphery of the through hole. Therefore, the cover can contact or remain at a distance from the substrate. Regardless of any of the above designs, the cover abuts the projection and extends perpendicularly from the projection to the opposite side of the pocket while extending from the side of the projection. The adhesive layer provides a strong mechanical bond between the heat sink and the substrate. The adhesive layer can extend laterally from the bump, over the wire, and to the peripheral edge of the body. The adhesive layer fills the space between the heat sink and the substrate, and is a non-porous structure with a uniform distribution of bonding wires. The adhesive layer also absorbs the mismatch caused by the thermal expansion between the heat sink and the substrate. The material of the adhesive layer may be the same as or different from the dielectric layer. In addition, the adhesive layer can be a low cost dielectric and does not require thermal conductivity. Furthermore, the adhesive layer of this case is not easily delaminated. We can adjust the thickness of the adhesive layer so that the adhesive layer substantially fills the gap and allows almost all of the adhesive to lie within the structure after curing and/or grinding. For example, the ideal film thickness can be determined by trial and error. Similarly, we also 83 201218469 can adjust the thickness of the dielectric layer to achieve this effect. The substrate can be a low cost laminate structure and does not require high thermal conductivity. Further, the substrate may comprise a single conductive layer or a plurality of conductive layers. Furthermore, the substrate may comprise or consist of a conductive layer. i The conductive layer can be separately disposed on the adhesive layer. For example, the conductive layer may be first formed into a through hole, and then the conductive layer is disposed on the adhesive layer, so that the contact point of the conductive layer is exposed and exposed to the 苐-vertical direction, and at the same time, the bump extends into the through hole. The through hole is exposed in the first vertical direction. In this case, the thickness of the conductive layer can be as follows: up to the micron', for example, 150 micrometers. This thickness is sufficient for the wire to be transferred on the one hand (four) # ', so it does not need to be excessive _ to form a pattern of 0. The conductive layer and the dielectric layer can also be used. They are placed together on the adhesive layer. For example, a conductive layer is disposed on the dielectric layer, and then a via hole is formed on the conductive layer and the dielectric layer, and the conductive layer and the dielectric layer are disposed on the adhesive layer to expose the conductive layer to the first vertical direction, and The dielectric layer is contacted and located between the conductive layer and the (4) (four) electrical layer and the adhesive layer. At the same time, the bump extends into the through hole and is exposed through the through hole toward the first-vertical direction. In this case, the thickness of the conductive layer may be 10 to 70 μm, for example, 5 μm. This thickness is thick enough on the one hand = OK! : Signal transmission, on the one hand, is thin enough to reduce weight and cost. In addition, the dielectric layer is always part of the heat conducting plate. The conductive layer and the carrier may also be disposed on the adhesive layer at the same time. For example, the conductive layer may be adhered to a carrier such as bidirectional orientation = (:?r) by using a film, and then the conductive layer and the carrier are disposed on the adhesive layer only to guide the carrier to the conductor layer. And exposing toward the first-vertical direction, and contacting the film between the carrier and the conductive layer, so that the conductive layer contacts and is located between the film and the adhesive layer, while the two bumps are aligned with the through holes, and are supported by the carrier The bump is covered in the first vertical direction. After the layer to be cured is cured, the film can be decomposed by ultraviolet light to strip the carrier from the conductive layer, so that the conductive layer is exposed in the first vertical direction, and then the patterned conductive layer can be ground to form a solder mask and a cover. body. In this case, the thickness of the conductive layer may be 10 to 70 micrometers, for example, 50 micrometers. This thickness is thick enough on the one hand, and the signal can be transmitted, and the thickness is thin, so that the weight and cost can be reduced; : to 5 ° 0 micron, this thickness is thick enough on the one hand, so it is not thin enough when transporting - it is thin enough to help reduce weight and cost. The carrier is only a temporary solid; the t material is not permanently part of the heat conducting plate. Solder pads and terminal visible semiconductor component discs are available in a variety of packages. The use of solder bumps and terminals in combination with the needs of the next layer can be made by a variety of techniques, including electroplating, electroless plating, to form a single layer or a multi-layer structure when the substrate has not been or has been placed on the adhesive layer. For example, a pattern of a conductive layer may be formed on the substrate by the substrate not yet disposed on the second substrate, or the substrate has been adhered to the bump and the overhanging platform by the adhesive layer, thereby forming a wire. Similarly, the overhanging platform is patterned to form the pedestal and the terminal before being covered with the perforations. In the opening 4 ... the surface treatment of the covered joint can be used in the welding and end

Before or after. For example, i qI J gw (four) can be used to inscribe the conductive phase forming material and the terminal, and then on the structure; or the deposited contact is deposited on the structure ί and then the conductive layer is formed to form the solder bump and the terminal. The pad and the cover can be co-located in the first vertical direction of the surface of the surface of the surface of the surface. Similarly, the pedestal and the terminal may be co-located on the first surface facing the first-vertical direction to enhance the soldering between the heat conducting plate and the next layer assembly by controlling the degree of collapse of the solder ball. The raised edge of the present case may or may not be reflective, and may be transparent or impervious to the moon. For example, the 'bumped edge may include a highly reflective metal such as silver or glaze, and has an inclined inner side surface, thereby illuminating the inner surface. The pupil is reflected toward the first-vertical direction to increase the amount of light emitted in the first vertical direction. Similarly, the raised edges may contain materials such as glass frit (4), or materials such as epoxy (iv) reflective, opaque, and low cost. In addition, regardless of whether the raised edges contact the encapsulating material or limit the range of encapsulating materials, we can use the cookware Reflective raised edge. The encapsulating material of the present invention can be a variety of transparent, translucent or opaque materials and can have different shapes and sizes. For example, the encapsulating material can be a transparent stone oxide resin, an epoxy resin, or a combination thereof. In terms of the stability of heat conduction and color conversion, the epoxy resin is superior to the epoxy resin', but the cost of the stone oxide resin is higher, the hardness is lower, and the adhesion is poor. The cover on the f case can cover or replace the packaging material. The upper cover provides environmental protection such as moisture-proof seats and anti-particles for wafers and wires in a confined space. The upper cover can be made of a variety of transparent, translucent or opaque materials and can have different shapes and sizes. For example, the upper cover can be a transparent glass or cerium oxide. ^ We can also use a lens to cover or replace the packaging material. The wafers and wires in this lens-tight chamber provide loop protection such as moisture-resistant seats and anti-particles. The lens can also provide a convex refractive surface whereby the light is concentrated toward the first-vertical direction 86 201218469. The lens can be made of a variety of transparent, translucent or opaque materials&apos; and can have a shape and size. For example, a hollow hemispherical dome-shaped glass lens can be placed on the thermally conductive plate and (iv) the lens is spaced from the encapsulating material. Alternatively, a solid hemispherical dome-shaped plastic lens can be placed on the encapsulating material and the lens can be kept at a distance from the heat conducting plate. The wires of this case may include additional pads, terminals, routing wires, coated vias, conductive vias, and passive components, and may be of different configurations. The wire can be used as a signal layer, a power layer or a ground plane, depending on the purpose of soldering the corresponding semiconductor component. The wires may also be coated with various conductive metals such as copper, gold, nickel, silver, palladium, tin, mixtures thereof, and alloys thereof. The ideal composition depends on both the nature of the externally connected medium and the design and reliability considerations. In addition, those skilled in the art/3⁄4 can understand that the copper used in the semiconductor wafer assembly of the present invention can be pure copper, but is usually a copper-based alloy such as copper-lead (99 9% copper), copper-silver. _Phosphorus-magnesium (99 copper) and copper-tin-iron-filled (99.7% copper) to improve mechanical properties such as tensile strength and ductility. In general, it is preferred to provide the cover, routing lines, coated perforations, dielectric layers, fillers, coatings, coated contacts, solder resist green paint, and encapsulating materials, but in some embodiments Can be omitted. For example, if a large pad is used, the routing line can be omitted. If only single layer signal routing is used, the coated perforation can be omitted. The dielectric layer can be omitted by using a thicker adhesive layer on the right. If the shape and size of the bumps are designed according to the thermal contact surface of the semiconductor component, the cover can be omitted. The heat conducting plate of the present invention may include a heat conducting hole that is spaced from the bump and extends through the adhesive layer and the dielectric layer outside the opening and the through hole while abutting and thermally connecting the base and the cover body. This enhances the heat dissipation from the cover to the base, 87 201218469 and promotes the diffusion of thermal energy within the base. The group of the case can provide horizontal or vertical single layer or multi-layer signal routing. Lin Wenqiang et al., U.S. Patent Application Serial No. 12/6|6, 773, the entire disclosure of which is incorporated herein by reference. The structure is such that the solder bumps, the terminals, and the routing lines are all located above the dielectric layer, the contents of which are incorporated herein by reference. . Lin Wenqiang et al. filed a second application on the η date. 2/6i6 775 虎 US Patent No. 4, "Semiconductor wafer assembly with a heat sink and a conductor of a stud/base" reveals another horizontal single layer The structure of the signal routing, in which the solder pads, the terminals and the routing wires are located above the adhesive layer, and the structure is not provided with a dielectric layer. [This application is incorporated herein by reference in its entirety. U.S. Patent No. 12/557,54, filed on September 9, 2009, entitled "Semiconductor Chip Assembly with &amp; Column/Base Heatsink and Horizontal Signal Routing" The structure of the horizontal multi-layer signal routing is characterized in that the solder pad and the terminal layer above the dielectric layer are electrically connected to the first and second conductive holes of the dielectric layer and the routing line under the dielectric layer. The content of the U.S. Patent Application is hereby incorporated herein by reference. In the U.S. Patent No. 12/557,541, filed on Sep. 11, 2009, the disclosure of which is incorporated herein by reference in its entirety, the disclosure of the disclosure of the disclosure of a structure having a vertical multilayer signal routing, wherein the pads above the dielectric layer and the terminals under the landing layer utilize a first conductive hole passing through the 'I electrical layer, a routing line under the dielectric layer, and a pass through the adhesive 88 201218469 The second conductive via of the layer is electrically connected, the contents of which are incorporated herein by reference. The working format of the heat conducting plate in this case can be single or multiple heat conducting plates, depending on the manufacturing design. For example, a single heat conducting plate can be fabricated separately. Alternatively, a plurality of thermally conductive plates can be simultaneously manufactured in a single metal sheet, a single adhesive layer, a single substrate, and a single solder resist green paint, and then separated. Similarly, for each thermal plate in the same batch, we can also use a single metal plate, a single adhesive layer, a single substrate and a single defense; tp green paint simultaneously batches to manufacture multiple sets of heat sinks for a single semiconductor component and wire. For example, 'can be punched on a metal plate~ Ί again-open another JPf. The uncured adhesive layer of the opening of the bump should be placed on the overhanging platform so that each bump extends through a corresponding opening; then a substrate (having a single conductive layer, a single: dielectric layer, and a via corresponding to the bumps) is disposed on the adhesive layer 'to make each bump extend through a corresponding opening and into the corresponding hole; and then The benefit platform causes the overhanging platform and the substrate to abut each other, forcing the adhesive layer to enter the gap between the bumps and the substrate; the money solidifies the layer and then grinds the bumps, The adhesive layer and the conductive layer form a lateral surface, and then the coating layer is coated on the structure, and the conductive layer and the fracture layer thereon are formed by a famous insect to form a plurality of corresponding corresponding bumps. a solder pad, a routing line, a terminal and a cover; then, the anti-bar green paint is deposited to form a pattern, so that the solder mask, etc., causes the solder resist green paint to be covered with the bumps as the bumps; Cover (four) welding rafts, the terminals and the same or 劈 ^ 'finally, The peripheral edge of the position of each heat conducting plate cut the adhesive layer f knit substrate, the dielectric layer and the solder mask to enabling a heat conducting plate 89201218469 Bie separated from each other. The working format of the semiconductor wafer package of the present invention may be a single group or a plurality of groups, depending on the manufacturing design. For example, the single-components may be separately manufactured or the plurality of groups may be simultaneously manufactured in batches, and then the respective heat-conducting plates may be separated one by one. Similarly, a plurality of semiconductor elements can be electrically connected, thermally coupled, and mechanically coupled to each of the heat conducting plates in batch production. For example, a plurality of solid crystal materials may be separately deposited on a plurality of covers, and the multi-grain wafers are separately placed on the solid crystal materials, and then the solid crystal materials are simultaneously heated to harden and form a plurality of solids. crystal. The wafers are then wire bonded to the corresponding solder pads, and a plurality of packaging materials are simultaneously molded onto the wafers and wires, and then the heat conducting plates can be separated. We can separate the heat conducting plates from each other in a single step or in multiple steps. For example, a plurality of heat conducting plates can be batched into a flat plate, and then a plurality of semiconductor elements can be separated from the plurality of semiconductor wafers formed by the flat plates. Or 'a plurality of heat-conducting plates can be made into a flat plate, and then the plurality of guide plates formed by the flat plate are cut into A-seven-lead', and the plate is cut into a thin-shaped heat-conducting strip, and then more The == is placed on the heat-conducting strips, and finally, the heat-dissipating strips are separated into individual semiconductor wafer assemblies. In addition, mechanical cutting, laser (4), bifurcation or other (4) techniques can be utilized when splitting the guide plates. ... Individual) _接" - 3 I mean several pieces of body, body shaping (formation of a single beauty H r without spacing or unseparated from each other). For example, the bumps abut the earth and the body but do not adjoin the dielectric layer. "Overlapping" - semantic means that it is located above and extends within the - lower element. *Stack" includes extending within, outside of, or within the perimeter of the perimeter. 90 201218469 For example, in the state where the pocket is facing down, the case is a piece, and this is due to a false 垂 叮 # # 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 The bump, the non-straight through the element strain r, there is another - the same imaginary vertical line is worn by the τ piece (such as solid crystal material), the straight line only runs through a few oils, j4, does it have another imaginary vertical Deeply I only wear 4 bumps without penetrating the half of the field &amp; μ, the piece (that is, outside the periphery of the semiconductor element). Similarly, the cover overlaps the tenon layer. In addition, "overlap" and "above" are ashamed and are synonymous with "below". "Being heavy" means "contact" means direct contact. Example: Uncontacted bumps ^ Electrical layer contact pads but "covering" - means full coverage in a vertical and / or side direction. For example, the cover is covered over the cover system in a state where the concave six faces downward, but the projection does not cover the cover from below. When the word "layer" contains a pattern or an unpatterned layer on the adhesive layer, the conductive second field, y&quot; electrically increases the upper blank helmet plate, and when the semiconductor component is set to 埶/, μ日士BS 戕", After searching, the conductive layer can be a circuit pattern with spaced wires on the dielectric layer. In addition, the "Γ layer" can comprise a plurality of laminated layers. 0 "Welding" - when used in conjunction with a wire, The connection and/or connection, the connection area of the external connection medium (such as solder or wire), and the external connection medium can electrically connect the wire to the semiconductor element. "Terminal" - when used in conjunction with a wire, means that the connecting area contacts and/or engages an external connecting medium (such as solder or wire), and the external connecting medium connects the guiding (four) to the lower layer. _ - External device 201218469 (such as a printed circuit board or a wire connected to it). The term "coated perforation" when used in conjunction with a conductor means an electrical interconnection structure formed in a hole in a covered manner. For example, a coated perforation may remain intact and remain at a distance from the peripheral edge of the assembly or may be cleaved or trimmed into a groove in subsequent processes such that the remainder of the coated perforation is in the group In the groove of the outer edge of the body. However, the presence of the covered through hole is independent of which configuration is employed. When the term "concave eight" is used in conjunction with a bump, it refers to a closed or non-closed space of the bump 4. For example, the recesses 6 in the bumps may be covered by the pedestal in the second vertical direction, thereby forming a closed space; or the recesses in the bumps may be exposed in the second vertical direction, thereby forming a non-closed space. Similarly, the recesses in the bumps can be hollow or contain a filler such as epoxy, polyimide or solder. When the word "about" is used in conjunction with an angle, it is within 2 degrees of the soil. The words "opening", "through hole" and "hole" refer to the through hole. For example, the convex: the ghost is inserted into the opening of the adhesive layer in a state in which the recess is downward, and is exposed from the adhesive layer in the upward direction. Similarly, after the bump is inserted into the through hole of the substrate, it is exposed upward from the substrate. "Insert" - semantic means the relative movement between components. Example #, "Insert the bump into the through hole" includes: the substrate (4) moves without moving and is moved toward the substrate by the overhanging platform; the outer projection is moved to move from the substrate toward the outwardly extending platform; and the substrate and the overhanging platform abut each other. For another example, "inserting (or extending into) the through hole" includes: a through hole through which the bump penetrates (through and through), and a through hole through which the bump is inserted but not protruded. "Reciprocal" - the term also refers to the relative movement between components. For example, "substrate 92 201218469 and the overhanging platform abut each other" includes: the substrate is fixed and moved by the overhanging platform toward the substrate', the overhanging platform is fixed, and the substrate is moved toward the overhanging platform, and the substrate and the overhanging platform are mutually near. The term "aligned" means the relative position between components. For example, in the case where the recess is facing downward, when the adhesive layer has been placed on the base, the substrate has been placed on the adhesive layer, the bump has been inserted and aligned with the opening, and the through hole has been aligned with the opening, regardless of the convexity The block is inserted into or under the through hole, and the block is aligned to be in contact with the contact between the single or multiple support members: for example, a semiconductor component set On the cover, whether the semiconductor component is in contact with the cover or is separated from the cover by a solid crystal material. - The phrase "layering in the gap" means the layer of adhesion in the gap. For example, the adhesive layer extends across the dielectric layer in the gap means "between the adhesive bump and the dielectric layer in the gap" means that the contact is in contact with the adhesive layer of the _ η 甲 and is located inside the gap J Between the bump and the dielectric layer of the outer sidewall of the notch. And re-expansion: two: with the abutment and the "connecting element to extend above the bump, while adjacent, eight down, the cover system is extended, and the weight is on the bump and protrudes from the bump. If the same block does not abut or overlap the dielectric layer, it can extend over the dielectric layer and overlap ====, including adjacent and non-adjacent elements to extend under the disk, adjacent to the cover, covered by the weight And protruding from the cover body toward the downward direction 93 201218469. Similarly, the bumps can extend below the pads even if they are not adjacent to the pads or overlapped by the pads. The "first vertical direction" and the "second vertical direction" do not depend on the orientation of the semiconductor wafer package (or the heat transfer plate), and those skilled in the art can easily understand the direction in which they actually refer. For example, the bumps extend vertically on the outer side of the susceptor along the first vertical direction, and extend perpendicularly to the outer side of the cover body along the second vertical direction, whether the assembly is inverted and/or the assembly is disposed in a heat dissipation manner. The device is thermally closed. Similarly, the crucible system protrudes "laterally" from the bump along one side of the plane, regardless of whether the group is inverted, rotated or tilted. Therefore, the first and second vertical directions are opposite to each other and perpendicular to the side direction. In addition, the laterally aligned elements are coplanar with one another in a lateral plane perpendicular to the first and second vertical directions. Furthermore, when the pocket is downward, the first vertical direction is the upward direction and the second vertical direction is the downward direction; when the pocket is upward, the first vertical direction is downward and the second vertical direction is upward. The semiconductor wafer package of this month has several advantages. The reliability of this group is flat and very suitable for mass production. This group is especially suitable for high-power semiconductor components (such as LED chips and large semiconductor wafers) and multiple semiconductor components used simultaneously (e.g., in an array) that are easy to generate high heat and have excellent heat dissipation effects. Multiple small-sized semiconductor wafers The manufacturing process of this case is highly applicable and unique and progressive. It uses a variety of mature electrical, thermal and mechanical bonding technologies. In addition, the manufacturing process of this case is not expensive. The implement can be implemented. Therefore, this manufacturing process can greatly increase the yield, yield, performance and cost effectiveness of traditional packaging technology - and the 'this group' is ideal for copper wafers and lead-free environmental requirements. 94 201218469 The embodiments described herein are for illustrative purposes, and the elements or steps of the present invention are either simplified or omitted in order to avoid obscuring the features of the present invention. Overlapped or non-essential components and reference numerals may be omitted. Those skilled in the art will be lightly directed to the embodiments described herein. The above-mentioned materials, dimensions, shapes, sizes, steps, and the order of the steps are merely examples. The above-mentioned persons can engage in the present invention without departing from the spirit and scope of the present invention. Such changes, adjustments, and equalization techniques are defined by the scope of the appended claims. [Simplified Schematic Description] Figures 1A and 1B are cross-sectional views showing a bump and an overhanging platform. Method 1C' 1D and 1E are respectively a bottom view. An enlarged cross-sectional view for making a 1B drawing, and a plan view of Figs. 2A and 2B are a cross-sectional view of an adhesive layer in an embodiment of the present invention. 2C and 2D FIG. 3A and FIG. 3B are respectively a cross-sectional view of a substrate. A top view and a bottom view of a second embodiment of the present invention are used to illustrate a second embodiment of the present invention. 4D to 4L are sectional views; a method of a heat conducting plate. The 4M and 4N drawings are a plan view and a bottom view, respectively, of Fig. 3B. Fig. 4 is a plan view and a bottom view for making a 4L picture in an embodiment of the present invention. 95 2012 18469 FIGS. 5A, 5B, and 5C are respectively a cross-sectional view, a top view, and a bottom view of a heat conducting plate according to an embodiment of the present invention, the heat conducting plate having a wire in contact with the adhesive layer. FIGS. 6A, 6B, and 6C are respectively A cross-sectional view, a plan view, and a bottom view of a heat conducting plate in an embodiment of the present invention can provide vertical signal routing. FIGS. 7A, 7B, and 7C are respectively a cross-sectional view and a plan view of a heat conducting plate according to an embodiment of the present invention. And the bottom view, the heat conducting plate can provide vertical signal routing. 8A, 8B and 8C are respectively a cross-sectional view, a top view and a bottom view of a heat conducting plate according to an embodiment of the present invention, the heat conducting plate having a filling material. 9A, 9B, and 9C are respectively a cross-sectional view, a top view, and a bottom view of a heat conducting plate according to an embodiment of the present invention, the heat conducting plate having a closed recess containing a filler. 1A, 10B, and H)C are respectively a cross-sectional view, a top view, and a bottom view of a heat conducting plate according to an embodiment of the present invention, the heat conducting plate having a non-closed recess containing a filler. 11 and FIG. 11 are respectively a cross-sectional view, a top view and a bottom view of a heat conducting plate according to an embodiment of the present invention, the heat conducting plate having a raised edge. FIGS. 12A, 12B and 12C are respectively a semiconductor wafer according to an embodiment of the present invention. The semiconductor wafer package includes a heat conducting plate, a semiconductor component, and a package material. The 13A, 13B, and 13C are respectively the sound of the invention, and the tenth embodiment of the present invention is a cross-sectional view, a top view, and a bottom view. The cross-sectional view, the top view and the bottom view of the semiconductor wafer assembly include a heat conductive plate for the vertical communication, a half guide, a dry V body member and a package material. 96 201218469 material 0 ~ semiconductor body comprising a semiconductor body comprising ΜΑ, 丨 4B and 丨 4C are respectively a cross-sectional view, a top view and a bottom view of the wafer assembly in an embodiment of the invention, the semiconductor wafer has a raised edge a heat conducting plate, a semiconductor component, and an upper cover. The fifth embodiment of the present invention is a cross-sectional view, a top view, and a bottom view of a crystal body according to an embodiment of the present invention. A heat conducting plate and a semiconductor component having a back contact. Metal plate surface bumps overhanging platform recessed corner corner sidewall top plate angle adhesive layer open substrate conductive layer dielectric layer through hole [main component symbol description] 10 12 ' 14 16 18 20 22, 24 26 28 θ, ' θ2 30 32 34 36 38 97 40 201218469 42 Notch 44, 46 Cover layer 48 Filler 50, 52 Etch resist layer 54 Pad 56 Routing line 58 Terminal 60 Covered perforated 62 base Seat 64 Cover 68 Rising edge 70 Conductor 72 Heat sink 74, 76 Solder resist green paint 78 Covered joint 80 ' 82 ' 84, 86, 88, 90, 92, Thermal shield 94 100, 200, 300, 400 Semiconductor wafer set Body 102, • 202, 302, 408 LED wafer 104, 204, 304, 412 wire 106, .206 '306 solid crystal material 108, 208, 418 packaging material 110 ' '210, 310 top surface 112, • 212, 312 bottom surface 98 201218469 114 ' 214 ' 314 Wire connection 316 Upper cover 402 LED package 404, 406 Solder 410 Base 414 Electrical contact 41 6 hot junction 99

Claims (1)

201218469 VII. Patent application garden: 】 A semiconductor wafer assembly comprising at least: a semiconductor component; a sweat layer having at least a heat sink having at least one bump and a pedestal, wherein (1) Connecting the pedestal and forming an integral with the pedestal and projecting from the pedestal; (π) the pedestal extending from the bulge in a side direction perpendicular to the first vertical direction And (iii) the bump has a recess, the recess being covered by the bump in the first vertical direction, but the recess is in a second vertical direction opposite to the first vertical direction The wire is not covered by the bump; and a wire includes a soldering ring and a terminal; wherein the semiconductor component is disposed on the bump and extends on the outer side of the bump along the first vertical direction, and is located in the concave Outside the hole, and extending laterally in the periphery of the recess - the semiconductor component is electrically connected to the pad, thereby being electrically connected to the terminal. The semiconductor component is also thermally coupled to the bump, thereby thermally connecting To the s-base; where the adhesive layer is in contact The bump and the base ' extend laterally from the bump to or beyond the terminal; wherein the wire is located outside the recess; JL wherein the bump and the recess extend into the opening. 2. The group according to claim 1, wherein the semiconductor element is an LED chip. 100 201218469 3. The assembly of claim 1, wherein the semiconductor component is electrically connected to the pad by a wire and thermally bonded to the bump by a die bonding material. 4. The group of claim </RTI> wherein the semiconductor component is electrically connected to the pad by a first solder and thermally bonded to the bump by a second solder. 5. The assembly of claim 1, wherein the adhesive layer contacts the pad and the terminal. 6. The group according to claim 1, wherein the adhesive layer/, the solder pad and the germanium terminal are kept in contact with a dielectric layer and located at the terminal of the solder pad and the adhesive layer m. Between the adhesive layers, but the distance between the bumps and the pedestal. The assembly of claim 1, wherein the adhesive layer is laterally covered, surrounded and conformally coated on the bump. The assembly of claim 1, wherein the adhesive layer extends to a peripheral edge of the assembly. 9. The assembly of claim 1, wherein the bump comprises A group extending to the bent corner of the base. The kit of claim 1, wherein the bump is bent laterally outwardly adjacent to the base. The group of the body of the group of the first aspect of the invention, wherein the pocket is directed to the group of the first aspect of the patent application, wherein the pocket is The pocket is covered in the second vertical direction. X 八...Λ 14. The group according to the scope of the patent application, The recess is not sealed and contains a filler which fills most or all of the pocket. 15. The assembly of claim 3, wherein the recess is sealed. And a filler containing the majority of the pockets. 16. The group of claim 1 wherein the pockets are along the vertical direction and the sides The direction extends across a substantial portion of the bump. 17. The assembly of claim 1, wherein the base extends to a peripheral edge of the assembly. 18. As described in claim 1 The assembly, wherein the bonding pad and the terminal extend on the outer side of the adhesive layer along the first vertical direction. 19. The assembly of claim 2, wherein the bonding pad extends along the adhesive layer The first vertical direction outer side 'the terminal extends on the outer side of the adhesive layer along the second vertical direction. 2〇. As claimed in the patent application, the first embodiment of the group is in which the solder joint is coplanar with the sub. 2 1 · As described in claim 1 of the scope of the patent, wherein The pedestal is coplanar with the terminal. 22. The group according to the scope of the patent application, wherein the susceptor, the squeegee and the terminal are the same metal. | 〇 2 201218469 23 · If the patent application scope The assembly of claim 1, wherein the pedestal, the pad and the terminal comprise a gold, silver or nickel surface layer and an inner copper core 'but mainly copper, the bump is mainly copper or all 24. The package of claim 2, wherein the heat sink comprises a copper core shared by the bump and the base. 25. The group of claim 1 The wire, wherein the wire comprises a copper core shared by the pad and the terminal. 26. A semiconductor wafer package comprising: at least: a semiconductor component; the adhesive layer having at least a heat sink comprising at least one bump a block, a base and a cover, wherein (1) the protrusion abuts the base and is integral with the base, and protrudes from the base in a first vertical direction. The protrusion also abuts the cover And from the cover body along a second opposite to the first vertical direction (ii) the base extends from the side of the bump in a side direction perpendicular to the specific vertical direction; (丨丨丨) the cover covers the bump in the first vertical direction, And extending from the side of the bump; and (the phantom has a recess, the recess is covered by the bump in the first vertical direction, but the recess is in the second vertical direction Not being covered by the bump, the bump separating the recess from the cover, and the recess extends across the majority of the bump in the vertical direction and the lateral directions; and a wire The semiconductor device is disposed on the cover body, and extends on the outer side of the first vertical direction and is located outside the cavity and extends laterally in the second to the periphery of the semiconductor component. Electrically coupled to the pad, electrically: 103 201218469 junction to the terminal 'the semiconductor component is also thermally bonded to the cover' to be thermally coupled to the pedestal; wherein the adhesive layer contacts the bump, the base a seat and the cover, and between the base and the solder pad and Between the base and the cover, and extending laterally from the bump to the terminal or over the terminal; wherein the wire is located outside the recess; and wherein the bump and the recess extend into the opening. The assembly of claim 26, wherein the semiconductor component is an LED chip. 28. The assembly of claim 26, wherein the semiconductor component is electrically bonded to the pad by a wire and thermally bonded to the cover by a die bonding material. 29. The assembly of claim 26, wherein the semiconductor 7L is electrically coupled to the pad by a first solder and thermally coupled to the cover by a second solder. 30. The set of claim 5, wherein the adhesive layer contacts the pad and the terminal. 3 1. The group according to claim 100, wherein the adhesive layer is spaced apart from the mat and the terminal, the dielectric layer is in contact with and located between the solder joint and the adhesive layer, and Between the terminal and the adhesive layer, but maintaining a distance from the bump and the base. The group of claim 26, wherein the adhesive layer laterally covers, surrounds and conforms to one side wall of one of the bumps, and extends to the peripheral edge of the group. The assembly of claim 26, wherein the bump is coplanar with the adhesive layer at the cover. 34. The assembly of claim 26, wherein the bump comprises a first bent corner extending to the base, and a second bent corner extending to the cover, the bend The folded corners are vertically separated from each other. 35. The assembly of claim 26, wherein the projection is bent laterally outwardly adjacent the base, the projection being bent laterally inwardly adjacent the cover. 36. The assembly of claim 26, wherein the projection is bent laterally outwardly at an angle of about 9 degrees adjacent the base, the projection being adjacent to the cover. An angle of about 90 degrees is bent inwardly and laterally. 3. The group of claim 1 wherein the bump has a stamped special irregular thickness. 38. The assembly of claim 26, wherein the pocket is hollow and exposed toward the second vertical direction and the projection is exposed outwardly toward the second vertical. $39. The assembly of claim 100, wherein the pocket and the seal & is filled with a filler, the filler is in contact with the bump, and the recess is limited to fill the pocket Most or all of them are exposed in the second vertical direction. 6. The group of claim 26, wherein the pocket is a L-shaped and an in-fill-fill, the filler contacting the bump is limited to filling most or all of the pocket, And in the second vertical direction, the assembly of claim 26, wherein the pocket contains a filler that contacts the bump and is along the vertical direction. And the engraving direction extends across a majority of the bumps' the filler is confined to the recess, filling up and recessing most or all of the eight and exposing toward the second vertical direction. 42. The assembly of claim 26, wherein the recess has a 3 filler, the filler contacts the bump and the base, and extends across the convex in the vertical direction and the lateral directions. The bulk of the block &amp; the filler is limited to 5 sulcus, filling most or all of the pocket and being covered by the pedestal in the second vertical direction. 43. The assembly of claim 26, wherein the base covers the wire in the first vertical direction and extends laterally outside the cover until a peripheral edge of the set. 44. The assembly of claim 26, wherein the bonding pad and the terminal extend on an outer side of the adhesive layer along the first vertical direction and are co-located on a surface facing the first vertical direction The wire further includes a routing line located on a conductive path between the pad and the terminal. 45. The assembly of claim 26, wherein the bonding pad extends on an outer side of the adhesive layer along the first-vertical direction, and the terminal extends on an outer side of the adhesive layer along the second vertical direction, The pedestal and the terminal are co-located on a surface facing the second vertical direction, the wire further includes a covered through hole extending through the adhesive layer, and a circuit protection between the pad and the terminal on. = 46. The assembly of claim 26, wherein the bonding pad and the 3 盍 body have the same thickness adjacent to each other, but the thickness of the cover adjacent to the projection at 201218469 is The pad is different from the pad, and the pad is located on the surface facing the first perpendicular direction. 47. The kit of claim 26, wherein the base, the cover, the pad and the terminal are the same metal. The invention of claim 26, wherein the base, the k body, the pad and the terminal comprise a gold, silver or nickel surface layer and an inner 4 copper core~ But mainly copper, the bumps are mainly copper or all copper. 49. The assembly of claim 26, wherein the heat sink comprises a copper core shared by the bump and the base. 5. The assembly of claim 26, wherein the wire comprises a copper core shared by the pad and the terminal. 5 1. A semiconductor wafer package comprising: at least: a semiconductor component; an adhesive layer having at least one opening; a retort hot seat comprising at least one bump, a pedestal and a cover, wherein (1) The protrusion abuts the base and is integrally formed with the base, and protrudes from the base in a first vertical direction, the protrusion also abuts the cover body, and a vertical direction from the cover body Conversely extending in a second vertical direction; (ii) the base extends from the side of the bump in a side direction perpendicular to the vertical direction; (iii) the cover covers the bump in the vertical direction Extending from the side of the bump; and (jv) the bump has a recess, the recess being covered by the bump in the first vertical direction, but the recess is in the second vertical direction The bump is not covered by the bump, the bump is spaced apart from the cover, and the recess extends across the majority of the bump along the vertical direction and the lateral directions; 201218469 and a substrate , comprising a dielectric layer, wherein the through hole extends through the substrate; Wherein the semiconductor component is disposed on the first vertical direction $ ice group and extends over the cover body along the outer side of the body to the direct direction, 卄Β γ / and laterally extending 兮OD々 - In the circumference, the body element is in the middle.玄凹八纴5 visits * mountain work bucket, reverse, mouth to 5 hai ~ 塾, so that the electrical connection, the force to the raft, the semiconductor component of the pedestal; and (4) the junction into which the adhesive layer contacts a bump, the pedestal, the cover and the dielectric layer, but maintaining a distance from the remote soldering pad, the adhesive layer being located between the bump and the dielectric layer, between the pedestal and the pad, Between the pedestal and the cover, and between the pedestal and the dielectric layer, and extending laterally from the bump to the terminal or over the terminal; wherein the substrate 仏 5 is again placed on the adhesive layer The dielectric layer contacts the pad and the cover, but is spaced from the bump and the base; wherein the wire is located outside the recess; and wherein the bump and the recess extend into the opening and the opening a hole extending in the vertical direction to the outside of the through hole, the cover covering the opening and the through hole in the first vertical direction. 52. The assembly of claim 5, wherein the semiconductor component is an LED wafer. 53. The assembly of claim 5, wherein the semiconductor component is electrically connected to the pad by a wire and thermally bonded to the cover by a die bonding material. The assembly of claim 51, wherein the semiconductor component is electrically connected to the pad by a - solder, and is thermally bonded to the cover. A tantalum tin 55. The group contact as described in claim 51 is located between the terminal and the (four) layer. The electric layer 56 is in contact with the group basin described in the fifth paragraph of the patent application and is located between the terminal and the dielectric layer. (9) The layer is the group described in Item 51 of the patent scope, wherein the point is layered. The cover 1 and the isomorph are coated on one side wall of the bump while advancing the peripheral edge of the body. The assembly of claim 51, wherein the bump is coplanar with the adhesive layer at the cover. &gt;, person 59. The group of claim 2, wherein the bump package\ extends to a _f-angle of the pedestal and extends to a first-fold corner of the cover, The bending body is vertically separated from each other. The assembly according to claim 51, wherein the portion of the projection extending to the wire seat is bent laterally outward, and the projection extends to a portion of the edge. The assembly of claim 51, wherein the portion of the projection extending to the base is bent laterally outward at an angle of about 9 degrees. The portion of the bump that extends to the cover is bent laterally inward at an angle of about 9 G. The assembly of claim 51, which has the stamped portion The assembly of claim 5, wherein the pocket is hollow and exposed toward the second vertical direction, and the projection is oriented toward the second vertical direction. Exposed. 64. As claimed in the scope of claim 5, wherein the pocket is not sealed, and a filler that contacts the bump, is confined to the recess, fills most or all of the recess, and is exposed toward the second vertical direction. 65. As claimed in claim 51 a set body, wherein the pocket is in a sealed state and contains a filler, the filler contacting the bump, and the recess is limited to fill most or all of the pocket, and The vertical direction is covered. 66. The assembly of claim 5, wherein the recess contains a filler that contacts the bump and along the vertical direction and the sides The direction extends across a majority of the bump, the filler being confined to the recess, filling most or all of the recess and exposing toward the second vertical direction. 67. As claimed in claim 5 The set body, wherein the recess includes a filler that contacts the bump and the base, and extends across the vertical direction and the lateral directions across a majority of the bump, the filling Restricted by the pocket, filling most or all of the pocket, and The second vertical direction is covered by the pedestal. The assembly of claim 51, wherein the pedestal supports the substrate and the adhesive layer, and covers the wire in the second vertical direction The substrate, while extending laterally to the outside of the cover, to the peripheral edge of the assembly. 69. The assembly of claim 5, wherein the solder tab and the terminal extend along the adhesive layer The outer side of the first vertical direction, and commonly located on the surface of the first vertical direction of 201218469, the wire further includes a routing line, and the routing line is located on a conductive path between the pad and the terminal. The assembly of claim 5, wherein the bonding pad extends on the outer side of the adhesive layer and the dielectric layer along the first vertical direction, the terminal extending from the adhesive layer and the dielectric layer Along the outer side of the second vertical direction, the pedestal and the 4 terminal are co-located on a surface facing the second vertical direction. The wire further includes a covered through hole. The covered through hole extends through the adhesive layer and the dielectric layer. And located in the pad and the Son between - on the conductive path. 71 'A group according to claim 5, wherein the soldering iron and the cover have the same thickness adjacent to each other, but the thickness of the cover adjacent to the bump is the same as the bonding pad Differently, the pad is co-located with the cover body facing the first vertical direction. 72. The assembly of claim 51, wherein the base, the cover, the pad, and the terminal are the same metal. 73. The assembly of claim 51, wherein the base, the cover, the pad and the terminal comprise a gold, silver or nickel surface layer and an inner copper core, but mainly Copper, the bump is mainly copper or all copper. 74. The assembly of claim 5, wherein the heat sink comprises a copper core shared by the bump and the base. 75. The assembly of claim 5, wherein the wire comprises a copper core shared by the pad and the terminal. 76. A semiconductor wafer package comprising: at least: a semiconductor component; an adhesive layer having at least an opening; 201218469 - a heat sink comprising at least one bump, a base and a cover, the bump abutting The base is formed integrally with the base and protrudes from the base in a first vertical direction, the protrusion also abuts the cover body, and is opposite to the first vertical direction from the cover body Extending in a second vertical direction, the bump includes first and second corners that are vertically separated from each other; (ii) the base extends from the side of the bump in a side direction perpendicular to the vertical direction (iii) the cover covers the bump in the first-vertical direction and protrudes from the side of the bump; and (iv) the bump has a recess in the first-vertical direction Covered by the bump, but the recess is not covered by the &amp; block in the second vertical direction, the bump separating the recessed six from the lid body and the pocket is along the vertical direction And the lateral direction extends across a majority of the bump; and a wire comprising a pad and one end Wherein the semiconductor (four) is disposed on the cover, extending over the outer side of the cover along the vertical direction, and extending laterally within the periphery of the recess, the semiconductor component is electrically Is electrically connected to the soldering wire to be electrically connected to the terminal. The semiconductor component is also thermally coupled to the cover to be thermally coupled to the base; wherein the adhesive layer contacts the bump, the base and the cover And between the base and the soldering pad and between the base and the cover, while extending laterally from the bump to the edge terminal or over the terminal and extending to a peripheral edge of the group; The wire is located outside the recess; ', the middle solder pad is co-located with the cover body facing the first-vertical surface; and the ten of the bump and the recess extend into the opening, and the cover The first 201218469 covers the opening in a vertical direction. 77. The assembly of claim 76, wherein the semiconductor component is an LED device and is electrically connected to the pad by a wire and thermally bonded to the cover by a die bonding material. . 78. The assembly of claim 76, wherein the bump is coplanar with the adhesive layer at the cover. 79. The assembly of claim 76, wherein the bonding pad, the terminal and the cover are co-located on a surface facing the first vertical direction, and both extend to the edge of the layer On the outer side of the first vertical direction, the pedestal covers the wire in the second vertical direction and extends laterally outside the cover to the peripheral edge of the set. 80. The assembly of claim 76, wherein the base, the cover, the pad and the terminal are the same metal, and both comprise a gold, silver or a beak surface layer 'but mainly In the case of copper, the bump is mainly copper or all copper. The heat sink includes a copper core shared by the bump and the base, and the wire includes a common pad and the terminal. Copper core. The semiconductor wafer assembly comprises at least: a semiconductor component; an adhesive layer having at least one opening; a heat sink comprising at least one bump, a base and a cover, wherein (1) the bump Adjacent to the base and integral with the base, and extending from the base in a first vertical direction, the protrusion also abuts the cover body, and the cover body is opposite to the first vertical direction Projecting in a second vertical direction, the bumps include first and second bent corners vertically separated from each other; (Π) the base protrudes from the side of the bump along a side perpendicular to a vertical direction such as 201218469 (4) the cover covers the bump in the first-vertical direction and protrudes from the side of the bump: and (iv) the (four) block has a recessed six' in the first vertical direction. Covering the bump, exposing the bump in the second vertical* direction and spacing the recess from the cover, the recess extending across the bump in a vertical direction such as a 及 and the lateral direction Partially, and hollow, and the portion of the projection that forms the recess The second vertical direction is exposed; and a wire includes a pad and a terminal; wherein the semiconductor component is disposed on the cover body and extends outside the first outer side of the cover body along the first vertical direction And extending laterally in the periphery of the recess, the semiconductor component is electrically connected to the pad to be electrically connected. The semiconductor device is also thermally coupled to the cover to be thermally coupled to the base; wherein the adhesive layer contacts the bump, the base and the cover, and is located at the base and the soldering Between and between the base and the cover, extending from the side of the bump 1 to the 4 terminal or over the terminal and extending to the peripheral edge of the reading; wherein the wire is located outside the recess; The pad and the cover are co-located on a surface facing the first vertical direction; and wherein the protrusion and the recess extend into the opening, and the cover covers the opening in the first vertical direction. 82. The assembly of claim 81, wherein the semiconductor component is an LED device and is electrically connected to the pad by a wire, and the bridge is thermally bonded to the cover by a “solid crystal material”. body. 201218469 8 3. The assembly of claim 81, wherein the bump is coplanar with the adhesive layer at the cover. 84. The assembly of claim 81, wherein the bonding pad, the symmetry, and the § 盍 共同 are co-located on a surface facing the first vertical direction, and both extend to the adhesive layer Along the outer side of the first vertical direction, the pedestal covers the wire in the second vertical direction and extends laterally outside the cover to the peripheral edge of the set. 85. The assembly of claim 81, wherein the bump, the base, the cover, the pad and the terminal are the same metal and both comprise a gold, silver or a recording. The surface layer 'but mainly copper' includes a copper core shared by the bump and the base, and the wire includes a copper core shared by the pad and the terminal.