TW201130087A - Semiconductor structures and methods for forming isolation between fin structures of FinFET devices - Google Patents

Semiconductor structures and methods for forming isolation between fin structures of FinFET devices

Info

Publication number
TW201130087A
TW201130087A TW099131581A TW99131581A TW201130087A TW 201130087 A TW201130087 A TW 201130087A TW 099131581 A TW099131581 A TW 099131581A TW 99131581 A TW99131581 A TW 99131581A TW 201130087 A TW201130087 A TW 201130087A
Authority
TW
Taiwan
Prior art keywords
fin structures
oxide layer
structures
fin
methods
Prior art date
Application number
TW099131581A
Other languages
English (en)
Other versions
TWI511234B (zh
Inventor
Andreas Knorr
Frank Scott Johnson
Original Assignee
Globalfoundries Us Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Globalfoundries Us Inc filed Critical Globalfoundries Us Inc
Publication of TW201130087A publication Critical patent/TW201130087A/zh
Application granted granted Critical
Publication of TWI511234B publication Critical patent/TWI511234B/zh

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76224Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
    • H01L21/76229Concurrent filling of a plurality of trenches having a different trench shape or dimension, e.g. rectangular and V-shaped trenches, wide and narrow trenches, shallow and deep trenches
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66477Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66787Unipolar field-effect transistors with an insulated gate, i.e. MISFET with a gate at the side of the channel
    • H01L29/66795Unipolar field-effect transistors with an insulated gate, i.e. MISFET with a gate at the side of the channel with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/785Field effect transistors with field effect produced by an insulated gate having a channel with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET
    • H01L29/7851Field effect transistors with field effect produced by an insulated gate having a channel with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET with the body tied to the substrate
TW099131581A 2009-09-18 2010-09-17 半導體結構及用於在鰭狀場效電晶體裝置之鰭狀結構間形成隔離的方法 TWI511234B (zh)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US12/562,849 US9257325B2 (en) 2009-09-18 2009-09-18 Semiconductor structures and methods for forming isolation between Fin structures of FinFET devices

Publications (2)

Publication Number Publication Date
TW201130087A true TW201130087A (en) 2011-09-01
TWI511234B TWI511234B (zh) 2015-12-01

Family

ID=43755898

Family Applications (1)

Application Number Title Priority Date Filing Date
TW099131581A TWI511234B (zh) 2009-09-18 2010-09-17 半導體結構及用於在鰭狀場效電晶體裝置之鰭狀結構間形成隔離的方法

Country Status (3)

Country Link
US (1) US9257325B2 (zh)
CN (2) CN105428304B (zh)
TW (1) TWI511234B (zh)

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TWI703634B (zh) * 2017-07-28 2020-09-01 大陸商北京北方華創微電子裝備有限公司 蝕刻方法和蝕刻系統

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US8658536B1 (en) * 2012-09-05 2014-02-25 Globalfoundries Inc. Selective fin cut process
CN103794497B (zh) * 2012-10-29 2017-08-01 中芯国际集成电路制造(上海)有限公司 一种半导体器件及其制备方法
CN103811342B (zh) * 2012-11-09 2017-08-25 中国科学院微电子研究所 鳍结构及其制造方法
CN103811320B (zh) * 2012-11-09 2017-08-11 中国科学院微电子研究所 半导体器件及其制造方法
US8697536B1 (en) 2012-11-27 2014-04-15 International Business Machines Corporation Locally isolated protected bulk finfet semiconductor device
KR101983633B1 (ko) 2012-11-30 2019-05-29 삼성전자 주식회사 반도체 장치 및 그 제조 방법
US9023695B2 (en) * 2013-03-14 2015-05-05 Taiwan Semiconductor Manufacturing Company, Ltd. Method of patterning features of a semiconductor device
US9530654B2 (en) * 2013-04-15 2016-12-27 Globalfoundaries Inc. FINFET fin height control
US9087870B2 (en) 2013-05-29 2015-07-21 GlobalFoundries, Inc. Integrated circuits including FINFET devices with shallow trench isolation that includes a thermal oxide layer and methods for making the same
US9515184B2 (en) 2013-09-12 2016-12-06 Taiwan Semiconductor Manufacturing Company Limited Semiconductor arrangement with multiple-height fins and substrate trenches
TWI552232B (zh) * 2013-11-25 2016-10-01 Nat Applied Res Laboratories The Method and Structure of Fin - type Field Effect Transistor
WO2015099691A1 (en) 2013-12-23 2015-07-02 Intel Corporation Advanced etching techniques for straight, tall and uniform fins across multiple fin pitch structures
US9159794B2 (en) * 2014-01-16 2015-10-13 Globalfoundries Inc. Method to form wrap-around contact for finFET
US9385123B2 (en) 2014-05-20 2016-07-05 International Business Machines Corporation STI region for small fin pitch in FinFET devices
US9847333B2 (en) * 2015-03-09 2017-12-19 Globalfoundries Inc. Reducing risk of punch-through in FinFET semiconductor structure
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US10622457B2 (en) 2015-10-09 2020-04-14 International Business Machines Corporation Forming replacement low-K spacer in tight pitch fin field effect transistors
US9412616B1 (en) * 2015-11-16 2016-08-09 Globalfoundries Inc. Methods of forming single and double diffusion breaks on integrated circuit products comprised of FinFET devices and the resulting products
US9559192B1 (en) 2015-11-18 2017-01-31 Samsung Electronics Co., Ltd. Method of fabricating semiconductor device
US9679763B1 (en) 2015-11-20 2017-06-13 International Business Machines Corporation Silicon-on-insulator fin field-effect transistor device formed on a bulk substrate
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EP3182461B1 (en) * 2015-12-16 2022-08-03 IMEC vzw Method for fabricating finfet technology with locally higher fin-to-fin pitch
US9716042B1 (en) 2015-12-30 2017-07-25 International Business Machines Corporation Fin field-effect transistor (FinFET) with reduced parasitic capacitance
CN107346759B (zh) * 2016-05-06 2020-03-10 中芯国际集成电路制造(上海)有限公司 半导体结构及其制造方法
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US10068810B1 (en) * 2017-09-07 2018-09-04 Globalfoundries Inc. Multiple Fin heights with dielectric isolation
US10680109B2 (en) * 2017-09-28 2020-06-09 Taiwan Semiconductor Manufacturing Co., Ltd. CMOS semiconductor device having fins and method of fabricating the same
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US10957781B2 (en) * 2018-07-31 2021-03-23 International Business Machines Corporation Uniform horizontal spacer
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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI703634B (zh) * 2017-07-28 2020-09-01 大陸商北京北方華創微電子裝備有限公司 蝕刻方法和蝕刻系統

Also Published As

Publication number Publication date
CN105428304B (zh) 2020-12-29
CN105428304A (zh) 2016-03-23
US9257325B2 (en) 2016-02-09
TWI511234B (zh) 2015-12-01
CN102024743A (zh) 2011-04-20
US20110068431A1 (en) 2011-03-24

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