CN106233452B8 - 由局部硅外延籽晶形成的体晶片中的隔离半导体层 - Google Patents

由局部硅外延籽晶形成的体晶片中的隔离半导体层 Download PDF

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CN106233452B8
CN106233452B8 CN201580018939.3A CN201580018939A CN106233452B8 CN 106233452 B8 CN106233452 B8 CN 106233452B8 CN 201580018939 A CN201580018939 A CN 201580018939A CN 106233452 B8 CN106233452 B8 CN 106233452B8
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layer
seed
buried isolation
semiconductor layer
isolated semiconductor
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CN106233452A (zh
CN106233452B (zh
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D·N·卡罗瑟斯
J·R·德博尔
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Texas Instruments Inc
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Texas Instruments Inc
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    • H01L21/76264—SOI together with lateral isolation, e.g. using local oxidation of silicon, or dielectric or polycristalline material refilled trench or air gap isolation regions, e.g. completely isolated semiconductor islands
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Abstract

在所描述的示例中，一种集成电路(100)可以通过在基于单晶硅的衬底(102)中的隔离槽(118)内形成埋入式隔离层(124)来形成。在埋入式隔离层(124)处的衬底(102)的裸露侧表面(132)被电介质侧壁(136)覆盖。籽晶沟槽(140)穿过埋入式隔离层(124)形成以曝露出衬底(102)。基于单晶硅的籽晶层(144)穿过籽晶沟槽(140)形成并且延伸高于埋入式隔离层(124)的顶表面(126)。硅基非晶层(150)被形成为与籽晶层(144)接触。保护层(152)被形成在非晶层(146)上方。辐射感应的再结晶工艺将非晶层(150)转换为与籽晶层(144)对齐的单晶层。保护层(152)被移除并且单晶层被平坦化，留下在埋入式隔离层(124)上方的隔离半导体层。
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Correction item: Priority

Correct: 61/978,935 2014.04.13 US|14/301,788 2014.06.11 US

False: 61/978,935 2014.04.13 US

Number: 26-02

Page: The title page

Volume: 39

Correction item: Priority

Correct: 61/978,935 2014.04.13 US|14/301,788 2014.06.11 US

False: 61/978,935 2014.04.13 US

Number: 26-02

Volume: 39