200913002 九、發明說明 【發明所屬之技術領域】 本發明係關於一種電漿處理裝置及高頻電流之短路電 路’尤其是關於對基板施予電漿處理之電漿處理裝置。 【先前技術】 對第7世代或第8世代之液晶面板用的玻璃基板施予蝕 刻處理的電漿處理裝置5 0係如第6圖所不，具備收納玻璃 基板（以下簡稱爲「基板」。）G之腔室51、載置該基板G 之下部電極52、與該下部電極52對向之噴灑頭53的上部電 極54。在該電漿處理裝置50中，利用高頻電場激起供給到 上部電極54與下部電極52之間的空間（以下稱爲「處理空 間」。）之處理氣體而產生電漿，利用該電漿對基板G施 予蝕刻處理。 在電漿處理裝置5 0中，利用接地基板5 5支撐下部電極 52 ’該接地基板55係介由可上下方向移動的柱56及伸縮體 5 7而連接在腔室5 1。由於腔室係爲接地，在蝕刻處理時， 高頻電流係以上部電極54 —處理空間S的電漿—下部電極 5 2 —接地基板55 —柱56 —伸縮體57 —腔室51的路徑流通。 在此’由於柱56與伸縮體57由導電體構成，接地基板55雖 然與腔室51在直流爲同電位，但是由於藉由柱56或伸縮體 5 7而發生電抗’在交流則無法成爲同電位。 又由於第7世代或第8世代的液晶面板非常大，因此下 部電極5 2或接地基板5 5也變得非常大，其結果爲使接地基 200913002 板55與腔室51壁面之間的空間也變得非常大。再者，在交 流無法成爲同電位的接地基板5 5與腔室5 1壁面之間由於產 生電位差，在下部空間也使高頻電流流通而發生電容耦合 電漿或異常放電。根據該電漿，使得處理空間的電漿密度 降低，惡化均勻性。又根據異常放電，使得電力效率降低 ，進一步切削接地基板5 5而產生顆粒。 因此，在電漿處理裝置50中，設置使接地基板55與腔 室1 1壁面在交流短路之由導電性材料所構成的薄板狀之短 路板5 8 (例如參照專利文獻1)。 [專利文獻1]日本專利3 7 1 00 8 1號公報 【發明內容】 (發明所欲解決之課題） 然而，對第7世代或第8世代的液晶面板用基板G施 予飩刻處理，必須供給高電力，例如1 〇kW以上的高頻電 力至處理空間。此時，流通處理空間或接地基板5 5的高頻 電流係達到1 〇〇 A以上。又短路板5 8係具有自身電感，對 應高頻電流會產生感應性電抗（阻抗）。其結果爲接地基板 5 5的電位係呈現數100V的高頻電壓。 爲了使接地基板55的電位減低’增加短路板58的數量 係爲最有效的’但是在下部空間由於配置升降銷支架 (Lifter Pin Holder)等構成零件，沒有多餘的空間，因此 要增加短路板58的數量也是困難的。 因此，仍然無法消除接地基板5 5與腔室5 1壁面之間的 -5- 200913002 電位差，根據該電位差，恐怕會發生電容耦合電漿或異常 放電。 本發明的目的係提供一種能夠減低在支撐下部電極或 上部電極之至少一方的接地基板與收納容器內壁之間的電 位差之電漿處理裝置及高頻電流之短路電路。 (解決課題之手段） 爲了達成上述目的，申請專利範圍第1項之電漿處理 裝置，係針對具備：收納基板之收納容器；配置在該收納 容器內並作爲載置前述基板的載置台之下部電極；與該下 部電極對向配置，且供給處理氣體至前述收納容器內之上 部電極；連接在前述下部電極或前述上部電極之至少一方 的高頻電源；介由絕緣部支撐前述下部電極或前述上部電 極之至少一方的同時，且與前述收納容器內壁間隔配置之 接地基板；及使該接地基板與前述收納容器內壁短路之短 路板的電漿處理裝置，其特徵爲：在前述短路板與前述收 納容器內壁之間介在電容器，該電容器係設置在前述收納 容器內壁。 申請專利範圍第2項之電漿處理裝置，係針對申請專 利範圍第1項之電漿處理裝置，在使前述電容器的電容性 電抗爲Xc，前述短路板的感應性電抗爲XL之情況下，使 Xc = -XL/2成立。 申請專利範圍第3項之電漿處理裝置，係針對申請專 利範圍第1或2項之電漿處理裝置，前述電容器係由絕緣層 -6- 200913002 與挾持該絕緣層的2個導電體構成，前述絕緣層係選自陶 瓷板、溶射陶瓷層及氟樹脂層所構成的組群中之一種。 申請專利範圍第4項之電漿處理裝置，係針對申請專 利範圍第1項之電漿處理裝置，在前述短路板與前述接地 基板之間介在另一電容器，該另一電容器係設置在前述接 地基板，在使前述電容器的靜電電容爲C 1，前述短路板 的自身電感爲L，前述另一電容器的靜電電容爲C2，前 述高頻電源所供給的高頻電力之頻率爲f，角頻率ω爲 2nf之情況下，使Cl=C2 = 2/(co2xL)成立。 爲了達成上述目的，申請專利範圍第5項之電漿處理 裝置，係針對具備：收納基板之收納容器；配置在該收納 容器內並作爲載置前述基板的載置台之下部電極；與該下 部電極對向配置，且供給處理氣體至前述收納容器內之上 部電極；連接在前述下部電極或前述上部電極之至少一方 的高頻電源；介由絕緣部支撐前述下部電極或前述上部電 極之至少一方的同時，且與前述收納容器內壁間隔配置之 接地基板；及使該接地基板與前述收納容器內壁短路之短 路板的電漿處理裝置，其特徵爲：前述短路板係由剖面爲 矩形直線導體構成，並在中途分岔爲至少2個。 申請專利範圍第6項之電漿處理裝置，係針對申請專 利範圍第5項之電漿處理裝置，在前述短路板與前述收納 容器內壁之間介在電容器，該電容器係設置在前述收納容 器內壁。 爲了達成上述目的，申請專利範圍第7項之高頻電流 200913002 之短路電路，係爲使電漿處理裝置中的接地基板與收納容 器內壁短路之高頻電流之短路電路，該電漿處理裝置具備 :收納基板之收納容器；配置在該收納容器內並作爲載置 前述基板的載置台之下部電極；與該下部電極對向配置， 且供給處理氣體至前述收納容器內之上部電極；連接在前 述下部電極或前述上部電極之至少一方的高頻電源；及介 由絕緣部支撐前述下部電極或前述上部電極之至少一方的 同時，且與前述收納容器內壁間隔配置之接地基板，其特 徵爲：具有使前述接地基板與前述收納容器內壁短路的短 路板、及介在該短路板與前述收納容器內壁之間的電容器 ，該電容器係設置在前述收納容器內壁。 爲了達成上述目的，申請專利範圍第8項之高頻電源 之短路電路，係爲使電槳處理裝置之接地基板與收納容器 內壁短路的高頻電流之短路電路，該電漿處理裝置具備： 收納基板之收納容器；配置在該收納容器內並作爲載置前 述基板的載置台之下部電極；與該下部電極對向配置，且 供給處理氣體至前述收納容器內之上部電極；連接在前述 下部電極或前述上部電極之至少一方的高頻電源；及介由 絕緣部支撐前述下部電極或前述上部電極之至少一方的同 時，且與前述收納容器內壁間隔配置之接地基板，其特徵 爲：具有使前述接地基板與前述收納容器內壁短路的短路 板，該短路板係由剖面爲矩形直線導體構成，並在中途分 岔爲至少2個。 若是根據申請專利範圍第1項之電漿處理裝置及申請 -8- 200913002 專利範圍第7項之高頻電流之短路電路的話’因爲在使接 地基板與收納容器內壁短路的短路板及該收納容器內壁之 間介在電容器，因此能夠利用短路板及電容器分擔在接地 基板與收納容器內壁之間的電位差。又因爲電容器係設置 在收納容器的內壁，因此接地基板與收納容器內壁之間的 電位差在實質上爲接地基板與電容器之間的電位差’該電 位差也就是短路板所分擔的電位差。因此’能夠減低在支 撐下部電極或上部電極之至少一方的接地基板與收納容器 內壁之間的電位差。 若是根據專利範圍第2項之電漿處理裝置的話’使電 容器的電容性電抗Xc與短路板的感應性電抗Xl滿足 Xc = -XL/2。當使高頻電流爲I時，在短路板與該收納容器 內壁之間沒有介在電容器的情況下之接地基板的電位V 1 係以V ,与X L X I所示，在短路板與該收納容器內壁之間介 在電容器的情況下之接地基板的電位V2係以 V2 — (Xl + Xc)xI所示。在此，因爲使Xc = _xl/2成立’因此 變成V2%l/2xXLxI。也就是說，可以使V2達到Vi的1/2’ 因此能夠確實減低短路板所分擔的電位差。又此時由於電 容器所分擔的電位差也達到V !的1 /2 ’因此無論是接地基 板與電容器之間，以及電容器與收納容器內壁之間的電位 差都可以適當減低，因此能夠在接地基板與電容器之間、 或電容器與收納容器內壁之間，防止電容耦合電漿或異常 放電的發生。 若是根據申請專利範圍第4項之電漿處理裝置的話’ -9- 200913002 在短路板與接地基板之間介在另一電容器，該另一電容器 係設置在接地基板，使電容器的靜電電容C1、短路板的 自身電感L、另一電容器的靜電電容C2、及高頻電力的 頻率爲f時的角頻率ω( = 2πί·)滿足Cl = C2 = 2/(〇2xL)。當高 頻電流爲I時，在短路板與該收納容器內壁之間介在電容 器，且在短路板與接地基板之間介在另一電容器的情況下 之接地基板的電位V3，當電容器的電容性電抗爲Xc !，另 一電容器的電容性電抗爲XC2，短路板的感應性電抗爲XL 時，係以 （XC1+XL + Xc)xI表示，進一步展開時，電位v3 係以（-1/(c〇xC1) + 〇)xL-1/(c〇xC2))xI 表示。在此，因爲使 Cl=C2 = 2/(to2xL)成立，因此達到V3 40。也就是說，由於 能夠使接地基板的電位達到0，因此能夠在接地基板的附 近，防止電容耦合電漿或異常放電的發生。 若是根據申請專利範圍第5項之電漿處理裝置及申請 專利範圍第8項之高頻電流之短路電路的話，使接地基板 與收納容器內壁短路的短路板係由剖面爲矩形的直線導體 構成，並在中途分岔爲至少2個。雖然分岔短路板時，各 分岔路的剖面積爲減少的，但是能夠增加高頻電流的路徑 ，其結果爲能夠使短路板整體的電感降低。藉此，能夠降 低接地基板的電位，因此，能夠減低在支撐下部電極或上 部電極之至少一方的接地基板與收納容器內壁之間的電位 差。 若是根據申請專利範圍第6項之電漿處理裝置的話， 因爲在短路板與收納容器內壁之間介在電容器，因此能夠 -10 - 200913002 利用短路板及電容器分擔在接地基板與收納容器內壁之間 的電位差，可以使接地基板與收納容器內壁之間的電位差 更進一步減低。 【實施方式】 (用以實施發明之最佳形態） 以下，針對本發明之實施形態，一邊參照圖面一邊說 明。 首先，針對關於本發明之第1實施形態的電漿處理裝 置加以說明。 第1圖係爲槪略顯示關於本實施形態之電漿處理裝置 的構成之剖面圖。該電漿處理裝置係以對液晶顯示器 (LCD)用的玻璃基板施予蝕刻處理的方式加以構成。 在第1圖中，電漿處理裝置1 〇係具有收納例如一邊約 爲1 m的矩形玻璃基板（以下簡稱爲「基板」。）G之角筒形 狀的腔室1 1 (收納容器）。該腔室1 1係由鋁構成，該腔室1 1 的內壁幾乎是利用防餓錦（alumite)加以覆蓋。 在腔室11的天井部係配置噴灑頭12(上部電極），該噴 灑頭1 2係具有矩形導電性平板的上部電極板1 3、可自由連 接/分離垂掛該上部電極板1 3之由導電體構成的上部電極 基部1 4。在上部電極基部1 4內部係設置緩衝室1 5，在該緩 衝室15係連接處理氣體導入管16。又上部電極板13係具有 連通緩衝室I5與腔室11內的複數個氣體孔17。處理氣體導 入管1 6係連接在處理氣體供給裝置（未圖示），該處理氣體 -11 - 200913002 供給裝置係介由處理氣體導入管1 6將處理氣體導入至緩衝 室1 5。噴灑頭1 2係介由氣體孔丨7將導入至緩衝室][5的處理 氣體供給至上部電極板13與後述的下部電極板23之間的空 間（以下稱爲「處理空間S」。）。在此，因爲噴灑頭1 2係 介由上部絕緣部2 2而從腔室1的天井部垂掛，因此噴灑頭 1 2係由腔室1 1成爲充分電氣懸浮。 上部電極13係介由上部電極基部14、整合電路18、與 導電路19連接在高頻電源20。又在腔室11的天井部上係以 包含整合電路的方式設置匹配箱21。由於該匹配箱21係爲 接地’而具有作爲整合電路1 8的接地框體之機能。高頻電 源20係將既定的局頻電力，例如13.56MHz的高頻電力供 給至上部電極板1 3。再者’上部電極板丨3係施加高頻電壓 至處理空間S ’而產生高頻電場。該高頻電場係激起供給 至處理空間S的處理氣體而產生電漿。又就處理氣體而言 ’係採用例如含有鹵素的氣體’具體而言爲由鹵素化合物 構成的氣體、氧氣及氬氣等。 在腔室11底部係配置兼作爲載置基板G的載置台之 矩形的下部電極板23。該下部電極板23係與上部電極板13 對向的同時’且介由下部絕緣部2 5利用由鋁構成的接地基 板2 6加以支撐。又接地基板2 6係從腔室1 1底部間隔配置， 並利用圓筒狀的柱2 7加以支撐。該柱2 7係配置在利用未圖 示的驅動機構而朝上下方向（圖中箭頭方向）移動的支撐板 2 8上。因此伴隨著支撐板2 8的上下移動，使接地基板2 6或 下部電極板23也上下移動。支撐板28係介由伸縮體29而與 -12 - 200913002 腔室1 1底部連接，該伸縮體29係密閉性區分腔室11內及腔 室1 1外。又柱27、支撐板28、及伸縮體29全都是由導電體 構成。 在下部電極板23內係設置冷卻流路（未圖示），利用流 通該冷卻流路的冷媒，冷卻載置在下部電極板2 3上的基板 G。下部絕緣部25係由介電體或大氣層構成，並使下部電 極板23係由接地基板26、接著腔室1 1成爲充分電氣懸浮。 在下部電極板23係連接設置在柱27內的導電路30之一 端，在該導電路30係設置阻抗調整部31。導電路3〇的另一 端係介由支撐板28與伸縮體29而連接在腔室1 1底部。在本 實施形態中，上部電極板1 3與下部電極板2 3係各自相當於 陰極電極與陽極電極。 在腔室11底部係連接排氣通路32，在該排氣通路3 2係 連接未圖示的排氣裝置，例如渦輪分子泵或乾式泵。排氣 裝置係介由排氣通路32將腔室11內進行排氣。進一步，在 腔室1 1的側壁係設置開/關基板G的搬送口 3 3之閘閥3 4。 在電漿處理裝置10中，雖然以高頻電源20 —整合電路 18 —噴灑頭12 —處理空間S的電漿—下部電極板23 —阻抗 調整部3 1 —腔室1 1 —匹配箱2 1 —接地的路徑流通高頻電流 ，由於恐怕會使高頻電流介由電漿從噴灑頭1 2短路性流通 到腔室1 1的壁部，因此利用阻抗調整部3 1調整從下部電極 板23到匹配箱21路徑的阻抗，而防止高頻電流短路性流通 至腔室1 1的壁部。 又在電漿處理裝置10中，藉由供給高頻電力至處理空 -13- 200913002 間S而產生高頻電場，激起在該處理空間s中來自噴灑頭 所供給的處理氣體而產生高密度電漿，利用該電漿對基板 G施予蝕刻處理。 又電漿處理裝置10的各構成零件的動作係使具備電漿 處理裝置10的控制部（未圖示）之CPU因應對應蝕刻處理的 程式加以控制。 進一步，電漿處理裝置10係具備使接地基板26與腔室 11內壁短路的短路板36、及介在該短路板36與腔室11內壁 之間的電容器3 7。短路板3 6係爲由金屬等導電性材料，例 如不鏽鋼或赫史特合金（hastelloy)(商標登錄）構成之剖面 矩形的薄板狀導體。 短路板36的一端係介由連接部38連接在接地基板26的 下面，短路板3 6的另一端係連接在設置於腔室1 1內壁，具 體而言爲腔室11底部的電容器37。 電容器37係由絕緣層37a、及挾持該絕緣層37a之由 鋁板等2塊金屬板3 7b、3 7c所構成，有可能與電漿接觸的 部份係利用防蝕鋁等絕緣膜加以被覆。又絕緣層37a係例 如由陶瓷板、溶射陶瓷層或氟樹脂層（鐵氟龍（商標登錄） 層）所構成。作爲該電容器係除了上述的形態之外，也可 以採用具有耐電漿性之市售的真空電容器或可變電容器。 在該電漿處理裝置10中，係將短路板36與電容器37構 成爲使接地基板26與腔室1 1內壁短路的短路電路。 又在電漿處理裝置1 0中，當使高頻電流流通在接地基 板26與腔室1 1內壁之間，由於短路板36具有自身電感，因 • 14 - 200913002 此在短路板係產生感應性電抗’又由於電容器37具有靜電 電容，因此在電容器37係產生電容性電抗。又在電漿處理 裝置10中，因爲使電容器3 7介在於短路板3 6與腔室11內壁 之間，因此短路板36與電容器37係在接地基板26與腔室u 內壁之間形成爲串聯電路。因此，短路板3 6與電容器3 7係 能夠分擔在高頻電流流通接地基板26與腔室1 1內壁之間時 所產生的電位差。 在此，當將腔室11內壁設定爲接地電位，短路板36的 阻抗設定爲ZL，電容器3 7的阻抗設定爲Zc，流通接地基 板26與腔室1 1內壁之間的高頻電流設定爲I時，接地基板 26的電位V2係以下式（1)所示。 V2 = (Zl + Zc) x I … （1 ) 通常，雖然ZL或ZC係以R+jX(X係爲電抗），但是在 電漿處理裝置1 〇中R係與X相比爲非常小而可以無視。 Η此’在本實施形態中，當將短路板36的感應性電抗設定 爲XL ’電容器37的電容性電抗設定爲Xc時，接地基板26 的電位V2係以下式（2)所示。 V2 ^ (XL + Xc)xI ··· (2) 在本實施形態中，藉由調整電容器37的靜電電容而減 低電位V2。具體而言，以成立下式（3)的方式調整電容器 -15 - 200913002 3 7的靜電電容。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a plasma processing apparatus and a short-circuit circuit for high-frequency currents, particularly to a plasma processing apparatus for applying a plasma treatment to a substrate. [Prior Art] The plasma processing apparatus 50 that etches the glass substrate for the liquid crystal panel of the seventh or eighth generation is a storage glass substrate (hereinafter simply referred to as a "substrate") as shown in Fig. 6 . The cavity 51 of the G, the lower electrode 52 of the substrate G, and the upper electrode 54 of the shower head 53 opposed to the lower electrode 52. In the plasma processing apparatus 50, a processing gas supplied to a space (hereinafter referred to as a "processing space" between the upper electrode 54 and the lower electrode 52 is excited by a high-frequency electric field to generate plasma, and the plasma is used. The substrate G is subjected to an etching treatment. In the plasma processing apparatus 50, the lower electrode 52' is supported by the ground substrate 55. The ground substrate 55 is connected to the chamber 51 by a column 56 and an expandable body 57 which are vertically movable. Since the chamber is grounded, during the etching process, the high-frequency current is the upper electrode 54 - the plasma of the processing space S - the lower electrode 5 2 - the ground substrate 55 - the column 56 - the expandable body 57 - the path of the chamber 51 . Here, since the column 56 and the expandable body 57 are made of a conductor, the ground substrate 55 is at the same potential as the DC of the chamber 51, but the reactance is generated by the column 56 or the expandable body 57. Potential. Further, since the liquid crystal panel of the seventh or eighth generation is very large, the lower electrode 52 or the ground substrate 55 also becomes very large, and as a result, the space between the ground plate 200913002 plate 55 and the wall surface of the chamber 51 is also It has become very big. Further, a potential difference is generated between the ground substrate 55 and the wall surface of the chamber 5 1 where the AC cannot be at the same potential, and a high-frequency current flows in the lower space to cause capacitive coupling plasma or abnormal discharge. According to the plasma, the plasma density of the processing space is lowered to deteriorate the uniformity. Further, according to the abnormal discharge, the power efficiency is lowered, and the ground substrate 5 is further cut to generate particles. Therefore, in the plasma processing apparatus 50, a thin-plate-shaped short-circuiting plate 58 made of a conductive material that short-circuits the ground plate 55 and the wall surface of the chamber 1 1 is provided (see, for example, Patent Document 1). [Patent Document 1] Japanese Patent Laid-Open Publication No. 3-7 00 8 1 (Problems to be Solved by the Invention) However, it is necessary to apply a etching process to the substrate G for a liquid crystal panel of the seventh or eighth generation. Supply high-frequency power, for example, high-frequency power of 1 〇 kW or more to the processing space. At this time, the high-frequency current flowing through the processing space or the ground substrate 55 is 1 〇〇 A or more. Further, the short-circuiting plate 58 has its own inductance, and an inductive reactance (impedance) is generated in response to the high-frequency current. As a result, the potential of the ground substrate 55 exhibits a high frequency voltage of several hundred volts. In order to reduce the potential of the ground substrate 55, it is most effective to increase the number of the short-circuit plates 58. However, since the lower space is configured by a lifter pin holder or the like, there is no unnecessary space, so the short-circuit plate 58 is added. The number is also difficult. Therefore, the potential difference of -5 - 200913002 between the ground substrate 5 5 and the wall surface of the chamber 5 1 cannot be eliminated, and depending on the potential difference, a capacitive coupling plasma or an abnormal discharge may occur. SUMMARY OF THE INVENTION An object of the present invention is to provide a plasma processing apparatus and a high-frequency current short-circuiting circuit capable of reducing a potential difference between a ground substrate supporting at least one of a lower electrode and an upper electrode and an inner wall of a storage container. (Means for Solving the Problem) In order to achieve the above object, the plasma processing apparatus according to the first aspect of the invention is directed to a storage container including a storage substrate, and is disposed in the storage container as a lower portion of the mounting table on which the substrate is placed. An electrode disposed opposite to the lower electrode and supplying a processing gas to an upper electrode of the storage container; a high-frequency power source connected to at least one of the lower electrode or the upper electrode; and the lower electrode or the aforementioned via the insulating portion a plasma processing apparatus in which at least one of the upper electrodes is disposed at a distance from the inner wall of the storage container; and a short circuit plate that short-circuits the ground substrate and the inner wall of the storage container is characterized in that the short circuit plate A capacitor is interposed between the inner wall of the storage container and the capacitor is disposed on the inner wall of the storage container. The plasma processing apparatus of the second aspect of the patent application is directed to the plasma processing apparatus of claim 1, wherein the capacitive reactance of the capacitor is Xc and the inductive reactance of the short-circuiting board is XL. Let Xc = -XL/2 be true. The plasma processing apparatus of claim 3 is directed to the plasma processing apparatus of claim 1 or 2, wherein the capacitor is composed of an insulating layer -6-200913002 and two conductors holding the insulating layer. The insulating layer is selected from the group consisting of a ceramic plate, a molten ceramic layer, and a fluororesin layer. The plasma processing apparatus of claim 4 is directed to the plasma processing apparatus of claim 1, wherein another capacitor is disposed between the short circuit board and the ground substrate, and the other capacitor is disposed at the ground. In the substrate, the electrostatic capacitance of the capacitor is C1, the self-inductance of the short-circuiting plate is L, the electrostatic capacitance of the other capacitor is C2, and the frequency of the high-frequency power supplied by the high-frequency power source is f, and the angular frequency ω In the case of 2nf, let Cl=C2 = 2/(co2xL) hold. In order to achieve the above object, a plasma processing apparatus according to a fifth aspect of the invention is directed to a storage container including a storage substrate, and a lower surface electrode disposed in the storage container as a substrate on which the substrate is placed; and the lower electrode Disposing, supplying a processing gas to an upper electrode in the storage container; connecting a high-frequency power source to at least one of the lower electrode or the upper electrode; and supporting at least one of the lower electrode or the upper electrode via an insulating portion Further, a plasma processing apparatus in which a ground substrate disposed at an interval from the inner wall of the storage container and a short-circuiting plate short-circuiting the ground substrate and the inner wall of the storage container are characterized in that the short-circuiting plate is a rectangular straight conductor having a cross section It consists of at least two in the middle. The plasma processing apparatus of claim 6 is directed to the plasma processing apparatus of claim 5, wherein a capacitor is interposed between the short-circuiting plate and the inner wall of the storage container, and the capacitor is disposed in the storage container. wall. In order to achieve the above object, the short-circuit circuit of the high-frequency current 200913002 of claim 7 is a short-circuit circuit for short-circuiting the grounded substrate in the plasma processing apparatus and the inner wall of the storage container, and the plasma processing apparatus a storage container for accommodating a substrate, an electrode disposed in the storage container as a lower surface of the mounting table on which the substrate is placed, a counter electrode disposed opposite to the lower electrode, and a processing gas supplied to the upper electrode of the storage container; a high-frequency power source of at least one of the lower electrode and the upper electrode; and a ground substrate that is disposed at least while the lower electrode or the upper electrode is supported by the insulating portion, and is disposed at an interval from the inner wall of the storage container. A short-circuiting plate for short-circuiting the grounding substrate and the inner wall of the storage container, and a capacitor interposed between the short-circuiting plate and the inner wall of the storage container, the capacitor being provided on the inner wall of the storage container. In order to achieve the above object, the short-circuit circuit of the high-frequency power source of the eighth aspect of the patent application is a short-circuit circuit of a high-frequency current that short-circuits the ground substrate of the electric paddle processing device and the inner wall of the storage container, and the plasma processing device includes: a storage container for accommodating the substrate; an electrode disposed in the storage container as a lower surface of the mounting table on which the substrate is placed; a counter electrode disposed opposite to the lower electrode; and a processing gas supplied to the upper electrode of the storage container; a high-frequency power source of at least one of the electrode and the upper electrode; and a ground substrate that is disposed at least one of the lower electrode or the upper electrode via the insulating portion and spaced apart from the inner wall of the storage container, and has a feature The short-circuiting plate that short-circuits the grounding substrate and the inner wall of the storage container is formed of a rectangular straight conductor having a cross section, and is branched into at least two in the middle. In the case of the plasma processing apparatus according to the first application of the patent application and the short-circuit circuit of the high-frequency current of the seventh application of the Japanese Patent Application No. -8-200913002, the short-circuiting plate and the housing for short-circuiting the grounding substrate and the inner wall of the storage container Since the inner wall of the container is interposed between the capacitors, the potential difference between the ground substrate and the inner wall of the storage container can be shared by the short-circuit plate and the capacitor. Further, since the capacitor is provided on the inner wall of the storage container, the potential difference between the ground substrate and the inner wall of the storage container is substantially the potential difference between the ground substrate and the capacitor. This potential difference is the potential difference shared by the short-circuit plate. Therefore, the potential difference between the ground substrate supporting at least one of the lower electrode and the upper electrode and the inner wall of the storage container can be reduced. According to the plasma processing apparatus of the second aspect of the patent, the capacitive reactance Xc of the capacitor and the inductive reactance X1 of the short-circuiting plate satisfy Xc = -XL/2. When the high-frequency current is I, the potential V 1 of the ground substrate in the case where there is no capacitor between the short-circuit plate and the inner wall of the storage container is V, as shown by XLXI, in the short-circuit plate and the storage container The potential V2 of the ground substrate between the walls in the case of a capacitor is represented by V2 - (Xl + Xc) xI. Here, since Xc = _xl/2 holds ", it becomes V2%l/2xXLxI. That is to say, it is possible to make V2 reach 1/2' of Vi, so that the potential difference shared by the short-circuiting plates can be surely reduced. At this time, since the potential difference shared by the capacitor also reaches 1 /2 ' of V ! Therefore, the potential difference between the ground substrate and the capacitor and between the capacitor and the inner wall of the storage container can be appropriately reduced, so that the ground substrate can be Between the capacitors, or between the capacitor and the inner wall of the container, the occurrence of capacitive coupling of plasma or abnormal discharge is prevented. If it is according to the plasma processing device of the fourth application patent range -9- 200913002, another capacitor is placed between the short-circuit plate and the ground substrate, and the other capacitor is disposed on the ground substrate to short-circuit the capacitance C1 of the capacitor. The angular inductance ω (= 2πί·) of the self-inductance L of the board, the electrostatic capacitance C2 of the other capacitor, and the frequency of the high-frequency power f is satisfied with Cl = C2 = 2/(〇2xL). When the high-frequency current is I, the capacitor is placed between the short-circuit plate and the inner wall of the storage container, and the potential V3 of the ground substrate is interposed between the short-circuit plate and the ground substrate in the case of another capacitor, when the capacitance of the capacitor The reactance is Xc !, the capacitive reactance of the other capacitor is XC2, and the inductive reactance of the short-circuiting plate is XL, which is expressed by (XC1+XL + Xc)xI. When further developed, the potential v3 is (-1/( c〇xC1) + 〇)xL-1/(c〇xC2))xI is expressed. Here, since Cl = C2 = 2 / (to 2xL) is established, V3 40 is reached. That is, since the potential of the ground substrate can be made zero, it is possible to prevent the occurrence of capacitive coupling plasma or abnormal discharge in the vicinity of the ground substrate. In the case of the plasma processing apparatus according to item 5 of the patent application and the short-circuit circuit of the high-frequency current of claim 8 of the patent application, the short-circuiting plate which short-circuits the ground substrate and the inner wall of the storage container is composed of a linear conductor having a rectangular cross section. And divide it into at least two in the middle. When the short-circuiting plate is branched, the sectional area of each of the branching paths is reduced, but the path of the high-frequency current can be increased, and as a result, the inductance of the entire short-circuiting plate can be lowered. As a result, the potential of the ground substrate can be lowered. Therefore, the potential difference between the ground substrate supporting at least one of the lower electrode and the upper electrode and the inner wall of the storage container can be reduced. According to the plasma processing apparatus of the sixth application of the patent application, since the capacitor is interposed between the short-circuiting plate and the inner wall of the storage container, it is possible to share the grounding substrate and the inner wall of the storage container by the short-circuit plate and the capacitor from -10 to 200913002. The potential difference between the ground plate and the inner wall of the storage container can be further reduced. [Embodiment] (Best Mode for Carrying Out the Invention) Hereinafter, an embodiment of the present invention will be described with reference to the drawings. First, a plasma processing apparatus according to a first embodiment of the present invention will be described. Fig. 1 is a cross-sectional view showing the configuration of a plasma processing apparatus according to the present embodiment. This plasma processing apparatus is configured to etch a glass substrate for a liquid crystal display (LCD). In the first embodiment, the plasma processing apparatus 1 has a cylindrical chamber 1 1 (storage container) in which a rectangular glass substrate (hereinafter simply referred to as "substrate") G is placed, for example, about 1 m. The chamber 11 is made of aluminum, and the inner wall of the chamber 11 is almost covered with an alumite. A shower head 12 (upper electrode) is disposed on a patio portion of the chamber 11, and the shower head 12 is an upper electrode plate 13 having a rectangular conductive plate, and is electrically connectable/detachably suspended from the upper electrode plate 13 The upper electrode base portion 14 of the body. A buffer chamber 15 is provided inside the upper electrode base portion 14, and the processing gas introduction pipe 16 is connected to the buffer chamber 15. Further, the upper electrode plate 13 has a plurality of gas holes 17 communicating with the buffer chamber I5 and the chamber 11. The process gas introduction pipe 16 is connected to a process gas supply device (not shown) which introduces the process gas into the buffer chamber 15 via the process gas introduction pipe 16 through the process gas supply unit -11 - 200913002. The sprinkler head 12 supplies the processing gas introduced into the buffer chamber [5] through the gas orifices 7 to the space between the upper electrode plate 13 and the lower electrode plate 23 to be described later (hereinafter referred to as "processing space S"). . Here, since the shower head 12 is suspended from the ceiling portion of the chamber 1 via the upper insulating portion 22, the shower head 12 is sufficiently electrically suspended by the chamber 11. The upper electrode 13 is connected to the high-frequency power source 20 via the upper electrode base 14, the integration circuit 18, and the AND circuit 19. Further, a matching box 21 is provided on the ceiling portion of the chamber 11 so as to include an integrated circuit. Since the matching box 21 is grounded, it has a function as a grounded frame of the integrated circuit 18. The high frequency power source 20 supplies a predetermined local frequency power, for example, a high frequency power of 13.56 MHz, to the upper electrode plate 13. Further, the upper electrode plate 3 applies a high-frequency voltage to the processing space S' to generate a high-frequency electric field. This high-frequency electric field excites the processing gas supplied to the processing space S to generate plasma. Further, the gas to be treated is, for example, a gas containing a halogen, specifically a gas composed of a halogen compound, oxygen gas, argon gas or the like. A rectangular lower electrode plate 23 serving as a mounting table on which the substrate G is placed is disposed on the bottom of the chamber 11. The lower electrode plate 23 is opposed to the upper electrode plate 13 and is supported by the lower insulating portion 25 by a ground substrate 26 made of aluminum. Further, the grounded substrate 26 is disposed at a distance from the bottom of the chamber 1 1 and supported by a cylindrical column 27. The column 27 is disposed on a support plate 28 that moves in the vertical direction (the direction of the arrow in the figure) by a drive mechanism not shown. Therefore, the ground substrate 26 or the lower electrode plate 23 is also moved up and down along with the vertical movement of the support plate 28. The support plate 28 is connected to the bottom of the chamber 11 by a telescopic body 29, and the expandable body 29 is hermetically distinguished from the inside of the chamber 11 and outside the chamber 11. Further, the column 27, the support plate 28, and the expandable body 29 are all made of a conductor. A cooling flow path (not shown) is provided in the lower electrode plate 23, and the substrate G placed on the lower electrode plate 23 is cooled by the refrigerant flowing through the cooling flow path. The lower insulating portion 25 is composed of a dielectric or an atmosphere, and the lower electrode plate 23 is sufficiently electrically suspended by the ground substrate 26 and the subsequent chamber 11. The lower electrode plate 23 is connected to one end of the conductive circuit 30 provided in the column 27, and the impedance adjusting portion 31 is provided in the conductive circuit 30. The other end of the lead circuit 3 is connected to the bottom of the chamber 11 via the support plate 28 and the expandable body 29. In the present embodiment, each of the upper electrode plate 13 and the lower electrode plate 23 corresponds to a cathode electrode and an anode electrode. An exhaust passage 32 is connected to the bottom of the chamber 11, and an exhaust device (not shown) such as a turbo molecular pump or a dry pump is connected to the exhaust passage 32. The exhaust unit exhausts the interior of the chamber 11 via the exhaust passage 32. Further, a gate valve 34 for opening/closing the transfer port 3 of the substrate G is provided on the side wall of the chamber 11. In the plasma processing apparatus 10, although the high frequency power source 20 is integrated with the circuit 18 - the shower head 12 - the plasma of the space S - the lower electrode plate 23 - the impedance adjusting portion 31 - the chamber 1 1 - the matching box 2 1 - The grounding path circulates a high-frequency current, and since the high-frequency current may be short-circuited from the sprinkler head 12 to the wall portion of the chamber 1 through the plasma, the impedance adjusting portion 31 is adjusted from the lower electrode plate 23 The impedance of the path of the matching box 21 is matched, and the short-circuiting of the high-frequency current is prevented from flowing to the wall portion of the chamber 11. Further, in the plasma processing apparatus 10, a high-frequency electric field is generated by supplying high-frequency power to the process S between -13 and 200913002, and a high density is generated in the processing space s by the processing gas supplied from the shower head. The plasma is subjected to an etching treatment on the substrate G using the plasma. Further, the operation of each component of the plasma processing apparatus 10 is controlled by a CPU including a control unit (not shown) of the plasma processing apparatus 10 in accordance with a program corresponding to the etching process. Further, the plasma processing apparatus 10 includes a short-circuit plate 36 that short-circuits the ground substrate 26 and the inner wall of the chamber 11, and a capacitor 37 that is interposed between the short-circuit plate 36 and the inner wall of the chamber 11. The short-circuiting plate 36 is a thin-plate-shaped conductor having a rectangular cross section made of a conductive material such as metal, for example, stainless steel or hastelloy (trademark registration). One end of the short-circuiting plate 36 is connected to the lower surface of the ground substrate 26 via a connecting portion 38, and the other end of the short-circuiting plate 36 is connected to a capacitor 37 provided on the inner wall of the chamber 11, specifically the bottom of the chamber 11. The capacitor 37 is composed of an insulating layer 37a and two metal plates 37b, 37c such as an aluminum plate holding the insulating layer 37a, and the portion in contact with the plasma may be covered with an insulating film such as alumite. Further, the insulating layer 37a is composed of, for example, a ceramic plate, a molten ceramic layer or a fluororesin layer (Teflon (trademark) layer). As the capacitor, in addition to the above-described embodiment, a commercially available vacuum capacitor or variable capacitor having plasma resistance can be used. In the plasma processing apparatus 10, the short-circuiting plate 36 and the capacitor 37 are configured as short-circuit circuits for short-circuiting the ground substrate 26 and the inner wall of the chamber 11. Further, in the plasma processing apparatus 10, when a high-frequency current is caused to flow between the ground substrate 26 and the inner wall of the chamber 11, the short-circuiting plate 36 has its own inductance, and the sensing is generated in the short-circuiting plate due to the fact that 14-200913002 Since the capacitor 37 has an electrostatic capacitance, the capacitor 37 generates a capacitive reactance. Further, in the plasma processing apparatus 10, since the capacitor 37 is interposed between the short-circuiting plate 36 and the inner wall of the chamber 11, the short-circuiting plate 36 and the capacitor 37 are formed between the grounding substrate 26 and the inner wall of the chamber u. It is a series circuit. Therefore, the short-circuiting plate 36 and the capacitor 37 can share the potential difference generated when the high-frequency current flows between the ground substrate 26 and the inner wall of the chamber 11. Here, when the inner wall of the chamber 11 is set to the ground potential, the impedance of the short circuit plate 36 is set to ZL, the impedance of the capacitor 37 is set to Zc, and the high-frequency current flowing between the ground substrate 26 and the inner wall of the chamber 1 1 When it is set to 1, the potential V2 of the ground substrate 26 is expressed by the following formula (1). V2 = (Zl + Zc) x I (1) Generally, although ZL or ZC is R+jX (X is a reactance), in the plasma processing apparatus 1 R, the R system is very small compared with X. Can be ignored. In the present embodiment, when the inductive reactance of the short-circuiting plate 36 is set to Xc of the capacitive reactance of the XL' capacitor 37, the potential V2 of the ground substrate 26 is expressed by the following formula (2). V2 ^ (XL + Xc) xI (2) In the present embodiment, the potential V2 is reduced by adjusting the capacitance of the capacitor 37. Specifically, the capacitance of the capacitor -15 - 200913002 3 7 is adjusted by the following formula (3).
Xc = -Xl/2 ··· (3) 其結果爲接地基板26的電位V2係以下式（4)所示。 V2%1/2xXlxI … (4) 一方面，如習知的電漿處理裝置所示’在僅利用短路 板使接地基板與腔室內壁短路的情況下，接地基板的電位 乂！係以下式（5)所示。Xc = -Xl/2 (3) As a result, the potential V2 of the ground substrate 26 is expressed by the following formula (4). V2%1/2xXlxI (4) On the one hand, as shown in the conventional plasma processing apparatus, the potential of the ground substrate is 在 in the case where the ground substrate and the inner wall of the chamber are short-circuited only by the short-circuiting plate! It is represented by the following formula (5).
Vi = XlxI - (5) 當比較上式（4)及（5)時，接地基板26的電位I係爲習 知的電漿處理裝置中之接地基板的電位V,之1 /2。因此， 藉由使電容器37介在於短路板36與腔室11內壁之間，並以 使上式（3 )成立的方式調整電容器3 7的靜電電容，能夠使 接地基板26的電位V2達到習知的電漿處理裝置中之接地 基板的電位V ,之1 / 2。 又此時電容器37的電位Vc係以下式（6)所示。Vi = XlxI - (5) When the above equations (4) and (5) are compared, the potential I of the ground substrate 26 is 1 / /2 of the potential V of the ground substrate in the conventional plasma processing apparatus. Therefore, by disposing the capacitor 37 between the short-circuit plate 36 and the inner wall of the chamber 11, and adjusting the electrostatic capacitance of the capacitor 37 so that the above formula (3) holds, the potential V2 of the ground substrate 26 can be made The potential V of the grounded substrate in the known plasma processing apparatus is 1/2. Further, at this time, the potential Vc of the capacitor 37 is expressed by the following formula (6).
Vc Xc x I … （6) -16- 200913002 在此，從上式（3)，電容器37的電位VC係以下式（7)所 不 。Vc Xc x I (6) -16- 200913002 Here, from the above formula (3), the potential VC of the capacitor 37 is not expressed by the following formula (7).
Vc-.1/2xXlxI ... (7) 因此，電容器37的電位Vc也能夠達到習知的電漿處 理裝置中之接地基板的電位乂,之1/2。換言之，電容器37 所分擔的電位差也成爲乂！的1/2。 若是根據本實施形態之電漿處理裝置1 〇的話，短路板 36與電容器37係能夠分擔在高頻電流流通接地基板26與腔 室1 1內壁之間時所產生的電位差。又因爲電容器3 7係設置 在腔室1 1內壁，因此接地基板26與腔室1 1內壁之間的電位 差係在實質上爲接地基板26與電容器37之間的電位差’該 電位差就是短路板3 6所分擔的電位差。因此能夠減低支撐 下部電極板23的接地基板26與腔室1 1內壁之間的電位差。 在上述的電漿處理裝置10中，因爲藉由調整電容器37 的靜電電容，而使Xc = -XL/2(上式（3))成立，因此接地基 板的電位V2係以V24l/2xXLxI(上式（4))所示。一方面’ 習知的電漿處理裝置之接地基板的電位Vi係以 上式（5))所示。換言之，能夠使V2達到乂1的1/2 ’而能夠 使短路板3 6所分擔的電位差確實減低。 又由於電容器3 7所分擔的電位差也達到V i的1 /2 ’因 此無論在接地基板26與電容器37之間，以及電容器37與腔 室1 1內壁之間的電位差都能夠適當減低，因此在接地基板 -17- 200913002 26與電容器37之間、或電容器3 7與腔室11內壁之間能夠抑 制電容耦合電漿或異常放電的發生。 在上述的電漿處理裝置10中，雖然藉由調整電容器37 的靜電電容，而使接地基板26的電位V2達到習知的電漿 處理裝置中之接地基板的電位V i之1 /2，但是藉由調整電 容器37的靜電電容，改變短路板36所分擔的電位差，使接 地基板26的電位V2大約爲0亦可。 其次，針對關於本發明之第2實施形態的電漿處理裝 置加以說明。 本實施形態係使其構成、作用與上述之第1實施形態 基本上相同，因爲只有使接地基板26與腔室1 1壁面短路之 短路電路構成不同，因此對於重複的構成、作用係省略說 明，以下針對不同的構成、作用進行說明。 第2圖係爲槪略顯示關於本實施形態之電漿處理裝置 的構成之剖面圖。 在第2圖中電漿處理裝置40係具備使接地基板26與腔 室1 1內壁短路的短路板4 1。短路板4 1也是由金屬等導電性 材料，例如不鏽鋼或赫史特合金（商標登錄）構成之剖面矩 形的薄板狀導體。 短路板41的一端係介由連接部38而連接在接地基板26 ’短路板41的另一端係介由連接部42而連接在腔室11內壁 。在該電漿處理裝置40中，短路板41係構成爲使接地基板 26與腔室1 1內壁之間短路的短路電路。 第3圖係爲顯示第2圖中的短路板之平面圖，第3(A)圖 18- 200913002 係爲顯示將短路板分岔爲2個的情況’第3(B)圖係爲顯示 將短路板分岔爲3個的情況。 一般而言，由余屬構成之剖面矩形的直線導體之電感 L，當使該直線導體的長度爲a(cm)、寬幅爲b(cm)、厚度 爲c(cm)時，係以下式（8)所示 L = 0.002ax[2.303 xlog{2a/(b + c)} + 〇.5 + 0.2235 x(b + c)/a] ··· (8) 在此，當使b>>c時，上式（8)係以下式（8)’所不。 L 与 0 · 0 0 2 a X { 2.3 0 3 X 1 〇 g (2 a/b) + 〇 . 5 + 0 · 2 2 3 5 X b/a }…（8)’ 此時，當使上式（8)’的L値爲A，直線導體的寬幅-長 度比爲b/a時，該A及b/a的關係係如第4圖所示。又在 第4圖中橫軸係表示寬幅-長度比b/a，縱軸係顯示在使寬 幅-長度比b/a爲0.5時之A成爲1，將對應寬幅-長度比b/a 的A規格化情況下之規格化的A。 從第4圖所示的關係，即使將寬幅-長度比b/a從0.5減 半爲0.25(換言之，直線導體的寬幅減半），電感L値之A 係僅達到1.3倍，即使將寬幅-長度比b/a從0.5減爲1/5到 〇·1(換言之，寬幅減爲1/5)，A係僅達到約1.8倍。 一方面，在如第3(A)圖所示之分岔爲2個的短路板41 中’當將除去與連接部3 8、42連接的部份之長度（有效長 度）爲1，各分岔路4 1 a的寬幅爲w時，在該短路板4 1中使 -19 - 200913002 寬幅W及長度1的2個分岔路41a並列配置。此時’當使短 路板41整體的電感爲Lall’分岔部4la中的電感爲Ldiv時 ，使下式成立。 l/La|i=l/Ldiv+l/L<Jiv … （9) 因此，由上式（9)，短路板4 1整體的電感係達到分岔 路41a電感的一半。 換言之，當分岔短路板41時，雖然1個分岔路41a中 的電感爲增加的，但是在短路板4 1中，由於使2個分岔路 4 1 a並列配置，因此能夠增加電頻電流的路徑，其結果爲 能夠減低短路板4 1整體的電感。 又短路板41係如第3(B)圖所示，分岔爲3個亦可。換 言之，對於短路板4 1的分岔路數量係沒有限定。 若是根據關於本實施形態之電漿處理裝置40的話，由 剖面爲矩形的直線導體所構成的短路板4 1係於中途分岔爲 至少2個。當分岔短路板4 1時，其結果爲能夠降低短路板 整體的電感。藉此，能夠減低接地基板2 6的電位，而能夠 減低支撐下部電極板2 3之接地基板2 6與腔室1 1內壁之間的 電位差。 其次’針對關於本發明之第3實施形態的電漿處理裝 置加以說明。 本實施形態係其使其構成、作用與上述之第1實施形 態基本上相同，因爲只有使接地基板2 6與腔室1 1壁面短路 -20- 200913002 之短路電路構成不同，因此對於重複的構成、作用係省略 說明，以下針對不同的構成、作用進行說明。 第5圖係爲槪略顯示關於本實施形態之電漿處理裝置 的構成之剖面圖。 在第5圖中電漿處理裝置43係具備使接地基板26與腔 室1 1內壁短路的短路板44。短路板44也是由金屬等導電性 材料，例如不鏽鋼或赫史特合金（商標登錄）構成之剖面矩 形的薄板狀導體。 短路板4 4的一端係連接在設置於接地基板2 6下面的電 容器45 (另一電容器），短路板44的另一端係連接在設置於 腔室1 1底部的電容器37。電容器45的構造係與電容器37的 構造相同。 在該電漿處理裝置43中，電容器45、短路板44、及電 容器37係構成爲使接地基板26與腔室11內壁短路的短路電 路。又在電漿處理裝置43中，因爲電容器37係介在短路板 44與腔室1 1內壁之間，電容器45係介在短路板44與接地基 板26之間，因此電容器45、短路板44、及電容器37係在接 地基板26與腔室1 1內壁之間構成爲串聯電路。 在本實施形態中，藉由調整電容器37、45的靜電電容 ，使接地基板26的電位V3成爲0。具體而言，在使電容器 37的靜電電容爲C1，短路板44的自身電感爲L，電容器 45的靜電電容爲C2，高頻電源20所供給的高頻電力之頻 率爲f，高頻電力的角頻率ω爲2 n f的情況下，以使下式 (10)成立的方式調整電容器37、45的靜電電容Cl、C2。 -21 - 200913002 C1=C2 = 2/(co2xL) … (10) 在此，當使電容器37的電容性電抗爲XC1，電容器45 的電容性電抗爲XC2，短路板44的感應性電抗爲XL時， 接地基板26的電位V3係以下式（11)所示。Vc-.1/2xXlxI (7) Therefore, the potential Vc of the capacitor 37 can also reach 1/2 of the potential 乂 of the ground substrate in the conventional plasma processing apparatus. In other words, the potential difference shared by the capacitor 37 becomes 乂! 1/2. According to the plasma processing apparatus 1 of the present embodiment, the short-circuiting plate 36 and the capacitor 37 can share the potential difference generated when the high-frequency current flows between the ground substrate 26 and the inner wall of the chamber 11. Further, since the capacitor 37 is disposed on the inner wall of the chamber 11, the potential difference between the ground substrate 26 and the inner wall of the chamber 11 is substantially the potential difference between the ground substrate 26 and the capacitor 37. The potential difference is a short circuit. The potential difference shared by the board 36. Therefore, the potential difference between the ground substrate 26 supporting the lower electrode plate 23 and the inner wall of the chamber 11 can be reduced. In the above-described plasma processing apparatus 10, since Xc = -XL/2 (formula (3)) is established by adjusting the electrostatic capacitance of the capacitor 37, the potential V2 of the ground substrate is V24l/2xXLxI (upper Formula (4)) is shown. On the other hand, the potential Vi of the ground substrate of the conventional plasma processing apparatus is shown by the above formula (5)). In other words, it is possible to make V2 reach 1/2' of 乂1 and to reliably reduce the potential difference shared by the short-circuiting plate 36. Further, since the potential difference shared by the capacitors 3 7 also reaches 1 /2 ' of V i , the potential difference between the ground substrate 26 and the capacitor 37 and between the capacitor 37 and the inner wall of the chamber 1 can be appropriately reduced. The occurrence of capacitive coupling plasma or abnormal discharge can be suppressed between the ground substrate 17-200913002 26 and the capacitor 37, or between the capacitor 37 and the inner wall of the chamber 11. In the above-described plasma processing apparatus 10, the potential V2 of the ground substrate 26 is made to be 1 / 2 of the potential V i of the ground substrate in the conventional plasma processing apparatus by adjusting the electrostatic capacitance of the capacitor 37, but By adjusting the electrostatic capacitance of the capacitor 37, the potential difference shared by the short-circuit plate 36 is changed, and the potential V2 of the ground substrate 26 may be approximately zero. Next, a plasma processing apparatus according to a second embodiment of the present invention will be described. In the present embodiment, the configuration and operation are basically the same as those in the above-described first embodiment. Since only the short-circuit circuit configuration in which the ground substrate 26 and the wall surface of the chamber 11 are short-circuited is different, the description of the configuration and operation of the overlapping structure will be omitted. The following describes different configurations and operations. Fig. 2 is a cross-sectional view showing a schematic configuration of a plasma processing apparatus according to the present embodiment. In Fig. 2, the plasma processing apparatus 40 is provided with a short-circuiting plate 4 1 for short-circuiting the ground substrate 26 and the inner wall of the chamber 11. The short-circuiting plate 4 1 is also a thin-plate-shaped conductor of a cross-sectional shape composed of a conductive material such as metal, such as stainless steel or Herstite (trademark). One end of the short-circuiting plate 41 is connected to the ground plate 26' via the connecting portion 38. The other end of the short-circuiting plate 41 is connected to the inner wall of the chamber 11 via the connecting portion 42. In the plasma processing apparatus 40, the short-circuiting plate 41 is configured as a short-circuiting circuit for short-circuiting the ground substrate 26 and the inner wall of the chamber 11. Figure 3 is a plan view showing the short-circuiting plate in Figure 2, and Figure 3 (A) 18-200913002 shows the case where the short-circuiting plate is divided into two. The third (B) figure shows that the short circuit will be short-circuited. There are three cases where the board is divided into three. In general, the inductance L of the linear conductor having a rectangular cross section composed of the remaining members is such that the length of the linear conductor is a (cm), the width is b (cm), and the thickness is c (cm). (8) L = 0.002ax[2.303 xlog{2a/(b + c)} + 〇.5 + 0.2235 x(b + c)/a] (8) Here, when b>> When c is c, the above formula (8) is not the following formula (8)'. L and 0 · 0 0 2 a X { 2.3 0 3 X 1 〇g (2 a/b) + 〇. 5 + 0 · 2 2 3 5 X b/a }...(8)' At this time, when making When L@ of the formula (8)' is A and the width-to-length ratio of the linear conductor is b/a, the relationship between A and b/a is as shown in Fig. 4. Further, in Fig. 4, the horizontal axis indicates the wide-to-length ratio b/a, and the vertical axis indicates that A becomes 1 when the wide-length ratio b/a is 0.5, which corresponds to the wide-length ratio b/. Normalized A in the case of A normalization of a. From the relationship shown in Fig. 4, even if the wide-length ratio b/a is halved from 0.5 to 0.25 (in other words, the width of the linear conductor is halved), the inductance L値 is only 1.3 times, even if The width-to-length ratio b/a is reduced from 0.5 to 1/5 to 〇·1 (in other words, the width is reduced to 1/5), and the A system is only about 1.8 times. On the other hand, in the short-circuiting plate 41 having two branches as shown in Fig. 3(A), 'when the length (effective length) of the portion to be connected to the connecting portions 38, 42 is removed, each point is When the width of the winding path 4 1 a is w, the wide branch W of the -19 - 200913002 and the two branching paths 41a of the length 1 are arranged side by side in the short-circuiting plate 4 1 . At this time, when the inductance of the entire short circuit board 41 is the Lall's inductance, the inductance in the branch portion 4a is Ldiv, the following equation is established. l/La|i=l/Ldiv+l/L<Jiv (9) Therefore, from the above formula (9), the inductance of the entire short-circuiting plate 4 1 reaches half of the inductance of the branching circuit 41a. In other words, when the short-circuiting plate 41 is branched, although the inductance in one of the branching paths 41a is increased, in the short-circuiting plate 41, since the two branching paths 4 1 a are arranged side by side, the electric current can be increased. As a result, the inductance of the entire short-circuiting plate 4 1 can be reduced. Further, as shown in the third (B) diagram, the short-circuiting plate 41 may have three branches. In other words, the number of branching paths for the short-circuiting plate 4 1 is not limited. According to the plasma processing apparatus 40 of the present embodiment, the short-circuiting plate 4 1 composed of a linear conductor having a rectangular cross section is branched into at least two. When the short-circuiting plate 4 1 is branched, the result is that the inductance of the entire short-circuiting plate can be reduced. Thereby, the potential of the ground substrate 26 can be reduced, and the potential difference between the ground substrate 26 supporting the lower electrode plate 23 and the inner wall of the chamber 1 1 can be reduced. Next, a plasma processing apparatus according to a third embodiment of the present invention will be described. In the present embodiment, the configuration and operation are basically the same as those in the first embodiment described above, and since the short-circuit circuit configuration in which the ground substrate 26 is short-circuited to the wall surface of the chamber 1 1 - 200913002 is different, the configuration is repeated. The description of the operation is omitted, and the different configurations and operations will be described below. Fig. 5 is a cross-sectional view showing the configuration of a plasma processing apparatus according to the present embodiment. In Fig. 5, the plasma processing apparatus 43 is provided with a short-circuiting plate 44 for short-circuiting the ground substrate 26 and the inner wall of the chamber 11. The short-circuiting plate 44 is also a thin-plate-shaped conductor of a cross-sectional shape composed of a conductive material such as metal, such as stainless steel or Herstite (trademark). One end of the short-circuiting plate 44 is connected to a capacitor 45 (another capacitor) provided under the ground substrate 26, and the other end of the short-circuiting plate 44 is connected to a capacitor 37 provided at the bottom of the chamber 11. The configuration of the capacitor 45 is the same as that of the capacitor 37. In the plasma processing apparatus 43, the capacitor 45, the short-circuiting plate 44, and the capacitor 37 are configured as short-circuit circuits for short-circuiting the ground substrate 26 and the inner wall of the chamber 11. Further, in the plasma processing apparatus 43, since the capacitor 37 is interposed between the short-circuiting plate 44 and the inner wall of the chamber 11, the capacitor 45 is interposed between the short-circuiting plate 44 and the grounding substrate 26, so that the capacitor 45, the short-circuiting plate 44, and The capacitor 37 is formed as a series circuit between the ground substrate 26 and the inner wall of the chamber 11. In the present embodiment, by adjusting the electrostatic capacitances of the capacitors 37 and 45, the potential V3 of the ground substrate 26 is made zero. Specifically, when the capacitance of the capacitor 37 is C1, the inductance of the short-circuiting plate 44 is L, the capacitance of the capacitor 45 is C2, and the frequency of the high-frequency power supplied from the high-frequency power source 20 is f, and the frequency of the high-frequency power is high. When the angular frequency ω is 2 nf, the electrostatic capacitances C1 and C2 of the capacitors 37 and 45 are adjusted so that the following equation (10) is satisfied. -21 - 200913002 C1=C2 = 2/(co2xL) (10) Here, when the capacitive reactance of the capacitor 37 is XC1, the capacitive reactance of the capacitor 45 is XC2, and the inductive reactance of the short-circuiting plate 44 is XL The potential V3 of the ground substrate 26 is expressed by the following formula (11).
V3 ^ (Xci+XL + Xc2)xI = (-l/(0xCl) + roxL-l/(0xC2))xI 在此，由上式（10)，接地基板26之電位V3係以下式 (12)所示。 V3 与（-ω X L/2 + ω X L -ω X L/2) X I ··· (12) 換言之，接地基板2 6的電位V 3係成爲〇。 又此時電容器4 5的電位V c 2係以下式（1 3 )所示。 V c 2 与（X c 1 + X l ) X I= (-1 / (ω X C 1) + ω X L) X I … （13) 在此’由上式（10)，電容器45的電位以下式 (1 4 )所示。V3 ^ (Xci+XL + Xc2)xI = (-l/(0xCl) + roxL-l/(0xC2))xI Here, from the above formula (10), the potential V3 of the ground substrate 26 is expressed by the following formula (12) Shown. V3 and (-ω X L/2 + ω X L -ω X L/2) X I (12) In other words, the potential V 3 of the ground substrate 26 is 〇. At this time, the potential V c 2 of the capacitor 45 is expressed by the following formula (1 3 ). V c 2 and (X c 1 + X l ) XI= (-1 / (ω XC 1) + ω XL) XI (13) Here, by the above formula (10), the potential of the capacitor 45 is as follows (1) 4) shown.
Vc2^ l/2^c〇xL><I (14) 一方面，由上式（10)，以上式（5)所示之習知的電漿處 -22- 200913002 理裝置之接地基板的電位乂！係以下式（15)所示。 V ] =^：XlxI = co><LxI … （15) 因此，在本實施形態中能夠電容器4 5的電位VC2達到 習知的電漿處理裝置中之接地基板的電位^之1/2。 又電容器37的電位乂^係以下式（16)所示。Vc2^ l/2^c〇xL><I (14) On the one hand, the conventional substrate of the above-mentioned formula (5) is represented by the above formula (10), and the grounding substrate of the device is -22-200913002 Potential 乂! It is shown by the following formula (15). V ] = ^: XlxI = co > LxI (15) Therefore, in the present embodiment, the potential VC2 of the capacitor 45 can reach 1/2 of the potential of the ground substrate in the conventional plasma processing apparatus. Further, the potential of the capacitor 37 is expressed by the following formula (16).
Vci =rXcixI = -l/(^xCl)xI … （16) 在此，由上式（10)，電容器37的電位VC1係以下式 (17)所示。Vci = rXcixI = -l/(^xCl)xI (16) Here, from the above formula (10), the potential VC1 of the capacitor 37 is expressed by the following formula (17).
Vci =-l/2xroxLxI … （17) 因此，在本實施形態中電容器3 7的電位V c i也能夠達 到習知的電漿處理裝置中之接地基板的電位V !之1 /2。 若是根據關於本實施形態之電漿處理裝置43的話，在 電容器37之外，於短路板44與接地基板26之間介在電容器 45，該電容器45係設置在接地基板26。又因爲藉由調整電 容器37、45的靜電電容Cl、C2，使Cl = C2 = 2/(c〇2xL)(上 式（10))成立，而能夠使以 VStC-l/CcoxCU + ioxL-i/kxCSWxIC 上式 （11)) 所 示之接 地基板 26的電位 V3成爲 0 。因此，能夠在接地基板26附近，防止電容耦合電漿或異 -23- 200913002 常放電的發生。 又由於能夠使電容器45的電位VC2&電容器37的電位 Vc !達到習知的電漿處理裝置中之接地基板的電位V i之 1/2，因此能夠適當減低無論是接地基板26與電容器45之 間、以及電容器3 7與腔室1 1內壁之間的電位差，因此能夠 在接地基板26與電容器45之間、或電容器37與腔室1 1內壁 之間，防止電容耦合電漿或異常放電的發生。 將上述各實施形態組合後再適用於電槳處理裝置亦可 。例如在電漿處理裝置10中，使用分岔爲2個的短路板41 取代短路板36亦可，又在電漿處理裝置43中，使用短路板 4 1取代短路板4 4亦可。 關於上述各實施形態的電漿處理裝置雖然具備阻抗調 整部3 1，但是能夠適用本發明的電漿處理裝置係不限於此 ，例如不須要阻抗調整部的電漿處理裝置亦可。 在關於上述各實施形態的電漿處理裝置中，雖然使高 頻電源20連接在噴灑頭12的上部電極板13，但是能夠適用 本發明的電漿處理裝置係不限於此。例如使高頻電源只連 接在下部電極板23的電漿處理裝置亦可，或是在上部電極 板1 3與下部電極板2 3之任一個都連接各別的高頻電源之電 漿處理裝置亦可。 又在關於上述各實施形態的電漿處理裝置中，雖然具 備介由下部絕緣部25支撐下部電極板23的接地基板26、及 使該接地基板26與腔室1 1內壁短路的短路板，但是能夠適 用本發明的電漿處理裝置係不限於此。例如具備介由上部 -24- 200913002 絕緣部支撐上部電極板，且與腔室丨丨內壁間隔配置的接地 基板、及使該接地基板2 6與腔室丨！內壁短路的短路板之電 漿處理裝置亦可。 【圖式簡單說明】 第1圖係爲槪略顯示關於本發明之第1實施形態的電漿 處理裝置之構成的剖面圖。 第2圖係爲槪略顯示關於本發明之第2實施形態的電漿 處理裝置之構成的剖面圖。 第3圖係爲第2圖中之短路板的平面圖，第3(A)圖係爲 顯示將短路板分岔爲2個的情況，第3(B)圖係爲顯示將短 路板分岔爲3個的情況。 第4圖係爲顯示由金屬構成之剖面矩形的直線導體之 電感値、及該直線導體之寬幅-長度比的關係之圖表。 第5圖係爲槪略顯示關於本發明之第3實施形態的電漿 處理裝置之構成的剖面圖。 第6圖係爲槪略顯示習知的電漿處理裝置之構成的剖 面圖。 【主要元件符號說明】 G :玻璃基板 S :處理空間 10，40，43 :電漿處理裝置 1 1 :腔室 -25- 200913002 1 3 :上部電極板 2 0 :局頻電源 22 :上部絕緣部 23 :下部電極板 2 5 :下部絕緣部 2 6 :接地基板 36, 41，44 :短路板 37，45 :電容器 3 7 a，4 5 a :絕緣層 4 1 a :分岔路 -26-Vci = -l / 2xroxLxI (17) Therefore, in the present embodiment, the potential V c i of the capacitor 3 7 can reach 1 / 2 of the potential V ! of the ground substrate in the conventional plasma processing apparatus. According to the plasma processing apparatus 43 of the present embodiment, the capacitor 45 is interposed between the short-circuiting plate 44 and the ground substrate 26 in addition to the capacitor 37, and the capacitor 45 is provided on the ground substrate 26. Further, by adjusting the electrostatic capacitances Cl, C2 of the capacitors 37, 45 such that Cl = C2 = 2/(c 〇 2xL) (the above equation (10)) holds, VStC-l/CcoxCU + ioxL-i can be made. /kxCSWxIC The potential V3 of the ground substrate 26 shown in the above equation (11)) becomes 0. Therefore, it is possible to prevent the occurrence of a discharge of a capacitively coupled plasma or a different discharge in the vicinity of the ground substrate 26. Further, since the potential VC2 of the capacitor 45 and the potential Vc of the capacitor 37 can be made 1/2 of the potential V i of the ground substrate in the conventional plasma processing apparatus, it is possible to appropriately reduce the ground substrate 26 and the capacitor 45. The potential difference between the capacitor 37 and the inner wall of the chamber 1 1 can thus prevent capacitive coupling plasma or abnormality between the ground substrate 26 and the capacitor 45, or between the capacitor 37 and the inner wall of the chamber 11. The occurrence of discharge. The above embodiments may be combined and applied to an electric paddle processing apparatus. For example, in the plasma processing apparatus 10, a short circuit plate 41 having two branches may be used instead of the short circuit plate 36, and in the plasma processing apparatus 43, a short circuit plate 4 1 may be used instead of the short circuit plate 4 4 . The plasma processing apparatus according to each of the above embodiments includes the impedance adjusting unit 3 1, but the plasma processing apparatus to which the present invention is applicable is not limited thereto, and for example, a plasma processing apparatus that does not require an impedance adjusting unit. In the plasma processing apparatus according to each of the above embodiments, the high-frequency power source 20 is connected to the upper electrode plate 13 of the shower head 12. However, the plasma processing apparatus to which the present invention is applicable is not limited thereto. For example, a plasma processing apparatus that connects the high-frequency power source only to the lower electrode plate 23 or a plasma processing apparatus that connects the respective high-frequency power sources to either of the upper electrode plate 13 and the lower electrode plate 23 may be used. Also. Further, in the plasma processing apparatus according to each of the above embodiments, the grounding substrate 26 that supports the lower electrode plate 23 via the lower insulating portion 25 and the short-circuiting plate that short-circuits the ground substrate 26 and the inner wall of the chamber 1 1 are provided. However, the plasma processing apparatus to which the present invention can be applied is not limited thereto. For example, it is provided with a grounding substrate that supports the upper electrode plate via the upper portion of the 24-24-200913002 and is spaced apart from the inner wall of the chamber, and the ground substrate 26 and the chamber are collapsed! A plasma processing apparatus for a short-circuiting plate in which the inner wall is short-circuited may also be used. [Brief Description of the Drawings] Fig. 1 is a cross-sectional view showing a configuration of a plasma processing apparatus according to a first embodiment of the present invention. Fig. 2 is a cross-sectional view showing the configuration of a plasma processing apparatus according to a second embodiment of the present invention. Figure 3 is a plan view of the short-circuiting plate in Figure 2, Figure 3(A) shows the case where the short-circuiting plate is divided into two, and Figure 3(B) shows that the short-circuiting plate is divided into 3 cases. Fig. 4 is a graph showing the relationship between the inductance 直线 of a linear conductor having a rectangular cross section made of metal and the width-to-length ratio of the linear conductor. Fig. 5 is a cross-sectional view showing the configuration of a plasma processing apparatus according to a third embodiment of the present invention. Fig. 6 is a cross-sectional view showing the configuration of a conventional plasma processing apparatus. [Description of main component symbols] G: Glass substrate S: Processing space 10, 40, 43: Plasma processing apparatus 1 1 : Chamber-25- 200913002 1 3 : Upper electrode plate 2 0 : Local frequency power supply 22: Upper insulation part 23: lower electrode plate 2 5 : lower insulating portion 2 6 : ground substrate 36, 41, 44: short circuit plate 37, 45: capacitor 3 7 a, 4 5 a : insulating layer 4 1 a : branching road -26-