TW200910573A - Stacked semiconductor package structure with metal contact through via - Google Patents

Stacked semiconductor package structure with metal contact through via Download PDF

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Publication number
TW200910573A
TW200910573A TW096130265A TW96130265A TW200910573A TW 200910573 A TW200910573 A TW 200910573A TW 096130265 A TW096130265 A TW 096130265A TW 96130265 A TW96130265 A TW 96130265A TW 200910573 A TW200910573 A TW 200910573A
Authority
TW
Taiwan
Prior art keywords
package structure
circuit layout
semiconductor package
conductive
circuit
Prior art date
Application number
TW096130265A
Other languages
English (en)
Chinese (zh)
Other versions
TWI357653B (enExample
Inventor
Jen-Jung Chen
Jia-Jung Wang
Original Assignee
Bridge Semiconductor Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Bridge Semiconductor Corp filed Critical Bridge Semiconductor Corp
Priority to TW096130265A priority Critical patent/TW200910573A/zh
Publication of TW200910573A publication Critical patent/TW200910573A/zh
Application granted granted Critical
Publication of TWI357653B publication Critical patent/TWI357653B/zh

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/851—Dispositions of multiple connectors or interconnections
    • H10W72/874—On different surfaces
    • H10W72/884—Die-attach connectors and bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/111—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed
    • H10W74/114—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed by a substrate and the encapsulations
    • H10W74/117—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed by a substrate and the encapsulations the substrate having spherical bumps for external connection
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/15—Encapsulations, e.g. protective coatings characterised by their shape or disposition on active surfaces of flip-chip devices, e.g. underfills
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
    • H10W90/724—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between a chip and a stacked insulating package substrate, interposer or RDL
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/734—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked insulating package substrate, interposer or RDL
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/754—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked insulating package substrate, interposer or RDL

Landscapes

  • Wire Bonding (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
TW096130265A 2007-08-16 2007-08-16 Stacked semiconductor package structure with metal contact through via TW200910573A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
TW096130265A TW200910573A (en) 2007-08-16 2007-08-16 Stacked semiconductor package structure with metal contact through via

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
TW096130265A TW200910573A (en) 2007-08-16 2007-08-16 Stacked semiconductor package structure with metal contact through via

Publications (2)

Publication Number Publication Date
TW200910573A true TW200910573A (en) 2009-03-01
TWI357653B TWI357653B (enExample) 2012-02-01

Family

ID=44724402

Family Applications (1)

Application Number Title Priority Date Filing Date
TW096130265A TW200910573A (en) 2007-08-16 2007-08-16 Stacked semiconductor package structure with metal contact through via

Country Status (1)

Country Link
TW (1) TW200910573A (enExample)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI425718B (zh) * 2011-06-21 2014-02-01 財團法人國家實驗研究院國家晶片系統設計中心 連接座結構組及其連接座結構
TWI485816B (zh) * 2011-11-10 2015-05-21 鈺橋半導體股份有限公司 具有凸塊／凸緣層支撐板、無芯增層電路及內建電子元件之三維半導體組裝板
US10937771B2 (en) 2016-01-14 2021-03-02 Samsung Electronics Co., Ltd. Semiconductor packages

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI425718B (zh) * 2011-06-21 2014-02-01 財團法人國家實驗研究院國家晶片系統設計中心 連接座結構組及其連接座結構
TWI485816B (zh) * 2011-11-10 2015-05-21 鈺橋半導體股份有限公司 具有凸塊／凸緣層支撐板、無芯增層電路及內建電子元件之三維半導體組裝板
US10937771B2 (en) 2016-01-14 2021-03-02 Samsung Electronics Co., Ltd. Semiconductor packages
TWI731914B (zh) * 2016-01-14 2021-07-01 南韓商三星電子股份有限公司 半導體封裝

Also Published As

Publication number Publication date
TWI357653B (enExample) 2012-02-01

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MM4A Annulment or lapse of patent due to non-payment of fees