TW200822252A - Semiconductor apparatus, method for producing electronic circuit, and apparatus for producing electronic circuit - Google Patents

Semiconductor apparatus, method for producing electronic circuit, and apparatus for producing electronic circuit Download PDF

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Publication number
TW200822252A
TW200822252A TW096124357A TW96124357A TW200822252A TW 200822252 A TW200822252 A TW 200822252A TW 096124357 A TW096124357 A TW 096124357A TW 96124357 A TW96124357 A TW 96124357A TW 200822252 A TW200822252 A TW 200822252A
Authority
TW
Taiwan
Prior art keywords
solder
solder particles
electrode portion
electronic component
circuit board
Prior art date
Application number
TW096124357A
Other languages
Chinese (zh)
Inventor
Kohji Hisakawa
Original Assignee
Sharp Kk
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Filing date
Publication date
Application filed by Sharp Kk filed Critical Sharp Kk
Publication of TW200822252A publication Critical patent/TW200822252A/en

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    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341—Surface mounted components
    • H05K3/3431—Leadless components
    • H05K3/3436—Leadless components having an array of bottom contacts, e.g. pad grid array or ball grid array components
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K3/00—Tools, devices, or special appurtenances for soldering, e.g. brazing, or unsoldering, not specially adapted for particular methods
    • B23K3/06—Solder feeding devices; Solder melting pans
    • B23K3/0607—Solder feeding devices
    • B23K3/0623—Solder feeding devices for shaped solder piece feeding, e.g. preforms, bumps, balls, pellets, droplets
    • H—ELECTRICITY
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    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
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    • B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K2101/00—Articles made by soldering, welding or cutting
    • B23K2101/36—Electric or electronic devices
    • B23K2101/40—Semiconductor devices
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
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    • H01L2924/1901—Structure
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    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621—Components characterised by their electrical contacts
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    • H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
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    • H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10954—Other details of electrical connections
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    • H05K2203/01—Tools for processing; Objects used during processing
    • H05K2203/0104—Tools for processing; Objects used during processing for patterning or coating
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    • H05K2203/02—Details related to mechanical or acoustic processing, e.g. drilling, punching, cutting, using ultrasound
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    • H05K2203/03—Metal processing
    • H05K2203/0338—Transferring metal or conductive material other than a circuit pattern, e.g. bump, solder, printed component
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    • H05K2203/04—Soldering or other types of metallurgic bonding
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    • H05K2203/04—Soldering or other types of metallurgic bonding
    • H05K2203/043—Reflowing of solder coated conductors, not during connection of components, e.g. reflowing solder paste
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

Abstract

A process for manufacturing an electronic circuit, comprising the first step of mounting a layer of solder grains (11) on support (21); the second step of pressing bump (5) of semiconductor chip (1) against the solder grains (11) mounted on the support (21) so as to attain pressure bonding of the solder grains (11) to the bump (5); and the third step of by the use of the solder grains (11) pressure bonded to the bump (5), joining the semiconductor chip (1) with circuit board (4). Accordingly, there can be provided a process for manufacturing an electronic circuit in which high reliability of electrical connection can be realized and in which at low cost, a stabilized amount, and requisite minimum amount for connection of semiconductor chip under miniaturization trend, of solder can be fed to conventional chips and circuit boards.

Description

200822252 九、發明說明： 【發明所屬之技術領域】 本發明係關於一種半導體裝置、電子電路之势造方法及 電子電路之製造裝置，特別是關於以必要最小限度之量的 焊錫焊接小型晶片狀之電子零件的方法，藉由上述 製造之半導體裝置，及製造上述半導體裝置用之製造裝置 者。 、 【先前技術】 Ο 伴隨半導體裝置之輕薄短小， 乂要之零件的尺寸極為小 型化。此外，亦快速地進行半導 q干ν體裝置之輕薄短小化上必 須具備之晶片狀電子零件的小型 , 彳1化如先前係稱為1005之 縱1 mm，橫0.5 mm的零件糸士士 干马主流，而目前迫切需要安裝 稱為 0603(縱 0.6 mm，橫〇3 、3 _)及〇4〇2(縱 0.4 mm，橫 〇·2 mm)之更小的零件。 先别’半導體晶片盘雷败装4 /、電路基板之電性連接係由連線接合 來進行。但是，以連線接 丄, 生連接，需要在晶片安裝 尺寸之外側確保連線之終端，而a 、 ^ 而這個部分造成安裝尺寸變 大。為了縮小該面積，而創作 J作了倒裝片安裝方式。 所謂倒裝片安裝，係在半導曰 α ^ ^ 千^體日日片之功能面上形成與基 板接合用之凸塊，將功能 ^ t ^ I扳面相對而配置，而使凸 塊與基板側之電極接合而進行之安裝方法。 倒裝片安裝中，在晶片 γ / .x 训之凸塊上設法的代表性技術， 有C4技術。 此為在附純化膜之曰 '曰曰51上附著包覆層種金屬上形成遮 122280.doc 200822252 罩，而電鍍焊錫。其後，進行遮罩除去與種金屬之蝕刻， 最後藉由平坦化熱處理熔化焊錫，而形成凸塊。進行半導 體晶片與電路基板之電性連接時，係將該附凸塊之晶片放 置於基板上予以加熱，熔化凸塊而連接。 此外，倒裝片安裝之方法，亦創作了在電路基板之電極 側认法之方法。如有揭示於熟知文獻丨（日本公開專利公報 「特開平7-7244號公報（公開日期：1995年” 1〇日）」）之 Super Jarfit法的技術（圖 15)。200822252 IX. OBJECTS OF THE INVENTION: 1. Field of the Invention The present invention relates to a semiconductor device, a method for manufacturing an electronic circuit, and a device for manufacturing an electronic circuit, and more particularly to a solder wafer soldering small wafer in a minimum amount necessary A method of manufacturing an electronic component by the above-described semiconductor device and a device for manufacturing the above semiconductor device. [Prior Art] 伴随 With the slimness and shortness of the semiconductor device, the size of the necessary parts is extremely small. In addition, the wafer-shaped electronic components that must be provided for the light-weight and short-length of the semi-conducting q-drying device are also rapidly formed, such as the former 1 mm, 100 mm vertical part of the 1005. Dry horses are mainstream, and there is an urgent need to install smaller parts called 0603 (vertical 0.6 mm, horizontal 3, 3 _) and 〇4〇2 (vertical 0.4 mm, horizontal 〇 2 mm). First, the semiconductor wafer is replaced by a wire bond. However, in connection with the connection and the connection, it is necessary to ensure the terminal of the connection on the outer side of the wafer mounting size, and a, ^ and this portion cause the mounting size to become large. In order to reduce the area, the creation J was flip-chip mounted. The so-called flip-chip mounting is to form a bump for bonding to the substrate on the functional surface of the semi-conducting 曰α^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ A method of mounting the electrodes on the substrate side by bonding. In flip chip mounting, the representative technique sought on the bumps of the wafer γ / .x training is C4 technology. This is to form a cover on the metal layer attached to the coating film 附51曰曰, and to form a shield, and to plate the solder. Thereafter, the mask is removed to remove the etching with the seed metal, and finally the solder is melted by the planarization heat treatment to form bumps. When the semiconductor wafer is electrically connected to the circuit board, the bump-attached wafer is placed on the substrate to be heated, and the bumps are melted and connected. In addition, the method of flip chip mounting has also created a method of recognizing the electrode side of the circuit board. The technique of the Super Jarfit method (Fig. 15) disclosed in the Japanese Patent Laid-Open Publication No. Hei 7-7244 (Publication Date: 1995).

Super jarflt法係藉由化學性處理電路基板i 〇4之電極 1 06，而使電極之銅表面帶黏合性。 如對圖15(a)之表面含銅的電極1〇6，進行化學處理（圖 15(b))。進一步從該電極1〇6上撒上焊錫粒子ιη時（圖 15(c))，與電極106之銅接觸的焊錫粒子丨丨丨係一層部分程 度附著於電路基板1〇4上（圖15(d))。 而後，只須加熱將焊錫熔化（圖15(e))，其上放置由金等 形成之附凸塊105的半導體晶片1〇1，予以焊接即可（圖 15(f)) 〇 如此，使用焊錫量為必要最小限度的基板，並以倒裝片 接合&有金線凸塊之晶片。由於將焊錫量控制為必要最小 限度，因此可使凸塊1 〇5予以窄間距化。 此外，倒裝片安裝之方法，亦創作有在底膠⑴以以 fill) 114上认法的方法。如有將各向異性導電膜配置於 電路基板而連接之方法（圖16)。 該方法首先係將成為底膠114之膜中混合金屬（主要為 122280.doc 200822252 鎳）粒子者貼合於電路基板104上（圖16(a))。而後，自其上 壓上附凸塊105之半導體晶片1〇1(圖16(b))。藉由凸塊1〇5 與電路基板104夾著混合於ACF内之金屬粒子，可使半導 體晶片1 01與電路基板1 〇4電性導通。另外，半導體晶片 101與電路基板1〇4之固定，可藉由使ACF熱硬化來進行（圖 16(c)) 〇 亦有取代使用ACF，而在底膠114中混合焊錫粒子丨u， 塗佈於電路基板1〇4上，並自其上倒裝片安裝附凸塊1〇5之 半導體晶片1 0 1的方法（圖1 7)。 η亥方法係以半導體晶片1 〇 1側之凸塊1 〇5與電路基板1 〇4 失著焊錫粒子111後（圖17(a)及圖17(b))，予以加熱而焊接 凸塊105與電路基板ι〇4(圖17(c))。藉由進行此種方法，凸 塊105與電路基板104之電極1〇6的接合形成金屬結合，可 減少電阻。 C4技術’由於凸塊1〇5與電路基板ι〇4之電極ι〇6的接合 係藉由焊錫的金屬接合，因此電性連接之可靠性高，而被 廣泛使用。 但是’因為製作凸塊105時需要遮罩圖案等，所以有製 造單價昂貴的問題。此外，因為以焊錫形成凸塊丨〇5，所 以女裝半導體晶片1 〇 1時，焊錫可能因半導體晶片1 〇 i之荷 重而擴大。焊錫擴大時，可能與鄰接之其他焊錫接合而造 成電路短路，所以，在需要進行凸塊105之窄間距化的情 況下不適宜。 此外，Super jarfit法就電路基板1〇4上之銅布線，藉由 12228〇.d〇c 200822252 化學處理進行改質處理時需要藥品，而發生成本。再者， 由於亦需要實施廢液處理’因此有成本提高之問題。此 外由於5亥技術就電路基板1 〇4之電極1 〇6，僅可將銅改 質，因此，無法適用於電極1〇6之表面為銅以外之電路基 板104及其他零件。The Super jarflt method chemically treats the electrode 106 of the circuit substrate i 〇4 to bond the copper surface of the electrode. The electrode 1〇6 containing copper on the surface of Fig. 15(a) was subjected to chemical treatment (Fig. 15(b)). Further, when the solder particles ι are sprinkled from the electrode 1 〇 6 (Fig. 15 (c)), the solder particles in contact with the copper of the electrode 106 are partially adhered to the circuit board 1 〇 4 (Fig. 15 (Fig. 15 (Fig. 15 (c)). d)). Then, only the solder is melted by heating (Fig. 15(e)), and the semiconductor wafer 1〇1 of the bump 105 formed of gold or the like is placed thereon and soldered (Fig. 15(f)). The amount of solder is the minimum necessary substrate, and the wafer with gold bumps is bonded by flip chip bonding. Since the amount of solder is controlled to the minimum necessary, the bumps 1 〇 5 can be narrowly pitched. In addition, the method of flip chip mounting is also created by the method of recognizing the primer (1) to fill 114. A method of connecting an anisotropic conductive film to a circuit board (Fig. 16). In the first method, a mixed metal (mainly 122280.doc 200822252 nickel) particle in the film of the primer 114 is bonded to the circuit substrate 104 (Fig. 16 (a)). Then, the semiconductor wafer 1〇1 with the bumps 105 is pressed thereon (Fig. 16(b)). The semiconductor wafer 10 and the circuit board 104 are electrically connected to each other by the metal particles mixed in the ACF by the bumps 1 and 5 and the circuit board 104. In addition, the fixing of the semiconductor wafer 101 and the circuit board 1〇4 can be performed by thermally hardening the ACF (Fig. 16(c)). Instead, the ACF is used instead, and the solder particles 丨u are mixed in the primer 114. A method of mounting the semiconductor wafer 110 with the bumps 1〇5 on the circuit substrate 1〇4 and flipping the chip thereon (Fig. 17). In the η海 method, after the solder bumps 111 are lost by the bumps 1 〇 5 on the semiconductor wafer 1 〇 1 side and the circuit substrate 1 〇 4 (FIG. 17 (a) and FIG. 17 (b)), the bumps 105 are soldered. With the circuit board ι〇4 (Fig. 17(c)). By performing such a method, the bumps 105 are bonded to the electrodes 1?6 of the circuit substrate 104 to form a metal bond, which reduces the electric resistance. The C4 technology is widely used because the bonding of the bumps 1 and 5 to the electrodes ι 6 of the circuit board 4 is bonded by the metal of the solder, so that the reliability of the electrical connection is high. However, since a mask pattern or the like is required when the bump 105 is formed, there is a problem that the manufacturing unit price is expensive. Further, since the bump 丨〇 5 is formed by soldering, the solder may be enlarged by the load of the semiconductor wafer 1 〇 i when the semiconductor wafer 1 女装 1 is used. When the solder is enlarged, it may be short-circuited by bonding with other adjacent solders. Therefore, it is not preferable in the case where the narrow pitch of the bumps 105 is required. In addition, the Super jarfit method requires a medicine for the copper wiring on the circuit board 1〇4, and the chemical treatment is performed by the 12228〇.d〇c 200822252 chemical treatment, and the cost is incurred. Furthermore, since waste liquid treatment is also required, there is a problem of cost increase. Further, since the electrode 1 〇 6 of the circuit board 1 〇 4 is modified by the 5 hp technology, the copper can be modified. Therefore, the surface of the electrode 1 〇 6 is not suitable for the circuit board 104 other than copper and other components.

此外，ACF技術，凸塊1〇5與電路基板1〇4之電極ι〇6的 連接並非金屬結合，而係藉由夾著混合於内之金屬粒 子來連接因而’係藉由接觸來進行電性連接，所以在接 觸部位產生數Ω之電阻。再者，因為僅藉由acf之硬化來 維持接合，所以熱壓低，可靠性不足。再者，因為acf硬 化時費時，所以亦有通量不佳之問題。 此外，在底膠中混合焊錫粒子丨丨丨之技術，焊錫粒子丨i工 到達凸塊105正下方之概率低。因而，接合強度取決於底 膠114。因此，接合強度之可靠性與acf之情況相同程 度。 此外，為了提高焊錫粒子lu到達凸塊1〇5正下方之概 率，而提高焊錫粒子111之濃度時，其問題是極可能在鄰 接之凸塊105間形成短路，並且底膠114之絕緣破壞壽命縮 短0 此外，因為焊錫粒子ill殘留於底膠114内，所以需要縮 小進入底膠114之填料的粒徑。再者，由於窄間距化時殘 迢之焊錫粒子111極可能造成凸塊丨05間短路，因此窄間距 化受限制。 熟知一種藉由僅在金線凸塊上轉印焊膏，予以加熱，而 122280.doc 200822252 在凸塊頂端配置焊錫之方法。 但是，即使該方法，於凸塊1〇5之間距變窄時，焊膏藉 由毛細管現象而浸透於凸塊105間。0而，予以加二： 藉由焊膏接合時’凸塊1〇5間形成短路，該方法無法對應 於窄間距化。 另外，將稱為0603及0402之微小晶片零件安裝於基板本 身’在將裝置之條件予以最佳化時可行。In addition, in the ACF technique, the connection of the bump 1〇5 to the electrode ι6 of the circuit substrate 1〇4 is not metal bonding, but is connected by sandwiching the metal particles mixed therein and thus is electrically connected by contact. Sexual connection, so a resistance of several Ω is generated at the contact portion. Furthermore, since the bonding is maintained only by the hardening of the acf, the hot pressing is low and the reliability is insufficient. Furthermore, since it takes time to harden the acf, there is also a problem of poor throughput. Further, in the technique of mixing solder particles in the primer, the probability that the solder particles are directly below the bumps 105 is low. Thus, the bonding strength depends on the primer 114. Therefore, the reliability of the joint strength is the same as that of the acf. Further, in order to increase the probability that the solder particles lu are directly below the bumps 1〇5 and increase the concentration of the solder particles 111, the problem is that a short circuit is likely to be formed between the adjacent bumps 105, and the dielectric breakdown life of the primer 114 is exceeded. Shortening 0 In addition, since the solder particles ill remain in the primer 114, it is necessary to reduce the particle size of the filler entering the primer 114. Further, since the residual solder particles 111 at the time of narrow pitch are likely to cause a short circuit between the bumps 丨05, the narrow pitch is limited. It is well known to heat a solder paste by transferring it only on gold bumps, and 122280.doc 200822252 is a method of disposing solder on the top of the bump. However, even in this method, when the distance between the bumps 1 and 5 is narrowed, the solder paste is impregnated between the bumps 105 by capillary action. 0, plus two: When the solder paste is bonded, a short circuit is formed between the bumps 1 and 5, and this method cannot correspond to the narrow pitch. In addition, the mounting of tiny wafer parts called 0603 and 0402 on the substrate itself is feasible when the conditions of the apparatus are optimized.

ί. 但是，基板全體安裝各種零件之模組，會產生安裝此等 ，小晶片用之焊錫量’與安裝其以外較大之零件用料錫 里差異甚大的問題。 由於通常是以旧遮罩印刷焊膏，因此，如設定最適合 於_2之焊錫量時，對大的零件而言，焊錫量過少，而益 法獲得安裝強度。 …、 此外，採用最適於大的零件之焊錫量時，則G撕等之零 件的焊錫量過多’而造成焊錫浸透於端。 二 間發生短路’且輕的晶片零件被大的表面張力拉伸，而產 生晶片豎立現象，而無法進行正常之安裝。 因此，為了避免上述問題，而考慮在晶片零 塗佈焊貧實施預塗佈，並自零件側供給使用 件之電極上 於接合之焊 但疋’實際上以焊膏預塗佈困難。 ’一側之電 之區域非常 此因，如自上方觀察稱為〇4〇2之晶片零件時 極面積為0·1 mmx0.2 mm以下，可塗佈 小。 用 122280.doc 200822252 難，因此，如在保持之狀態下，欲 ，因保持位置精度不足，而無法配 遮:二::使在此等零件上，以某種方法印刷焊膏，印刷 =厂：分之焊膏的焊錫量過多’於加熱時，可能形成 跨接，而造成電極間短路。 此因，轉印量取決於晶片 又衣面積，亦即，依晶片ί. However, the module in which the various parts of the substrate are mounted is subject to the problem that the amount of solder used for the small wafer is greatly different from that of the larger part of the solder. Since the solder paste is usually printed with an old mask, if the amount of solder most suitable for _2 is set, the amount of solder is too small for a large part, and the mounting strength is obtained by a favorable method. ..., in addition, when the amount of solder which is most suitable for a large part is used, the amount of solder of parts such as G tearing is too large, and the solder penetrates the end. The two short circuits occurred and the light wafer parts were stretched by a large surface tension to cause wafer erection, which was impossible to perform normal installation. Therefore, in order to avoid the above problem, it is considered that pre-coating is performed on the wafer zero-coating lean, and the electrode is supplied to the electrode from the component side for bonding, but 预' is actually difficult to pre-coat the solder paste. The area of the electric field on one side is very important. For example, when the wafer part called 〇4〇2 is observed from above, the pole area is 0·1 mmx0.2 mm or less, and the coating can be small. It is difficult to use 122280.doc 200822252. Therefore, if it is in the state of being maintained, it is impossible to match the cover due to insufficient positional accuracy. Second:: Make solder paste in some way on these parts, printing = factory : There is too much solder in the solder paste. When heating, a jump may be formed, causing a short circuit between the electrodes. For this reason, the amount of transfer depends on the area of the wafer, that is, the wafer.

零件而大不相同，所以轉印 1】比用於知接之焊锡量多的焊 錫0 此種情況下，焊錫被加熱而形成溶化狀態時，焊錫以立 表面張力而蔓延晶片零件全體。因而，不但電極間形成短 路’且保持晶片零件之噴嘴上亦可能附著焊錫。 【發明内容】 有鑑於上述先前之問題’本發明之目的為提供可對先前 之μ片及電路基板廉價地供給電性連接之可靠性高，穩定 ϋ 甚至此等零件保持困 使用配料機塗佈焊膏時 料於正確之位置。 之量，且連接小型化之半導體晶片用的必要最少量之焊錫 的半導體裝置、電子電路之製造方法及電子電路之製造裝 置。 ^為了達成上述目的，本發明之電子電路之製造方法的特 徵為·其係使用焊錫將電子零件接合於電路基板上的電子 電路之製造方法’ i包含··第—步驟，其係在台上層狀地 放置焊錫粒子；第二步驟，其係將上述電子零件之電極部 按壓在放置於上述台上之焊錫粒子上，而使焊錫粒子壓接 於該電極部；及第三步驟，其係使用壓接於上述電極部之 122280.doc -10 - 200822252 焊錫粒子’將上述電子零件接合於上述電路基板上。 採用上述之發明時’係在台上層狀地放置焊錫粒子，抵 接電子零件之電極部，而使焊錫粒子塵接於該電極部。而 後，將上述電極部中之焊錫予以加熱，一旦溶解時，將上 述電子零件接合於上述電路基板上。Since the parts are greatly different, the transfer 1] is more than the solder used for the known solder. In this case, when the solder is heated to form a molten state, the solder spreads over the entire wafer part with the vertical surface tension. Therefore, solder may be attached not only to the short circuit formed between the electrodes but also to the nozzles holding the wafer parts. SUMMARY OF THE INVENTION In view of the above-mentioned prior problems, the object of the present invention is to provide a high reliability, stable ϋ, and even the use of a batching machine for supplying electrical connections to a conventional μ piece and a circuit board at low cost. Solder paste is expected to be in the correct position. A semiconductor device, a method for manufacturing an electronic circuit, and a device for manufacturing an electronic circuit, which are required to connect a miniaturized semiconductor wafer with a minimum amount of solder. In order to achieve the above object, a method of manufacturing an electronic circuit according to the present invention is characterized in that it is a method for manufacturing an electronic circuit in which an electronic component is bonded to a circuit board using solder, and includes a step on the stage. Depositing the solder particles in a layered manner; in the second step, pressing the electrode portion of the electronic component on the solder particles placed on the stage to bond the solder particles to the electrode portion; and the third step The electronic component is bonded to the circuit board by using solder particles '122280.doc -10 - 200822252 soldered to the electrode portion. According to the above invention, the solder particles are placed on the stage in a layered manner, and the electrode portion of the electronic component is abutted, and the solder particles are attached to the electrode portion. Then, the solder in the electrode portion is heated, and when dissolved, the electronic component is bonded to the circuit board.

此外，不使㈣合駭熱，可藉由在電子零件之電極部 上抵接、麼碎嬋錫而麼接。由於可除去未壓碎之焊錫，因 此’僅在必要之部分麼接焊錫時，即使接合劑之殘邊造成 問題之情況’及對儘量不希望提供熱過程者，仍可塗 錫。 為了達成上述㈣，本發明之電子電路之製造方法的特 徵為：其係使料錫將電子零件接合於電路基板上的電子 電路之製造方法，1包含：第_步驟，其係在台上層狀地 放置焊錫粒子；第四步驟，其係將包含突起部之構件按壓 在放置於上述台上之焊錫粒子上’而使該焊錫粒子壓接於 上述突起部；第五步驟，其係將壓接於上述突起部之焊錫 粒子轉印於上述電子零件或±述電路基板之電極部上，·及 第一步驟’其係使用壓接於上述電極部之焊錫粒子，將上 述電子零件接合於上述電路基板上。 採用上述之發明日夺，係在台上層㈣放置焊錫粒子，抵 接包含突起部之構件，而使焊錫粒子壓接於上述突起部。 將C接於上述突起部之焊錫粒子轉印於上述電子零件或上 述電路基板之電極部，使用壓接於電極部H粒子，將 上述電子零件接合於上述電路基板上。 122280.doc 200822252 為了達成上述目的，本發明之電子電路之製造方法的特 徵為：其係使用焊錫將電子零件接合於電路基板上的電子 電路之製造方法，且包含：第六步驟，其係在上述電路基 板上層狀地放置焊錫粒子；第七步驟，其係將包含突起部 之構件按壓在放置於上述電路基板上之焊錫粒子上，而使 該焊錫粒子壓接於上述電路基板之電極部上；及第三步 驟，其係使用壓接於上述電極部之焊錫粒子，將上述電子 f 零件接合於上述電路基板上。 採用上述之發明時，係在電路基板上層狀地放置焊錫粒 子，抵接包含突起部之構件，而使焊錫粒子壓接於上述電 路基板之電極部，並使用壓接於上述電極部之焊錫粒子， 將上述電子零件接合於上述電路基板上。 為了達成上述目的，本發明之電子電路之製造方法的特 徵為：其係使用焊錫將電子零件接合於電路基板上的電子 電路之製造方法，且藉由上述揭示之任何一種方法，使附 / 著於上述電子零件之電極部的焊錫粒子炼化，而以焊錫預 塗佈上述電子零件之電極部，藉由上述揭示之任何一種方 法’使附著於上述電路基板之電極部的焊錫粒子熔化，而 以焊錫預塗佈上述電路基板之電極部，在使電極部以焊錫 預塗佈之上述電子零件與上述電路基板相對而接觸之狀態 下’使上述焊錫熔化，藉由作用於該焊錫之表面張力，使 上述電子零件與上述電路基板定位。 採用上述之發明時，係使附著於電子零件之電極部與上 述電路基板之電極部的焊錫粒子熔化，以焊錫預塗佈電極 122280.doc -12- 200822252 部。其後，使上述電子零件與上述電路基板相對而接觸， 使預塗佈之焊錫熔化，來焊接上述電子零件與上述電路基 板上述電子零件與上述電路基板可藉由作用於焊錫之表 面張力，使各個電極部位置對準。 為了達成上述目的，本發明之電子電路之製造方法的特 欲為·其係使用焊錫將半導體元件接合於電路基板上之半 導體裝置的製造方法，且將上述半導體元件接合於上述電 路基板日守，使用上述揭示之任何一種電子電路之製造方 法。 採用上述之發明時，係藉由本專利發明之方法來製造上 述半導體元件或上述電路基板。 —為了達成上述目的，本發明之半導體裝置之特徵為：係 藉由上述揭示之電子電路之製造方法來製造。 採用上述之發料，由於係藉由壓接焊錫、量取、加熱 而形成焊接，因此可形成微小之焊接。Further, the heat can be prevented by (4) heat-bonding by abutting on the electrode portion of the electronic component. Since the uncompressed solder can be removed, it is possible to apply tin even if the solder is required in the necessary part, even if the residual side of the bonding agent causes a problem, and if it is not desired to provide a heat process. In order to achieve the above (4), the method of manufacturing an electronic circuit according to the present invention is characterized in that it is a method for manufacturing an electronic circuit in which tin is bonded to a circuit board by a tin, and the method includes the following steps: Place the solder particles in a shape; the fourth step is to press the member including the protrusion on the solder particles placed on the stage to press the solder particles to the protrusion; and the fifth step is to press The solder particles attached to the protrusions are transferred onto the electronic component or the electrode portion of the circuit board, and the first step of using the solder particles pressed against the electrode portion to bond the electronic component to the above On the circuit board. According to the above invention, the solder particles are placed on the upper stage (four) to abut the member including the protrusion, and the solder particles are pressure-bonded to the protrusion. Solder particles having C attached to the projections are transferred to the electronic component or the electrode portion of the circuit board, and the electronic component is bonded to the circuit board by pressure bonding to the electrode portion H particles. 122280.doc 200822252 In order to achieve the above object, a method of manufacturing an electronic circuit according to the present invention is characterized in that it is a method of manufacturing an electronic circuit in which an electronic component is bonded to a circuit board using solder, and includes: a sixth step, which is The solder substrate is placed on the circuit board in a layered manner; and in the seventh step, the member including the protrusion is pressed against the solder particles placed on the circuit board, and the solder particles are pressure-bonded to the electrode portion of the circuit board. And a third step of bonding the electronic f-part to the circuit board by using solder particles crimped to the electrode portion. According to the above invention, the solder particles are placed in a layered manner on the circuit board, and the member including the protrusion is abutted, and the solder particles are pressed against the electrode portion of the circuit board, and the solder is pressed against the electrode portion. The particles are bonded to the circuit board by the electronic component. In order to achieve the above object, a method of manufacturing an electronic circuit according to the present invention is characterized in that it is a method of manufacturing an electronic circuit in which an electronic component is bonded to a circuit board using solder, and is attached to any of the methods disclosed above. The solder particles of the electrode portion of the electronic component are refining and soldering, and the electrode portion of the electronic component is pre-coated with solder, and the solder particles adhering to the electrode portion of the circuit board are melted by any of the methods disclosed above. Pre-coating the electrode portion of the circuit board with solder, and causing the solder to be melted while the electronic component pre-coated with the electrode portion is in contact with the circuit board, and the surface tension acting on the solder And positioning the electronic component and the circuit substrate. According to the above invention, the solder particles adhering to the electrode portion of the electronic component and the electrode portion of the circuit board are melted, and the electrode 122280.doc -12-200822252 is precoated with solder. Thereafter, the electronic component is brought into contact with the circuit board, and the pre-coated solder is melted to solder the electronic component and the circuit board. The electronic component and the circuit board can be applied to the surface tension of the solder. The respective electrode portions are aligned. In order to achieve the above object, a method for manufacturing an electronic circuit according to the present invention is a method for manufacturing a semiconductor device in which a semiconductor element is bonded to a circuit board by using solder, and the semiconductor element is bonded to the circuit board. A method of fabricating any of the electronic circuits disclosed above is used. In the case of the above invention, the above semiconductor element or the above circuit substrate is manufactured by the method of the present invention. In order to achieve the above object, a semiconductor device of the present invention is characterized in that it is manufactured by the above-described method of manufacturing an electronic circuit. According to the above-mentioned hair material, since welding is formed by pressure welding, weighing, and heating, minute welding can be formed.

、此外，採用上述之發明時，由於可使焊錫之使用量達到 必要最小限度’因& ’比—般藉由遮罩印刷塗佈焊膏，可 縮小晶片狀電子零件之鄰接距離。因&，上述發明之半導 體裝置可將外形進一步小型化。 :、、、了達成上述目的，本發明之電子電路之製造裝置的特 徵為：其係使用焊錫將電子零件接合於電路基板上的電子 電路之製造裝置，且將 义电于芩件之電極部按壓在層狀 地放置於台上的焊錫粒子上， 红 1史’于錫粒子壓接於該電極 ’使用塵接於上述電極部之捏{尽 4电裡°丨之坏錫粒子，將上述電子零件 122280.doc -13- 200822252 接合於上述電路基板上。 採用上述之發明時，可將焊錫粒子層狀地放置於台上， 抵接電子零件之電極部，使焊錫粒子麼接於該電極部，上 述電子零件接合於上述電路基板上。 • 此外，殘用接合劑及熱，可藉由在電子零件之電極部 上抵接、麼碎谭錫而壓接。由於可除去未壓碎之焊錫，因 此，僅在必要之部分壓接焊錫時，即使接合劑之殘渣造成 ( Η題之L兄’及對不希望提供熱過程者，仍可塗佈焊錫。 為了達成上述目的，本發明之電子電路之製造裝置之特 徵為··其係使用焊錫將電子零件接合於電路基板上的電子 電路之製造裝置，且將包含突起部之構件按壓在層狀地放 置於台上之焊錫粒子上，使該焊錫粒子壓接於上述突起 P使壓接於上述突起部之焊錫粒子轉印於上述電子零件 或上述電路基板之電極部上，使用壓接於上述電極部之焊 錫粒子，將上述電子零件接合於上述電路基板上。 U 採用上述之發明時，焊錫粒子層狀地放置於台上，抵接 包含突起部之構件，使焊錫粒子壓接於上述突起部，將壓 接於上述突起部之焊錫粒子轉印於上述電子零件或上述電 路基板之電極部上，使用壓接於電極部之焊錫粒子，將上 述電子零件接合於上述電路基板上。 為了達成上述目的，本發明之電子電路之製造裝置之特 徵為：其係使用焊錫將電子零件接合於電路基板上的電子 電路之製造裝置，且在電路基板上層狀地放置焊錫粒子， 將包含突起部之構件按壓在放置於上述電路基板上之焊錫 122280.doc -14- 200822252 粒子上，使該焊錫粒子壓接於上述_ 一 —__ 用壓接於上述電極部之焊錫粒子，將上述電子零件接合於 上述電路基板上。 採用上述之發明時，係在電路基板上層狀地放置焊錫粒 子，抵接包含突起部之構件，使焊錫粒子壓接於上述電路 基板之電極部，使用壓接於上述電極部之焊錫粒子，將上 述電子零件接合於上述電路基板上。 Ο L) 本發明之電子電路之製造方法，如以上所述，係包含以 下卜驟之方法.第-步驟，其係在台上層狀地放置焊锡粒 子；第二步驟，其係將上述電子零件之電極部按壓在放置 於上述台上之烊錫粒子上，而使焊錫粒子遷接於該電極 部；及第三步驟，其係使„接於上述電極部之焊錫粒 子，將上述電子零料合於上述電路基板上。 二以’不使用接合劑及熱，而可藉由料錫抵接、屡碎 而壓接於電子零件之電極部。 提=::Γ合劑之殘渣造成問題情況下，或對不希望 仍可塗佈谭錫，因此，達到可對先前之晶 曰電路基板廉價地供給電性連接之可靠m ϊ，且連接小型化之半導體 η 心疋 效果。 牛導體Ba片用之必要最少量的焊錫之 此外，本發明之電子電路之製 包含以下步驟之方法··第一步驟，以上所述’係 焊錫粒子；第四步驟，其係將包含 口上層狀地放置 置於上述台上之痒錫粒子上，而使該痒锡::广在放 坪场板子壓接於上述 122280.doc -15- 200822252 犬起邛，第五步驟，其係將壓接於上述突起部之焊錫粒子 轉印於上述電子零件或上述電路基板之電極部上；及第三 V驟其係使用壓接於上述電極部之焊錫粒子，將上述電 子零件接合於上述電路基板上。 所以即使不將電子零件之電極部直接抵接於焊錫粒 子，仍可藉由包含突起部之構件，而焊接時必要量程度地 量取焊錫粒子。 亦即，達到可對先前之晶片及電路基板廉價地供給電性 連接之可靠性高，穩定之量，且連接小型化之半導體晶片 用之必要最少量的焊錫之效果。 此外，本發明之電子電路之製造方法，如以上所述，係 包3以下步驟之方法：第六步驟，其係在上述電路基板上 層狀地放置焊錫粒子；第七步驟，其係將包含突起部之構 件按壓在放置於上述電路基板上之焊錫粒子上，而使該焊 錫粒子壓接於上述電路基板之電極部上；及第三步驟，其 係使用壓接於上述電極部之焊錫粒子，將上述電子接 合於上述電路基板上。 採用上述結構時，可將焊錫粒子壓接於電路基板上之電 極部，而以焊接時必要量之程度量取焊錫粒子。 所以，達到可對先前之晶片及電路基板廉價地供給電性 連接之可靠性高，穩、定之4，且連接小魏之半導體晶片 用之必要最少量的焊錫之效果。 此外’本發明之電子電路之製造方法，如以上所述，係 藉由上述揭示之方法，使附著於上述電子零件之電極部的 122280.doc -16- 200822252 焊錫粒子炼化’以焊錫預塗佈上述電子零件之電極部，並 藉由上述揭示之方法，使附著於上述電路基板之電極部的 焊錫粒子熔化，以焊錫預塗佈上述電路基板之電極部，在 使電極部以焊錫預塗佈之上述電子零件與上述電路基板相 對而接觸的狀態下，使上述焊錫熔化，並藉由作用於該焊 錫之表面張力，將上述電子零件與上述電路基板位置對準 之方法。 f、 採用上述結構時，係在電極部上預塗佈藉由上述揭示之 方法壓接之適量的焊錫，並使該焊錫熔化。藉此，可利用 作用於焊錫之表面張力，將各個電極部位置對準。 斤X達到可對先前之晶片及電路基板廉價地供給電性 連接之可#性高，穩定之量，且連接小型化之半導體晶片 用之必要最少量的焊錫之效果。 此外’本發明之電子電路之製造方法，如以上所述，將 上述半導體7G件接合於上述電路基板時，係使用上述揭示 L 之電子電路之製造方法。 、所以，達到可對先前之晶片及電路基板廉價地供給電性 連接之可靠性高，穩定之量，且連接小型化之半導體晶片 用之必要最少量的焊錫之效果。 此外’本發明之半導體裝置，如以上所述，係藉由上述 揭示之電子電路之製造方法來製造。 抓用上述之結構時，由於係壓接、量取焊錫，形成焊 接，因此，可形成微小之焊接。 所以’達到可斜 1 J對先則之晶片及電路基板廉價地供給電性 122280.doc -17- 200822252 連接之可靠性高’穩定之量，且連接小型化之半導體晶片 用之必要最少量的焊錫之效果。 此外’本發明之電子電路之製造裝置，如以上所述，係 在層狀地放置於台上之焊錫粒子上抵接上述電子零件之電 極部’使焊錫粒子壓接於該電極部，使用壓接於上述電極 部之焊錫粒子，將上述電子零件接合於上述電路基板上。 所以’不使用接合劑及熱’而可藉由將焊錫抵接、壓碎 ΟFurther, in the case of the above invention, since the amount of solder used can be minimized, the solder paste is applied by mask printing, and the adjacent distance of the wafer-shaped electronic component can be reduced. The above-described semiconductor device of the present invention can further reduce the size of the semiconductor device. In order to achieve the above object, the apparatus for manufacturing an electronic circuit according to the present invention is characterized in that it is a manufacturing apparatus for bonding an electronic component to an electronic circuit on a circuit board by using solder, and is electrically connected to the electrode portion of the component. Pressing on the solder particles placed on the stage in a layered manner, the red tin is in the case where the tin particles are pressed against the electrode, and the dust is attached to the electrode portion by the dust. The electronic component 122280.doc -13- 200822252 is bonded to the above circuit substrate. According to the above invention, the solder particles can be placed on the stage in a layered manner, and the electrode portions of the electronic component can be brought into contact with each other, and the solder particles can be bonded to the electrode portion, and the electronic component can be bonded to the circuit board. • In addition, the residual bonding agent and heat can be crimped by abutting on the electrode portion of the electronic component. Since the uncompressed solder can be removed, the solder can be applied only when the solder is soldered in the necessary portion, even if the residue of the bonding agent is caused by the residue of the bonding agent and for those who do not wish to provide a thermal process. In order to achieve the above object, an apparatus for manufacturing an electronic circuit according to the present invention is characterized in that it is a manufacturing apparatus for an electronic circuit in which an electronic component is bonded to a circuit board by using solder, and a member including the protrusion is pressed in a layered manner. On the solder particles on the stage, the solder particles are pressure-bonded to the protrusions P, and the solder particles pressed against the protrusions are transferred onto the electrode parts of the electronic component or the circuit board, and are pressed against the electrode portions. The solder particles are bonded to the circuit board by the electronic component. In the above invention, the solder particles are placed on the stage in a layered manner, and the member including the protrusion is abutted, and the solder particles are pressed against the protrusion. Solder particles pressed against the protruding portion are transferred onto the electrode portion of the electronic component or the circuit board, and solder particles that are pressed against the electrode portion are used. The electronic component is bonded to the circuit board. In order to achieve the above object, an apparatus for manufacturing an electronic circuit according to the present invention is characterized in that it is a manufacturing apparatus for bonding an electronic component to an electronic circuit on a circuit board using solder, and is in a circuit. Solder particles are layered on the substrate, and the member including the protrusion is pressed against the solder 122280.doc -14-200822252 particles placed on the circuit board, and the solder particles are pressure-bonded to the above-mentioned _____ In the solder particles of the electrode portion, the electronic component is bonded to the circuit board. In the above invention, solder particles are layered on the circuit board, and the member including the protrusion is abutted to solder the solder particles. The electronic component is bonded to the circuit board by solder particles that are pressed against the electrode portion in the electrode portion of the circuit board. Ο L) The method for manufacturing the electronic circuit of the present invention includes the following The method of the first step, which is to place the solder particles layered on the stage; the second step is to The electrode portion of the electronic component is pressed against the antimony tin particles placed on the stage to transfer the solder particles to the electrode portion; and the third step is to connect the solder particles to the electrode portion to the electrons The material is combined with the above-mentioned circuit board. Secondly, 'the bonding agent and the heat are not used, and the solder can be pressed against the electrode portion of the electronic component by the soldering and scraping. Ti:=: The residue of the chelating agent causes problems In this case, it is not desirable to apply Tan Xi, and therefore, it is possible to achieve a reliable supply of electrical connection to the prior art silicon germanium circuit substrate at a low cost, and to connect the miniaturized semiconductor η core 疋 effect. In addition, the minimum amount of solder used for the sheet is further provided by the method of the electronic circuit of the present invention comprising the following steps: · the first step, the above-mentioned 'soldering solder particles; the fourth step, which is to include the upper layer of the mouth Placed on the itch tin particles on the above-mentioned table, and the itch tin:: widely embossed on the plate of the ping-pong plate, the above-mentioned 122280.doc -15-200822252 dog crepe, the fifth step, which is crimped to the above Solder particles of the protrusion The electronic component or the electrode portion of the circuit board is printed on the electronic component or the third electrode, and the electronic component is pressed onto the electrode portion to bond the electronic component to the circuit board. Therefore, even if the electrode portion of the electronic component is not directly contacted with the solder particles, the solder particles can be measured by the necessary amount during the soldering by the member including the protrusion. That is, it is possible to achieve a high reliability and a stable amount of electrical connection to the previous wafer and the circuit board, and to connect the miniaturized semiconductor wafer with the minimum amount of solder necessary. Further, the method of manufacturing the electronic circuit of the present invention, as described above, is a method of the following steps: a sixth step of placing solder particles layerwise on the circuit substrate; and a seventh step, which will include The member of the protrusion is pressed against the solder particles placed on the circuit board to press the solder particles onto the electrode portion of the circuit board; and the third step is to use solder particles crimped to the electrode portion The electrons are bonded to the circuit board. According to the above configuration, the solder particles can be pressure-bonded to the electrode portion on the circuit board, and the solder particles can be measured to the extent necessary for soldering. Therefore, the reliability of supplying the electrical connection to the previous wafer and the circuit board is high, stable, and stable, and the effect of connecting the small amount of solder to the semiconductor wafer of Xiaowei is achieved. Further, the method for producing an electronic circuit according to the present invention, as described above, reflows the solder particles of the electrode portion of the electrode portion of the electronic component by the method disclosed above by soldering. By coating the electrode portion of the electronic component, the solder particles adhering to the electrode portion of the circuit board are melted by the method disclosed above, and the electrode portion of the circuit board is pre-coated with solder, and the electrode portion is pre-coated with solder. In a state in which the electronic component of the cloth is in contact with the circuit board, the solder is melted, and the electronic component and the circuit board are aligned by a surface tension acting on the solder. f. In the case of the above structure, an appropriate amount of solder which is pressure-bonded by the above-described method is precoated on the electrode portion, and the solder is melted. Thereby, the position of each electrode portion can be aligned by the surface tension acting on the solder. The jin X has the effect of being able to supply an electrical connection to the previous wafer and the circuit board at a low cost, a stable amount, and the necessary minimum amount of solder for connecting the miniaturized semiconductor wafer. Further, in the method of manufacturing an electronic circuit according to the present invention, as described above, when the semiconductor 7G is bonded to the circuit board, the method of manufacturing the electronic circuit disclosed in the above-mentioned L is used. Therefore, it is possible to achieve a high reliability and a stable amount of electrical connection to the previous wafer and the circuit board, and to connect the miniaturized semiconductor wafer with the minimum amount of solder necessary. Further, the semiconductor device of the present invention is manufactured by the above-described method of manufacturing an electronic circuit as described above. When the above structure is grasped, since soldering is performed by crimping and measuring solder, a minute solder can be formed. Therefore, 'achievable tilt 1 J to the first wafer and circuit board to supply electricity 122280.doc -17- 200822252 high reliability of the connection 'stable amount, and the minimum necessary for connecting the miniaturized semiconductor wafer The effect of soldering. Further, in the manufacturing apparatus of the electronic circuit of the present invention, as described above, the electrode portion of the electronic component is brought into contact with the solder particles placed on the stage in a layered manner, so that the solder particles are pressure-bonded to the electrode portion, and the pressure is used. The solder particles are connected to the electrode portion, and the electronic component is bonded to the circuit board. Therefore, by using no bonding agent and heat, the solder can be abutted and crushed.

L 而壓接於電子零件之電極部。 胃亦即g卩使接合劑之殘潰造成問題情況下，或對不希望 提供熱過程者，仍可塗佈焊錫，因此，達到可對先前之晶 ^及電路基板廉價地供給電性連接之可靠性高，穩定之 量，且連接小型化之半導體晶片用之必要最少量的焊錫之 效果。 此外，本發明之電子電路之製造裝置，如以上所述，係 曰狀地放i於台上之焊錫粒子上抵接包含突起部之構 件，使該焊錫粒子壓接於上述突起部，並使壓接於上述突 起^之焊錫粒子轉印於上述電子零件或上述電路基板的電 極^上，使用麼接於上述電極部之焊錫粒子，將上述電子 零件接合於上述電路基板上。 X即使不將電子零件之電極部直接抵接於焊錫粒 T仍可藉由包含突起部之構#，而焊接時必要量程度地 量取焊锡粒子。 、亦即，達到可對先前之晶片及電路基板廉價地供給電性 連接之可靠性高，穩定之量，且連接小型化之半導體晶片 122280.doc -18- 200822252 用之必要最少量的焊錫之效果。 此外本發明之電子電路之製造裝置，如以上所述，係 在電路基板上層狀地放置焊錫粒子，在放置於上述電路基 板JlH粒子上抵接包含突起部之構件，使該焊錫粒子 I接於上述電路基板之電極部上，使賴接於上述電極部 之2錫粒子，將上述電子零件接合於上述電路基板上。 藉由上述、、、σ構，可將焊錫粒子壓接於電路基板上之電極 部，僅焊接必要量程度地量取焊錫粒子。 所以，取彳于可對先前之晶片及電路基板廉價地供給電性 連接之可罪性尚，穩定之量，且連接小型化之半導體晶片 必要最少量的焊錫之效果。 本t明之其他目的、特徵及優點由以下所示之揭示當可 充刀明確。此外，本發明之利益由參照附圖之其次的說明 當可明瞭。 【實施方式】 [第一種實施形態] 依據圖1〜圖3說明本發明一種實施形態如下。 圖1係顯示本實施形態中之半導體裝置的製造方法之 圖’且係從半導體晶片1之側面方向觀察之圖。 首先，如圖1(a)所示，使焊錫粒子n均勻地分散於台。 上。焊錫粒子11如假設係包含於無鉛焊膏之焊錫粒子，不 過並不限定於此。 本實施形態中之半導體裝置的製造方法，重要的是均句 地分散焊錫粒子11。台21係將塗佈於半導體晶片i或晶圓3 122280.doc -19- 200822252 之焊錫均勻地鋪滿用的構件。焊錫粒子u在台2i之上 地分散即可。 其次’如B 1(b)所在均句地分散焊錫粒^的台2ι 上’壓上形成於半導體晶片1上之凸塊5，以凸塊5壓碎焊 :粒子η，而壓接於凸塊5(圖1(c))。另外，即使在該步驟 >錫粒子11進人凸塊5之間，藉由在圖1(b)之步驟洗淨未壓 接之焊錫粒子11而除去’不致因焊錫粒子u而污染凸塊5 之間。 目前，半導體裝置之安裝中主要使用之無鉛焊膏，係含 有粒徑為數10 μιη程度之焊錫粒子。該焊錫粒子較柔軟， 而可輕易地壓碎。 壓碎之焊錫粒子’如壓碎之對方係金屬時，可較穩定地 持續壓接，不過需視壓上之力而定。，亦即，如上述，以凸 塊5塵碎焊錫粒子η而壓接於凸塊5時，可使壓接之部分附 著焊錫粒子1 1。 如此，不使用焊錫抗蝕劑，而可在微小之區域量取焊 锡。 其次，如圖1⑷所示，將半導體晶片i移動至電路基板4 上之搭載该半導體晶片丨的位置，使該半導體晶片1放置於 電路基板4之特定位置而安裝（圖Ue))。 半導體晶片1之安裝方法並不特別指定，而係藉由將壓 接於半導體晶片1之焊錫粒子n加熱，熔化焊錫來安裝。 另外，如上述，移動壓接焊錫粒子丨丨之半導體晶片i 時’可能因撞擊等’造成焊錫粒子u自半導體晶片m 122280.doc -20- 200822252 此時，亦可在將焊錫粒子n壓接至半導體晶片1後，將 桿錫粒子11加熱，熔化焊錫，而固定於半導體晶片i。 此外，上述步驟係揭示將半導體晶片1安裝於電路基板4 之步驟，不過，半導體晶片丨即使是其他晶片狀之電子零 件2，如矽晶片電容器或晶片電阻等晶片狀之電子零件2， 仍可同樣地安裝於電路基板4。 另外，分散於台21之焊錫粒子u若未被均勻地分散，藉 由凸塊5而自上壓住時，壓接於凸塊5之焊錫粒子丨丨的量， 可能依有凸塊5之部位而不均勻。此外，即使各個凸塊5， 壓接之焊錫粒子11量亦依凸塊5中之部位而不同，壓接之 焊錫粒子11的層數亦可能不均勻。這種情況下，安裝半導 體晶片1時，由於熔化焊錫粒子丨丨時之焊錫量上產生變 動因此無法微小之安裝。因而，壓接之焊錫粒子1 1的量 需要保持均勻。 如在台2 1上均勻地量取焊錫之方法，有藉由均勻地塗佈 於台21之液體來量取的方法。 如圖2(a)所示，在台21上塗佈液體12，如圖2(b)所示， 藉由鉍轉塗佈（圖上未顯示），將液體12均勻地擴散，進一 步如圖2(c)所示，在液體12上充分灑上許多焊錫粒子u。 接觸於液體12之焊錫粒子11可藉由液體12之吸附效應， 而附著於σ 21。另外，因為不接觸於液體丨2之焊錫粒子i i 無去附著於台21，所以可將台21傾斜或藉由送風（Air blow)，即可輕易地自台21除去（圖2(d))。 122280.doc -21 - 200822252 如此，藉由將焊錫塗佈於台21上，可將焊錫粒子丨丨均勻 地塗佈於台2 1。 此外，上述之方法並未揭示藉由旋轉塗佈而塗佈之液體 12的量，不過，藉由調整上述液體12之量，可更均勻地調 整壓接於半導體晶片1之焊錫粒子U的量。 如圖3(a)所示，藉由旋轉塗佈而薄地塗佈液體12。將塗 佈之液體12的厚度形成焊錫粒子丨丨之直徑以下之厚度的方 式薄塗擴散，並自其上充分灑上許多焊錫粒子n(圖 3(b))。其後，將台21傾斜，或是藉由送風，即可輕易地自 台21除去無法接觸於液體12之焊錫粒子11(圖3(c))。 如此，可進行一層焊錫粒子11之均勻塗佈。在台21上準 備一層程度之焊錫粒子U後，可對比焊錫粒子丨丨之粒徑稍 寬之間隔的凸塊5，均勻地壓接焊錫粒子丨i。 如均勻地塗佈一層直徑為20 μπι之焊錫粒子1丨時，藉由 旋轉塗佈而塗佈之液體12的厚度形成5 μπι。並自其上充分 灑上許多直徑為20 μηι之焊錫粒子丨i。 與旋轉塗佈之液體12接觸的焊錫粒子11附著於液體丨2， 不過’藉由液體12而附著於台21之焊錫粒子11的搭載於更 上方的焊錫粒子11無法接觸於液體12。亦即，因為並不發 生液體12對台21之黏合作用，所以不附著於台21。 該狀態下，如傾斜台21時，附著於液體12之焊錫粒子11 仍然殘留於台21上，不過，未接觸於液體12之焊錫粒子 11 ’則被重力吸引而掉落。如此，可僅保留一層焊錫粒子 1卜 122280.doc 22- 200822252 ，此外，上述之液體12亦可為熔劑13。如此，而後將焊錫 粒子11加熱，熔敷於電路基板而安裝時，可省略塗佈熔劑 13之步驟。 另外，k焊賞係在熔劑13中混入焊錫粒子u者亦明瞭， 溶劑13適合保持焊錫粒子11。 言此外如上述，量取焊錫粒子之方法，可使用於量取半 導體晶片1或晶片狀之電子零件2、日日日圓3、電路基板4等各 種焊錫接合部之焊錫的方法。 此時，在安裝於電路基板4之半導體晶片工及晶片狀之電 子2件2等中，有各種尺寸之零件。上述零件對電路基板4 之安裝步驟’需要安裝如稱為刚5之縱工咖，橫〇 5 _ 之4件，或將上述1〇05進一步小型化之〇6〇3、， u % ^曰曰 “ 4器或晶片電阻等尺寸不同的晶片狀電子零件2。 如晶片狀之電子零件2 ’如上述，因為有各種大小的電 子；件戶斤以女裝時需要之焊錫量，依零件而大為不同。 因使用之焊錫量需要使用適合安裝之晶片狀電子零件 的量。 此外，需要依晶片狀之電子零件2，而提高焊接之強 度。此種情況下，進行增加用於接合之焊錫量，以提高焊 接之強度。 但是，僅增加焊錫粒子"之量，可能喪失接合之均句 、再者’使用超過需要之焊錫量，來安裝晶片狀之電子 零件2時’可能焊錫擴散至其餘處，而造成跨接。 亦即’需要對晶片狀之電子零件2供給分別適合安裝之 122280.doc -23- 200822252 晶片狀電子零件2的焊錫量。 本實施形態之方法，可藉由均勻地分散於台21之焊錫粒 子11的粒徑’來調整用於安裝晶片狀電子零件的焊錫量。 如揭示在寬100 μιη，長度為1〇〇 μιη之電極6上配置焊錫 粒子11之情況。此時，焊錫粒子丨丨之粒徑為5 〇 情況 下’焊錫粒子11在上述電極6上附著4個。此外，焊錫粒子 11之粒徑為20 μηι情況下，焊錫粒子u在上述電極6上附著 25個。 此時，附著於上述電極6之焊錫粒子丨丨的體積總量分別 為V(20 μιη)、V(50 μηι)時，其體積比為： V(20 μηι)/ν(50 μηι) = ((20/2)Λ3χ25)/((5〇/2)Α3χ25)==2/5。 亦即，藉由調整使用之焊錫粒子丨丨的直徑，可調整附著 於電極6之焊錫的體積。 此外，凸塊5並不特別限定材質，不過宜為金屬，如只 須為以金形成之金凸塊等即可。 此外，凸塊5之高度須一纟，凸塊5之形狀，亦可擴大形 成底面，而在上述步驟增加接觸之焊錫粒子丨丨數量。再 者’亦可藉由將凸塊5之頂端形成平坦，而防止桿錫 11移動至凸塊5之外。 此外，凸塊5之形狀’亦可將凸塊5之底面予以粗輪加 工。以防止Μ碎之焊錫粒子n擴散於橫方向，其他焊锡粒 子11被a碎之焊錫粒子n擠出，@自凸塊5脫離，並择加 與焊錫粒子η之接觸面積，可藉由凹凸嵌^容易 此時’在凸塊5上形成凹凸之方法’亦可藉由藥品處理 122280.doc -24- 200822252 而形成，亦可壓上另外之凹凸形狀而形成。該凸塊5之凸 部儘可能為頂端係尖銳形狀。 如上述，形成凸塊5之方法，可在具備宏觀上係平坦， 不過在限定於凸塊5程度之範圍來觀察為凹凸形狀的板 上，藉由壓上附凸塊5之半導體晶片丨或晶圓3而形成。 Γ:L is crimped to the electrode portion of the electronic component. The stomach, that is, the crucible causing the problem of the disintegration of the bonding agent, or the solder which is not desired to provide the thermal process, can be applied with the solder, so that the electrical connection can be inexpensively supplied to the previous crystal substrate and the circuit substrate. High reliability, a stable amount, and the effect of connecting the miniaturized semiconductor wafer with the minimum amount of solder necessary. Further, in the apparatus for manufacturing an electronic circuit according to the present invention, as described above, the solder particles coated on the stage are brought into contact with the member including the protruding portion, and the solder particles are pressed against the protruding portion. Solder particles pressed against the protrusions are transferred onto the electronic component or the electrode of the circuit board, and the electronic component is bonded to the circuit board by using solder particles attached to the electrode portion. Even if the electrode portion of the electronic component is not directly abutted against the solder particles T, the solder particles can be measured by the necessary amount during soldering. That is, it is necessary to achieve a high reliability and a stable amount of electrical connection to the previous wafer and the circuit board, and to connect the miniaturized semiconductor wafer 122280.doc -18-200822252 with the minimum amount of solder necessary effect. Further, in the apparatus for manufacturing an electronic circuit according to the present invention, as described above, solder particles are layered on the circuit board, and the member including the protrusion is placed on the circuit board J1H particles, and the solder particles are connected. The tin component adhering to the electrode portion is bonded to the circuit board on the electrode portion of the circuit board, and the electronic component is bonded to the circuit board. By the above-mentioned, and σ structures, the solder particles can be pressure-bonded to the electrode portion on the circuit board, and the solder particles can be measured only by the necessary amount of soldering. Therefore, it is necessary to take a small amount of soldering effect on the semiconductor wafer to be miniaturized by the fact that the electrical connection of the previous wafer and the circuit board can be inexpensively supplied. Other objects, features, and advantages of the present invention will become apparent from the following disclosure. Further, the benefit of the present invention will become apparent from the following description with reference to the accompanying drawings. [Embodiment] [First Embodiment] An embodiment of the present invention will be described below with reference to Figs. 1 to 3 . Fig. 1 is a view showing a method of manufacturing a semiconductor device in the present embodiment, and is viewed from a side surface direction of the semiconductor wafer 1. First, as shown in Fig. 1(a), the solder particles n are uniformly dispersed on the stage. on. The solder particles 11 are assumed to be included in the solder particles of the lead-free solder paste, but are not limited thereto. In the method of manufacturing a semiconductor device of the present embodiment, it is important to uniformly disperse the solder particles 11. The stage 21 is a member for uniformly spreading solder coated on the semiconductor wafer i or the wafer 3 122280.doc -19-200822252. The solder particles u may be dispersed on the stage 2i. Next, 'the bump 2 which is formed on the semiconductor wafer 1 is pressed onto the stage 2 of the solder paste ^ as in the case of B 1 (b), and the bump 5 is crushed by the bump 5: the particle η is pressed and pressed Block 5 (Fig. 1(c)). Further, even if the tin particles 11 are inserted between the bumps 5 in this step, the uncompressed solder particles 11 are washed in the step of FIG. 1(b) to remove the contamination bumps which are not caused by the solder particles u. Between 5. At present, a lead-free solder paste mainly used in the mounting of a semiconductor device contains solder particles having a particle diameter of about 10 μm. The solder particles are soft and can be easily crushed. When the crushed solder particles are crushed, the metal particles can be continuously and continuously pressed, but it depends on the force of the pressure. That is, as described above, when the bumps 5 are pressed against the bumps 5 by the bumps 5, the solder particles 11 can be attached to the portions to be bonded. In this way, solder can be taken in a small area without using a solder resist. Then, as shown in Fig. 1 (4), the semiconductor wafer i is moved to a position on the circuit board 4 where the semiconductor wafer is mounted, and the semiconductor wafer 1 is placed at a specific position of the circuit board 4 (Fig. Ue). The mounting method of the semiconductor wafer 1 is not particularly specified, but is performed by heating the solder particles n pressed against the semiconductor wafer 1 to melt the solder. Further, as described above, when the semiconductor wafer i of the solder-bonded solder particles is moved, the solder particles u may be caused by the impact or the like from the semiconductor wafer m 122280.doc -20- 200822252, at this time, the solder particles n may be crimped. After the semiconductor wafer 1, the rod tin particles 11 are heated to melt the solder and fixed to the semiconductor wafer i. In addition, the above steps disclose the step of mounting the semiconductor wafer 1 on the circuit substrate 4, but the semiconductor wafer 丨 can be even other wafer-shaped electronic components 2, such as wafer-shaped electronic components such as wafer capacitors or chip resistors. It is similarly mounted on the circuit board 4. Further, if the solder particles u dispersed on the stage 21 are not uniformly dispersed, and the bumps 5 are pressed from above, the amount of solder particles 压 which are pressed against the bumps 5 may depend on the bumps 5 The area is not uniform. Further, even in each of the bumps 5, the amount of the solder particles 11 to be crimped differs depending on the portion in the bump 5, and the number of layers of the solder particles 11 to be crimped may be uneven. In this case, when the semiconductor wafer 1 is mounted, since the amount of solder is changed when the solder particles are melted, it is impossible to mount it in a small amount. Therefore, the amount of the solder particles 11 to be crimped needs to be kept uniform. As a method of uniformly measuring the solder on the stage 21, there is a method of measuring by uniformly applying the liquid to the stage 21. As shown in Fig. 2(a), the liquid 12 is applied onto the stage 21, as shown in Fig. 2(b), and the liquid 12 is uniformly diffused by tumbling coating (not shown), further as shown in Fig. 2(b). As shown in 2(c), a large amount of solder particles u are sprinkled on the liquid 12. The solder particles 11 in contact with the liquid 12 can be attached to σ 21 by the adsorption effect of the liquid 12. In addition, since the solder particles ii which are not in contact with the liquid crucible 2 are not attached to the stage 21, the stage 21 can be tilted or can be easily removed from the stage 21 by air blowing (Fig. 2(d)). . 122280.doc -21 - 200822252 Thus, by applying solder to the stage 21, solder particles 丨丨 can be uniformly applied to the stage 21. Further, the above method does not disclose the amount of the liquid 12 applied by spin coating, but by adjusting the amount of the liquid 12, the amount of the solder particles U crimped to the semiconductor wafer 1 can be more uniformly adjusted. . As shown in FIG. 3(a), the liquid 12 is thinly applied by spin coating. The thickness of the coated liquid 12 is thinly spread by forming a thickness equal to or less than the diameter of the solder particles ,, and a large number of solder particles n are sufficiently sprinkled thereon (Fig. 3(b)). Thereafter, the stage 21 is tilted, or the solder particles 11 which are incapable of contacting the liquid 12 can be easily removed from the stage 21 by blowing air (Fig. 3(c)). In this way, uniform coating of one layer of solder particles 11 can be performed. After preparing a layer of solder particles U on the stage 21, the solder particles 丨i can be uniformly pressed against the bumps 5 having a slightly wider particle diameter of the solder particles. When a layer of solder particles having a diameter of 20 μm is uniformly applied, the thickness of the liquid 12 coated by spin coating is 5 μm. And sprinkle a lot of solder particles 丨i with a diameter of 20 μηι from it. The solder particles 11 that are in contact with the spin-coated liquid 12 adhere to the liquid crucible 2, but the solder particles 11 mounted on the solder particles 11 adhered to the stage 21 by the liquid 12 are not in contact with the liquid 12. That is, since the adhesion of the liquid 12 to the stage 21 does not occur, it does not adhere to the stage 21. In this state, when the tilting table 21 is used, the solder particles 11 adhering to the liquid 12 remain on the stage 21, but the solder particles 11' which are not in contact with the liquid 12 are sucked by gravity and dropped. Thus, only one layer of solder particles 1 122280.doc 22-200822252 may be retained. Further, the liquid 12 described above may also be the flux 13. When the solder particles 11 are heated and then soldered to the circuit board and mounted, the step of applying the flux 13 can be omitted. Further, it is also apparent that the k-weld is mixed with the solder particles u in the flux 13, and the solvent 13 is suitable for holding the solder particles 11. Further, as described above, the method of measuring the solder particles can be used for measuring the solder of various solder joint portions such as the semiconductor wafer 1, the wafer-shaped electronic component 2, the Japanese yen 3, and the circuit board 4. At this time, in the semiconductor wafer tool and the wafer-shaped electronic device 2 and the like mounted on the circuit board 4, there are various sizes of components. The mounting step of the above-mentioned parts to the circuit board 4 needs to be installed as a vertical coffee bean of just 5, 4 pieces of the horizontal 〇 5 _, or a further miniaturization of the above 1 〇 05, u6〇3, u % ^曰曰 “4 or wafer resistors and other different sizes of wafer-like electronic components 2. For example, wafer-like electronic components 2', as described above, because of the various sizes of electrons; the amount of solder required for the women’s clothing, depending on the part The amount of solder used is required to use the amount of wafer-shaped electronic parts suitable for mounting. In addition, the strength of the solder is increased by the electronic component 2 in the form of a wafer. In this case, the solder for bonding is added. Quantity, in order to increase the strength of the welding. However, only increase the amount of solder particles, may lose the joint sentence, and then use more than the required amount of solder to install the wafer-like electronic parts 2 'may spread the solder to The remaining portion causes a jumper. That is, it is necessary to supply the wafer-shaped electronic component 2 with a solder amount of 122280.doc -23- 200822252 wafer-shaped electronic component 2 suitable for mounting. The amount of solder for mounting the wafer-shaped electronic component can be adjusted by the particle size ' of the solder particles 11 uniformly dispersed in the stage 21. As disclosed, the solder particles are disposed on the electrode 6 having a width of 100 μm and a length of 1 μm. In the case of the case where the particle diameter of the solder particles is 5 ', the solder particles 11 are attached to the electrode 6. When the particle size of the solder particles 11 is 20 μm, the solder particles u are 25 electrodes are attached to the electrode 6. At this time, when the total volume of the solder particles 附着 adhered to the electrode 6 is V (20 μm) and V (50 μηι), the volume ratio is: V (20 μηι) /ν(50 μηι) = ((20/2)Λ3χ25)/((5〇/2)Α3χ25)==2/5. That is, by adjusting the diameter of the solder particles used, it is possible to adjust the adhesion to The volume of the solder of the electrode 6. In addition, the bump 5 is not particularly limited in material, but it is preferably a metal, such as a gold bump formed by gold, etc. In addition, the height of the bump 5 must be one, convex. The shape of the block 5 can also be enlarged to form the bottom surface, and the number of solder particles in contact with the above step is increased. 'But the top end of the bump 5 can be flattened to prevent the rod tin 11 from moving outside the bump 5. In addition, the shape of the bump 5 can also be used to roughen the bottom surface of the bump 5 to prevent it. The mashed solder particles n are diffused in the lateral direction, and the other solder particles 11 are extruded by the broken solder particles n, @ detached from the bumps 5, and the contact area with the solder particles η is added, which can be easily embedded by the bumps At this time, the 'method of forming irregularities on the bumps 5' may be formed by the chemical treatment 122280.doc -24-200822252, or may be formed by pressing another uneven shape. The convex portion of the bump 5 is as sharp as possible at the tip end. As described above, the method of forming the bumps 5 can be performed on a board which is macroscopically flat, but which is observed as a concave-convex shape within a range limited to the extent of the bumps 5, by pressing the semiconductor wafer with the bumps 5 or Wafer 3 is formed. Γ:

藉由上述步驟，可使凸塊5之高度一致，且擴大形成凸 塊5之底面，及形成上述凸塊5之頂端的形狀。在整平 (Leveiing)用之板上形成凹凸之方法，只需以藥品處理板 之表面，或是形成細微損傷即可。 [第二種實施形態] 依據圖4〜6說明本發明一種實施形態如下。 本實施形態係揭示僅使晶片狀之電子零件2的電極6部分 附者焊錫粒子1 1之方法。 另外，本實施形態中說明者以外的結構與上述第一種實 施形態相同。此外’為了方便說明，就具有與顯示於上述 第-種實施形態之圖式的構件相同功能之構件，註記相同 符號，並省略其說明。 圖4係揭不僅使晶片狀之電子变杜 电于苓件2的電極ό附著焊錫粒 子11之方法圖’且係自晶片狀之電子零件2的側面方向觀 察之圖。揭示於圖4之結構’其電極6與晶片狀之電子零件 2的密封部7的高度不同，且電極6比密封部7突出。此種晶 片狀之電子零件2的情況下，可利用 』扪用兩者之階差，僅電極6 壓接焊錫粒子11。此種電極6盥密扭邱7 士 〃在封部7有階差之形狀的晶 片狀電子零件2，主要如為晶片電阻。 122280.doc -25- 200822252 如電極6與晶片狀電子零件2之密封部7的高度階差有20 μΠ1 %，使與上述階差相同程度粒徑之焊錫粒子11(粒徑 〜20 μπι)，如第一種實施形態所述地分散於台21，使上 述曰曰片狀之電子零件2與分散於台2丨上之焊錫粒子丨丨相對 (圖4(a)) ’並如圖4(b)所示，進行壓接至該焊錫粒子丨丨之粒 徑的一半程度（5〜10 μηι)。 此日守，晶片狀之電子零件2的密封部7雖藉由壓接操作，By the above steps, the heights of the bumps 5 can be made uniform, and the bottom surface of the bumps 5 can be enlarged and the shape of the top end of the bumps 5 can be formed. The method of forming the unevenness on the plate for the flattening (Leveiing) requires only treating the surface of the plate with a medicine or forming a fine damage. [Second Embodiment] An embodiment of the present invention will be described below with reference to Figs. This embodiment discloses a method of attaching only the electrode particles 6 of the wafer-shaped electronic component 2 to the solder particles 11. Further, the configuration other than those described in the present embodiment is the same as that of the first embodiment described above. In the following description, members having the same functions as those of the members of the above-described first embodiment are denoted by the same reference numerals, and their description will be omitted. Fig. 4 is a view showing a method of attaching not only the wafer-shaped electrons to the electrodes ό to the solder particles 11 of the cymbal 2 but also from the side direction of the wafer-shaped electronic component 2. The structure disclosed in Fig. 4 has an electrode 6 which is different in height from the sealing portion 7 of the wafer-shaped electronic component 2, and the electrode 6 protrudes from the sealing portion 7. In the case of such a crystalline electronic component 2, the electrode particles 11 can be pressure-bonded only by the electrode 6 by using the step difference between the two. The electrode 6 is twisted and twisted. The wafer-shaped electronic component 2 having a stepped shape in the sealing portion 7 is mainly a chip resistor. 122280.doc -25- 200822252 If the height difference between the electrode 6 and the sealing portion 7 of the wafer-shaped electronic component 2 is 20 μΠ1%, the solder particles 11 having the same size as the above-mentioned step are formed (particle diameter ~ 20 μπι), Dispersing on the stage 21 as described in the first embodiment, the above-mentioned electronic component 2 in the form of a sheet is opposed to the solder particles 分散 dispersed on the stage 2 (Fig. 4(a))' and is as shown in Fig. 4 As shown in b), the pressure is applied to half the particle size of the solder particles (5 to 10 μηι). This day, the sealing portion 7 of the wafer-shaped electronic component 2 is operated by crimping.

而接近上述粒徑20 μηι之焊錫粒子u的附近，不過，由於 焊錫粒子11與密封部7相離5 μηι，因此焊錫粒子11不致壓 接於密封部。如此，可防止焊錫粒子u壓接於晶片狀電子 零件2之本體。 此外，即使焊錫粒子11接觸於密封部7時，藉由電極6與 密封部7之南度差異，密封部7壓碎焊錫粒子丨丨之強度比電 極6弱。 再者，晶片狀之電子零件2,由於電極6表面之形狀比密 封部7粗糙，因此，於壓碎焊錫粒子u時容易嵌入。 2而，密封部7之壓接強度比電極6之壓接強度弱，壓接 於飨封部7之焊錫粒子11比壓接於電極6之焊錫粒子η容 除去。 其次，使用圖5及圖6,揭示在電極6與密封部7之高度上 並無差異之半導體晶片！及晶片狀之電子零件2上壓接焊錫 粒子11的方法。 此種電極6與密封部7之階差小之形狀的晶片狀電子零件 2’主要如晶片電容器。 文 122280.doc 26- 200822252 第一種方法如圖5(a)所示，係將電極6與密封部7之高度 並無差異之晶片狀電子零件2壓住均勻地分散於台21的焊 錫粒子11(圖5(b))，而使焊錫粒子n假壓接（圖5(c))。 晶片狀之電子零件2，於電極6之表面比密封部7粗糙， 而壓碎焊錫粒子11時，容易嵌入晶片狀之電子零件2。 再者，亦可將假壓接之焊錫粒子u，如圖5(d)所示地， 壓在晶片狀之電子零件2的電極附近凸起，而密封部凹下On the other hand, in the vicinity of the solder particles u having a particle diameter of 20 μm, the solder particles 11 are not pressed against the sealing portion because the solder particles 11 are separated from the sealing portion 7 by 5 μm. Thus, the solder particles u can be prevented from being pressed against the body of the wafer-shaped electronic component 2. Further, even when the solder particles 11 are in contact with the sealing portion 7, the sealing portion 7 crushes the solder particles 丨丨 to be weaker than the electrode 6 by the difference in the southness of the electrode 6 and the sealing portion 7. Further, in the wafer-shaped electronic component 2, since the shape of the surface of the electrode 6 is rougher than that of the sealing portion 7, it is easy to be embedded when the solder particles u are crushed. 2, the pressure-bonding strength of the sealing portion 7 is weaker than the pressure-bonding strength of the electrode 6, and the solder particles 11 which are pressed against the sealing portion 7 are removed by the solder particles n which are pressed against the electrode 6. Next, using Figs. 5 and 6, a semiconductor wafer having no difference in height between the electrode 6 and the sealing portion 7 is disclosed! And a method of crimping the solder particles 11 on the wafer-shaped electronic component 2. The wafer-shaped electronic component 2' having such a small difference between the electrode 6 and the sealing portion 7 is mainly a wafer capacitor. The first method is as shown in Fig. 5 (a), in which the wafer-shaped electronic component 2 having no difference in height between the electrode 6 and the sealing portion 7 is pressed against the solder particles uniformly dispersed in the stage 21. 11 (Fig. 5(b)), and the solder particles n are pseudo-crimped (Fig. 5(c)). The wafer-shaped electronic component 2 is rougher than the sealing portion 7 on the surface of the electrode 6, and when the solder particles 11 are crushed, the wafer-shaped electronic component 2 is easily embedded. Further, as shown in FIG. 5(d), the pseudo-crimped solder particles u may be pressed against the electrodes of the wafer-shaped electronic component 2, and the sealing portion may be recessed.

C L) 形狀的壓板31上，而僅進一步壓接假壓接之焊錫粒子u中 在電極附近之焊錫粒子u(圖5(e))。 如此，可進-步擴大晶片狀電子零件2之電極㈣焊錫粒 子11與密封部7之焊錫粒子丨i的壓接量差。將該狀態 真壓接。 〜 … 在假壓接或真壓接完成之狀態下，如圖5(f)所示，僅除 去密封部7之焊錫粒子丨i。 其機構亦可以超音波洗淨，亦可接觸於具有黏合力之片 而轉印，亦可使用細針或薄板刮除。 進行及除去步驟，係為了防止其後加熱而溶化焊錫粒子 11時’電極6之間連接而形成短路。目而，亦可不除去穷 封部分之全部焊錫粒子。 、山 之後，亦可將電極6之焊錫/粒子11加熱，熔化焊錫，而 固定於半導體晶片1(圖5(g))。 藉由如此構成，可在半導體晶片1及晶片狀之電子变. 的電極6部分固定適切量之焊錫。 子零件2On the pressure plate 31 of the shape of C L), only the solder particles u in the vicinity of the electrodes in the dummy-bonded solder particles u are further pressed (Fig. 5(e)). In this way, the electrode (four) of the wafer-shaped electronic component 2 can be further enlarged in the amount of pressure contact between the solder particles 11 and the solder particles 丨i of the sealing portion 7. This state is really crimped. ~ ... In the state where the dummy crimping or the true crimping is completed, as shown in Fig. 5 (f), only the solder particles 丨i of the sealing portion 7 are removed. The mechanism can also be ultrasonically cleaned, transferred to a sheet with adhesive force, or scraped with a fine needle or a thin plate. The carrying out and removing steps are such that the electrodes 6 are connected to each other to form a short circuit in order to prevent the solder particles 11 from being melted after the heating. It is also possible not to remove all of the solder particles of the poor portion. After the mountain, the solder/particles 11 of the electrode 6 may be heated to melt the solder and fixed to the semiconductor wafer 1 (Fig. 5(g)). According to this configuration, it is possible to fix a suitable amount of solder to the semiconductor wafer 1 and the electrode 6 of the wafer-like electron. Subpart 2

第一種方法，如圖6(a)所示，亦可使焊錫粒子U 122280.doc -27- 200822252 均勻地分散於台21，將電極6與密封部7之高度上並無差異 之晶片狀的電子零件2 ’壓住均勻地分散於台叫焊錫粒 子11(圖6(b))，使焊錫粒子"假壓接後（圖6(c))，如圖 所示地，藉由使壓接焊錫粒子U之晶片狀的電子零件2之 中心部接觸加熱之加熱工具32,而除去密封部7之焊錫粒 子11 〇In the first method, as shown in FIG. 6(a), the solder particles U 122280.doc -27- 200822252 may be uniformly dispersed on the stage 21, and the electrode 6 and the sealing portion 7 have no difference in height. The electronic part 2' is pressed and evenly dispersed in the table called solder particles 11 (Fig. 6(b)), so that the solder particles "falsely crimped (Fig. 6(c)), as shown, by The center portion of the wafer-shaped electronic component 2 of the pressure-bonded solder particles U contacts the heated heating tool 32, and the solder particles 11 of the sealing portion 7 are removed.

藉由使晶片狀之電子零件2的中心部接觸加熱工具32， 如圖6(e)所示，焊錫粒子u熔化並向兩側之電極6擴張。焊 錫熔化而移至兩側之電極6後，只須自晶片狀之電子零件2 取出加熱工具32即可（圖6(f))。 該加熱工具32之剖面亦可為圓形或橢圓之形狀，亦可如 楔子而中心尖銳之形狀，亦可為中心部平坦之梯形狀。 擴大之焊錫雖擴大於電極6上，不過，因為塗佈之總量 少，所以焊錫最初不易擴大至不壓接於電極6之侧的面。 另外，吸附上述之加熱工具32及晶片狀之電子零件2的 噴嘴之原料專’須以铭等不致以將焊錫加熱而溶化之步 驟’而與焊錫形成合金層的材質製成。 藉由如此構成，由於熔化之焊錫不致殘留於加熱工具32 及喷嘴，因此穩定而可重複上述步驟。 藉由如此構成，可在半導體晶片i及晶片狀之電子零件2 的電極6之部分固定適切量之焊錫。 知錫粒子1 1亦可在不希望提供熱過程之情況下，不溶敷 於凸塊5及晶片狀的電子零件2上。此外，搬運時之振動 大’焊錫粒子11有可能自凸塊5及晶片狀之電子零件2脫離 122280.doc -28 - 200822252 情況下，以及在設於晶圓之凸塊5上壓接焊錫粒子丨丨後， 進行切割等步驟之情況下，可使焊錫粒子11暫時加孰而溶 敷。 ’ 此外，使用熔敷此種焊錫粒子U之晶片狀的電子零件2 時，不需要對安裝晶片狀之電子零件2用的電路基板4預塗 佈特殊之焊錫。因而，只需對安裝不比其小之電子零件用 的電路基板4之電極6，另行藉由一般遮罩印刷等之方法配 置焊膏即可。 [第三種實施形態] 依據圖7〜圖8說明本發明一種實施形態如下。 本實施形態係揭示在設於半導體晶片丨、晶圓3及電路基 板4之凸塊5、電極6上塗佈焊錫之方法。 另外，本實施形態中說明者以外的結構與上述第一種實 施形態等相同。此外，為了方便說明，就具有與顯示於上 述第一種實施形態等之圖式的構件相同功能之構件，註記 相同符號，並省略其說明。 此外，本實施形態中係揭示在設於半導體晶片1之凸塊5 上塗佈焊錫之方法，不過，並不限定於此，如上述半導體 晶片1亦可為晶片狀之電子零件2、晶圓3或電路基板4，上 述凸塊5亦可作為電極6。 圖7係揭示不直接將凸塊5壓接於焊錫粒子丨丨，而藉由壓 接板41壓接’量取焊錫粒子π，來塗佈於凸塊5之方法。 首先，如圖7(a)所示，將壓接板41壓住均勻地分散於台 2 1的焊錫粒子11 (圖7(b))，而使焊錫粒子11假壓接（圖 122280.doc -29- 200822252 7(c))。壓接板41之與半導體晶片1等的凸塊5相同之位置凸 出。 其次，在凸部對準壓接焊錫粒子11之壓接板4丨與包含凸 塊5之半導體晶片1或晶圓3之位置，使其相對（圖7(d))而接 觸（圖 7(e))。 其次’如圖7(f)所示，使壓接之焊錫粒子11加熱並溶 化，而塗佈於凸塊5(圖7(g))。 ^ 该步驟亦可使半導體晶片1之凸塊5與焊錫粒子1 1接觸 後’溶化焊錫粒子1 1，亦可以使凸塊5與焊錫粒子1 1接觸 之前，預先將凸塊5加熱，藉由接觸而熔化焊錫粒子丨丨之 方式構成。此外，亦可預先熔化焊錫粒子丨丨，而使加熱之 凸塊5接觸。 無論如何，宜藉由使壓接烊錫粒子1]L之壓接板41在上， 附凸塊5之半導體晶片丨或晶圓3在下而接觸，此因，熔化 之焊錫被重力吸引而容易移至凸塊5側。 C； 再者，本實施形態之方法，係有凸部之壓接板41在壓接 步驟將凸部朝下，半導體晶片1之凸塊5朝上。因而，無需 為了進行熔化焊錫粒子丨丨而移至凸塊5側之步驟，而將壓 接板41翻倒，製造上之效率佳。 該方法在可能因壓接而造成半導體晶片丨或晶圓3損傷之 &況下有效，特別是使用Low-k膜（低介電常數層間絕緣 膜）之半導體晶片1時，亦可在凸塊5上定量塗佈焊錫。 另外上述壓接板41之凸部宜具有與對應之半導體晶片 1的凸塊5相同程度之表面積。 122280.doc -30- 200822252 同樣地，電路基板4或晶片狀之電子零件2的電極6上亦 可塗佈焊錫。 另外，如上述，在具有數個凸圖案之壓接板41製作不容 易之情況，及構成上述壓接板41之構件昂貴情況下，亦可 形成頂端為半導體晶片1之凸塊5程度的大小，且平坦之針 狀的壓接棒4 2。 該壓接棒42如亦可為使用於連線接合之毛細管者，頂端 Γ 為與半導體晶片1之凸塊5相同形狀，且未開設金線通過之 孔者即使使用上述之壓接棒42時，仍可與壓接板4〗同樣 地進行作業。 亦即，如圖8(a)所示，將壓接棒42壓住均勻地分散於台 21的焊錫粒子11(圖8〇3))，而使焊錫粒子11假壓接 8(c)) 〇 〇 其-人，使壓接焊錫粒子11之壓接棒42與包含凸塊5之半 導體晶片1的位置對準而相對（圖8(d))，來接觸（圖8(e))。 Ο 其次，如圖8(f)所示，使加熱至焊錫熔點之凸塊5接觸壓 接之焊锡粒子11使其炫化。 壓接於針之頂端的焊錫粒子11在凸塊5上溶化，而在其 表面擴散（圖8(g))。如此，由於可塗佈遠比以針轉印焊膏 時少的焊錫，因此，即使半導體晶片1上之凸塊5微細時， 仍可避免與鄰接之凸塊5跨接，來塗佈或追加焊錫。 另外’使用壓接棒42時，壓接於壓接棒42之焊錫粒子 Π ’如上述，宜在接觸於半導體晶片丨上之凸塊5後熔化。 由於壓接棒42係半導體晶片1上之凸塊5數量程度重複壓 122280.doc -31 - 200822252 接與轉印焊錫粒子11，因此，係為了防止壓接焊錫粒子11 時，於壓接棒42之溫度高時，焊錫粒子11熔化，過多之焊 錫粒子11熔敷於壓接棒42。 當然，管理上述壓接棒42之溫度時，亦可與使用壓接板 41時同樣地，使半導體晶片1之凸塊5與焊錫粒子丨丨接觸 後，熔化焊錫粒子11，亦可預先熔化焊錫粒子11，而接觸 於加熱之凸塊5。 另外，上述之壓接板41或壓接棒42須以不致以將焊錫加 熱而熔化之步驟，而與焊錫形成合金層的材質製成。 如此構成時，在上述壓接板41或壓接棒42之頂端部壓接 焊錫粒子11後，在半導體晶片1上熔化之焊錫粒子丨丨不致 保留於上述壓接板41或壓接棒42之頂端部，而全部移至凸 塊5 〇 藉此，重複焊錫粒子11之壓接、熔化作業時，無需淨化 上述壓接板41或壓接棒42之頂端，作業效率提高。 此外’上述之壓接板41或壓接棒42，為了容易壓接焊錫 粒子11，亦可將上述之壓接板41或壓接棒42的頂端部分形 成粗鏠形狀，如亦可附凹凸。 藉由如此構成，可防止因壓碎焊錫粒子丨丨擴散於橫方 向，擠出其他焊錫粒子1 1，而自上述之壓接板4丨或壓接棒 42的頂端脫離’並增加與焊錫粒子i i之接觸面積，藉由嵌 入凹凸而容易壓接。此時，在頂端附加凹凸之方法，亦可 藉由藥品處理來進行，亦可壓在另外之凹凸形狀上來進 行0 122280.doc -32- 200822252 [第四種實施形態] 依據圖9〜圖12說明本發明一種實施形態如下。 本實施形態係揭示在設於晶圓3及電路基板4之電極6上 塗佈焊錫之另外方法。 另外，本實施形態中說明者以外的結構與上述第一種實 施形態等相同。此外，為了方便說明，就具有與顯示於上By bringing the center portion of the wafer-shaped electronic component 2 into contact with the heating tool 32, as shown in Fig. 6(e), the solder particles u are melted and expanded toward the electrodes 6 on both sides. After the solder is melted and moved to the electrodes 6 on both sides, it is only necessary to take out the heating tool 32 from the wafer-shaped electronic component 2 (Fig. 6(f)). The cross section of the heating tool 32 may also be a circular or elliptical shape, or may have a sharp center shape like a wedge, or may be a flat trapezoidal shape at the center. Although the enlarged solder is enlarged on the electrode 6, the total amount of the coating is small, so that the solder is not easily expanded to the surface which is not pressed against the side of the electrode 6. Further, the raw material of the nozzle for adsorbing the heating tool 32 and the wafer-shaped electronic component 2 described above must be made of a material which forms an alloy layer with the solder by a step of melting the solder without heating. According to this configuration, since the molten solder does not remain in the heating tool 32 and the nozzle, the above steps can be repeated with stability. According to this configuration, it is possible to fix a suitable amount of solder to the semiconductor wafer i and the electrode 6 of the wafer-shaped electronic component 2. The known tin particles 1 1 may not be applied to the bumps 5 and the wafer-shaped electronic component 2 without providing a heat process. In addition, the vibration during transportation is large, and the solder particles 11 may be detached from the bump 5 and the wafer-shaped electronic component 2 in the case of 122280.doc -28 - 200822252, and the solder particles are crimped on the bump 5 provided on the wafer. After the step of cutting or the like, the solder particles 11 may be temporarily kneaded and dissolved. Further, when the wafer-shaped electronic component 2 in which the solder particles U are welded is used, it is not necessary to pre-coat a special solder on the circuit board 4 for mounting the wafer-shaped electronic component 2. Therefore, it is only necessary to arrange the solder paste by the method of general mask printing or the like for the electrode 6 of the circuit board 4 for mounting electronic components which are not smaller than the other. [Third Embodiment] An embodiment of the present invention will be described below with reference to Figs. 7 to 8 . This embodiment discloses a method of applying solder to the bumps 5 and electrodes 6 provided on the semiconductor wafer cassette, the wafer 3, and the circuit board 4. Further, the configuration other than the one described in the present embodiment is the same as that of the first embodiment described above. In the following description, members having the same functions as those of the members of the above-described first embodiment and the like are denoted by the same reference numerals, and their description will be omitted. Further, in the present embodiment, a method of applying solder to the bumps 5 provided on the semiconductor wafer 1 is disclosed. However, the semiconductor wafer 1 may be a wafer-shaped electronic component 2 or a wafer. 3 or the circuit board 4, the bump 5 may also serve as the electrode 6. Fig. 7 shows a method of applying the bump 5 to the bump 5 without directly pressing the bump 5 against the solder particles 丨丨 and pressing the solder particles π by the crimping plate 41. First, as shown in Fig. 7(a), the crimping plate 41 is pressed against the solder particles 11 uniformly dispersed in the stage 21 (Fig. 7(b)), and the solder particles 11 are pseudo-crimped (Fig. 122280.doc) -29- 200822252 7(c)). The crimping plate 41 is projected at the same position as the bump 5 of the semiconductor wafer 1 or the like. Next, the convex portion is aligned with the crimping plate 4 of the crimped solder particles 11 and the semiconductor wafer 1 or the wafer 3 including the bump 5 so as to be in contact with each other (Fig. 7(d)) (Fig. 7 e)). Next, as shown in Fig. 7 (f), the pressure-bonded solder particles 11 are heated and melted, and applied to the bumps 5 (Fig. 7 (g)). ^ This step can also cause the bumps 5 of the semiconductor wafer 1 to contact the solder particles 11 to 'melt the solder particles 1 1 and also heat the bumps 5 before the bumps 5 are in contact with the solder particles 11. It is formed by contacting and melting the solder particles. Further, the solder particles 丨丨 may be melted in advance to bring the heated bumps 5 into contact. In any case, it is preferable to make the semiconductor wafer or the wafer 3 with the bumps 5 contacted by pressing the crimping plate 41 of the crimped tin particles 1]L, because the molten solder is attracted by gravity. Move to the side of the bump 5. Further, in the method of the present embodiment, the crimping plate 41 having the convex portion has the convex portion facing downward in the pressure bonding step, and the bump 5 of the semiconductor wafer 1 faces upward. Therefore, it is not necessary to step on the side of the bump 5 in order to melt the solder particles, and the crimping plate 41 is turned over, which is excellent in manufacturing efficiency. This method is effective in the case of damage of the semiconductor wafer or the wafer 3 due to crimping, in particular, when the semiconductor wafer 1 using a Low-k film (low dielectric constant interlayer insulating film) is used, it may also be convex. The solder is dosed on block 5. Further, the convex portion of the above-mentioned crimping plate 41 preferably has the same surface area as that of the bump 5 of the corresponding semiconductor wafer 1. 122280.doc -30- 200822252 Similarly, solder may be applied to the electrode 6 of the circuit board 4 or the wafer-shaped electronic component 2. Further, as described above, in the case where the crimping plate 41 having a plurality of convex patterns is not easy to manufacture, and the member constituting the crimping plate 41 is expensive, the size of the bump 5 of the semiconductor wafer 1 can be formed. And a flat needle-shaped crimping rod 42. The crimping bar 42 may be a capillary used for wire bonding, and the top end 相同 is the same shape as the bump 5 of the semiconductor wafer 1, and the hole through which the gold wire is not opened is used even when the crimping bar 42 described above is used. Still, the work can be performed in the same manner as the pressure plate 4 described. That is, as shown in Fig. 8(a), the crimping rod 42 is pressed against the solder particles 11 (Fig. 8A) which are uniformly dispersed in the stage 21, and the solder particles 11 are pseudo-crimped 8(c)) In other words, the crimping bar 42 of the crimped solder particles 11 is brought into contact with the semiconductor wafer 1 including the bumps 5 (Fig. 8(d)), and is contacted (Fig. 8(e)). Next, as shown in Fig. 8 (f), the bumps 5 heated to the melting point of the solder are brought into contact with the solder particles 11 which are pressed to smash. The solder particles 11 crimped to the tip end of the needle are melted on the bump 5 and spread on the surface thereof (Fig. 8(g)). In this way, since the solder can be coated much less than when the solder paste is transferred by the needle, even if the bumps 5 on the semiconductor wafer 1 are fine, the bumps 5 can be prevented from being bridged to the adjacent bumps 5 to be coated or added. Solder. Further, when the crimping rod 42 is used, the solder particles Π as pressed against the crimping bar 42 are preferably melted after being in contact with the bumps 5 on the semiconductor wafer cassette as described above. Since the crimping bar 42 is a plurality of bumps 5 on the semiconductor wafer 1 and the transfer pressure of the solder particles 11 is repeated, the solder paste particles 11 are removed. Therefore, in order to prevent the solder particles 11 from being crimped, the crimping bar 42 is used. When the temperature is high, the solder particles 11 are melted, and the excessive solder particles 11 are welded to the crimping bar 42. Needless to say, when the temperature of the pressure-bonding rod 42 is managed, the bumps 5 of the semiconductor wafer 1 may be brought into contact with the solder particles 同样 in the same manner as when the pressure-bonding plate 41 is used, and the solder particles 11 may be melted or the solder may be melted in advance. The particles 11 are in contact with the heated bumps 5. Further, the above-mentioned crimping plate 41 or crimping bar 42 must be made of a material which forms an alloy layer with solder without a step of melting the solder by heating. According to this configuration, after the solder particles 11 are pressure-bonded to the distal end portions of the pressure-bonding plate 41 or the pressure-bonding bar 42, the solder particles fused on the semiconductor wafer 1 are not retained by the pressure-bonding plate 41 or the crimping bar 42. When the tip portion is moved to the bump 5, the pressure bonding and the melting operation of the solder particles 11 are repeated, and it is not necessary to purify the tip end of the pressure-bonding plate 41 or the pressure-bonding bar 42, and work efficiency is improved. Further, in order to facilitate the pressure-bonding of the solder particles 11, the above-mentioned crimping plate 41 or crimping bar 42 may have a rough end shape of the above-mentioned crimping plate 41 or the crimping rod 42, and may be attached with irregularities. According to this configuration, it is possible to prevent the solder particles from being scattered in the lateral direction, and to extrude the other solder particles 1 1 and to be separated from the tip end of the crimping plate 4 or the crimping bar 42 and to increase the solder particles. The contact area of ii is easily crimped by embedding the unevenness. In this case, the method of attaching the unevenness to the tip may be performed by a drug treatment or may be pressed against another uneven shape to perform 0 122 280.doc -32 - 200822252 [Fourth embodiment] According to FIG. 9 to FIG. 12 An embodiment of the present invention is described below. This embodiment discloses another method of applying solder to the electrodes 6 provided on the wafer 3 and the circuit board 4. Further, the configuration other than the one described in the present embodiment is the same as that of the first embodiment described above. In addition, for convenience of explanation, it has and is displayed on

G 述第一種實施形態等之圖式的構件相同功能之構件，註記 相同符號，並省略其說明。 此外，本實施形態中係揭示在設於電路基板4之電極6上 如上述電路基板 〇 塗佈焊錫之方法，不過，並不限定於此， 4亦可為晶圓3，上述電極6亦可作為凸塊5 圖9係說明將焊錫粒子11均勻地塗佈一層於希望進行焊 接之電路基板4上，而非塗佈於台21之方法。 百先，如圖9(a)所示’將液體12塗佈於電路基板4上，藉 由旋轉塗佈而薄塗佈(圖9(b))。以將塗佈之液體。的厚度 形成焊錫粒子U之直徑以下之厚度的方式薄塗擴散，自其 上充分遽上許多焊錫粒子u(圖9⑷）。其後，將電路基板4 傾斜，藉由送風’可輕易地自電路基板4除去無法㈣於 液體丨2之焊錫粒子11(圖9(d))。 度 電 如此’可進行一層焊錫粒子n之均勻塗佈。準備一層程 之焊錫粒子11後’可對比焊錫粒子"之粒徑稍寬間：的 極6壓接焊錫粒子11。 亦可為熔劑 另外，上述液體12如第一種實施形態所述， 13。 122280.doc 33- 200822252 其次，如圖9(e)所示，將具有與希望塗佈焊錫之電極6的 形狀一致之凸部圖案的壓接板4 1壓住電路基板4。如此， 將焊錫粒子11壓接於電路基板。 其後’自電路基板4取出壓接板41，以洗淨等除去不需 要之焊錫粒子11(圖9(f))。最後，將焊錫粒子^在電路基 板4上加熱、炼化，而將焊錫炼敷於電路基板4(圖9(g))。 藉由如此構成，可在電路基板4之電極6上一起配置烊錫 粒子11。 另外，如上述，具有數個凸圖案之壓接板41的製作不容 易情況下，或構成上述壓接板41之構件昂貴情況下，亦可 藉由壓接棒42逐一壓碎電路基板4上之焊錫粒子丨丨，而壓 接於電路基板4。 亦即，如圖10(a)所示，形成一層均勻塗佈之焊錫粒子 Π。其次，如圖10(b)所示，壓接棒42在電路基板4之電極6 的位置，自上壓住焊錫粒子11，壓碎焊錫粒子丨丨而壓接於 電路基板4。 上述壓接棒42於一處壓接結束後再度上昇，並自電路基 板4離開。而後，上述壓接棒42移動至另外之電極6的位 置，再度自上壓上焊錫粒子U(圖10(c))。 藉由重複δ亥操作，而在電路基板4之必要位置配置焊錫 粒子11。在電路基板4上之必要位置，藉由壓接焊錫粒子 11而配置結束後，藉由洗淨等除去未壓接於電路基板4上 而殘留之焊錫粒子最後，將焊錫粒子η在電 路基板4上加熱、熔化，而將焊錫熔敷於電路基板4(圖 122280.doc -34- 200822252 10(e)) 〇 另外，在電路基板4之電極6上，亦可設置宏觀上係平 旦，不過限定於電極6程度之範圍觀察時為凹凸之構造。 此外’該電極6之凸部儘可能頂端係尖銳形狀。 藉由如此形成’係為了防止焊錫粒子11#由上述壓接板 〇或壓接棒42壓碎時，焊錫粒子u擴散於橫方向，擠出盆 他焊錫粒子"，而自電極6脫離，並增加悍錫粒子"與電 Γ υ 極6之接觸面積’藉由電極6之凹凸篏人焊錫粒子"而 壓接。 /此日寸’纟電極6上附加凹凸之方法，亦可藉由藥品處理 來進行，亦可壓在另外之凹凸形狀上來進行。 匕外上述壓接板41之凸部及壓接棒42之頂端部，須係 比電路基板4之電極6平滑之表面。 上述壓接板41之凸部及壓接棒42之頂端部並非比電路基 板4之電極6平滑的表面時，將焊錫粒子丨丨壓接於電路基板 4時’可此全部焊錫粒子1丨不壓接於電路基板4，焊錫粒子 11附著於上述壓接板41之凸部及壓接棒42之頂端部而殘 留。 所謂焊錫粒子11殘留於上述壓接板41之凸部及壓接棒42 之頂端部’係表示壓接於電路基板4之焊錫粒子n低於規 定量。此外’殘留之焊錫粒子丨丨在其次之壓接步驟壓接 時’其位置之焊錫量過剩。 為了防止此種問題，此等壓接板41之凸部及壓接棒42之 頂端部須預先加工成凹凸比電路基板4之電極6的表面少的 122280.doc -35- 200822252 平滑之表面。 此外，上述亦可取代使用壓接板41，直接壓上附凸塊5 之半導體晶片1而形成焊接。 亦即如圖11 (a)所示，形成一層均勻塗佈之焊錫粒子 π。其次，如圖ii(b)所示，將半導體晶片丨壓住電路基板 4，以電路基板4與半導體晶片丨夾著焊錫粒子丨丨而壓接。 其後，如圖11(c)所示，藉由洗淨等除去未被電路基板4與 凸塊5壓接之不需要的焊錫粒子Π。最後，將焊錫粒子1 i 加熱、熔化，而接合凸塊5與電路基板4(圖丨i(d))。 藉由如此構成，可一起焊接電路基板4之電極6與半導體 晶片1。 此外，除去未壓接之焊錫粒子n，亦可在以圖n(c)之步 驟壓住半導體晶片1與電路基板4的狀態下，自其間隙如壓 入熔劑13而除去。如此，即使在壓接過程熔劑13不足時， 仍可補充熔劑13。此外，即使熔劑13殘留時，仍不致對焊 接造成不良影響。 此外，亦可暫時分離壓住電路基板4之半導體晶片丨與電 路基板4，擴大半導體晶片丨與電路基板4之間隙後，以熔 劑13洗淨。藉由如此構成，於洗淨時熔劑13容易流動，而 可確實除去未壓接之焊錫粒子U。 此外，凸塊5之間隔遠比焊錫粒子丨丨大，即使一些焊錫 粒子11殘留，在形成焊接上仍無問題，底膠即使在焊錫熔 化溫度仍不致造成不良影響情況下，藉由壓入上述之底 膠，可同時進行焊錫粒子^之除去與底膠之配置。任何一 122280.doc -36 - 200822252 種情況均是在除去未壓接之焊錫粒子丨丨後，加熱而熔化焊 錫粒子11，來焊接電路基板4與半導體晶片1。 另外，對電路基板4不希望提供熱過程情況下，焊錫亦 可為未熔敷之狀態，重複搬運時，或振動大，焊錫粒子u 可能脫落情況下，亦可預先將焊錫粒子丨丨加熱而熔化。 本實施形態中之電路基板4，為了安裝微小之晶片狀電 子零件2，而溶敷必要之極微小的焊錫，所以無須對電路 ΓThe components having the same functions as those of the drawings of the first embodiment and the like are denoted by the same reference numerals, and the description thereof will be omitted. Further, in the present embodiment, a method of applying solder to the electrode substrate 6 provided on the circuit board 4 as described above is disclosed. However, the present invention is not limited thereto, and the wafer 3 may be used as the wafer 3, and the electrode 6 may be used. As the bump 5, FIG. 9 illustrates a method in which the solder particles 11 are uniformly coated on the circuit board 4 desired to be soldered, instead of being applied to the stage 21. As shown in Fig. 9(a), the liquid 12 is applied onto the circuit board 4, and is thinly coated by spin coating (Fig. 9(b)). The liquid to be coated. The thickness is thinly spread and spread so as to form a thickness equal to or less than the diameter of the solder particles U, and a large number of solder particles u are sufficiently attached thereto (Fig. 9 (4)). Thereafter, the circuit board 4 is tilted, and the solder particles 11 which cannot be (4) to the liquid crucible 2 can be easily removed from the circuit board 4 by blowing air (Fig. 9(d)). The electric current is so that a uniform coating of a layer of solder particles n can be performed. After the solder particles 11 of one layer are prepared, the solder particles 11 are pressed by the pole 6 of the "preparable solder particles". Alternatively, the liquid 12 may be as described in the first embodiment, 13 . 122280.doc 33-200822252 Next, as shown in Fig. 9(e), the crimping plate 4 1 having the convex portion pattern in conformity with the shape of the electrode 6 to which the solder is desired to be applied is pressed against the circuit board 4. In this manner, the solder particles 11 are pressure-bonded to the circuit board. Thereafter, the pressure-bonding plate 41 is taken out from the circuit board 4, and unnecessary solder particles 11 are removed by washing or the like (Fig. 9(f)). Finally, the solder particles are heated and refining on the circuit board 4, and the solder is deposited on the circuit board 4 (Fig. 9(g)). With such a configuration, the antimony tin particles 11 can be disposed together on the electrode 6 of the circuit board 4. Further, as described above, the production of the crimping plate 41 having a plurality of convex patterns is not easy, or the member constituting the crimping plate 41 is expensive, and the circuit board 4 can be crushed one by one by the crimping bar 42. The solder particles are crucible and are crimped to the circuit board 4. That is, as shown in Fig. 10 (a), a layer of uniformly coated solder particles 形成 is formed. Then, as shown in Fig. 10 (b), the crimping bar 42 presses the solder particles 11 from the top of the electrode 6 of the circuit board 4, crushes the solder particles 丨丨, and presses the wiring to the circuit board 4. The crimping rod 42 is again raised after the crimping at one point and is separated from the circuit board 4. Then, the crimping rod 42 is moved to the position of the other electrode 6, and the solder particles U are again pressed upward (Fig. 10(c)). The solder particles 11 are disposed at necessary positions on the circuit board 4 by repeating the δ-Hing operation. After the arrangement of the solder particles 11 is completed by pressing the solder particles 11 at a necessary position on the circuit board 4, the solder particles remaining after being not pressed against the circuit board 4 are removed by cleaning or the like, and finally the solder particles η are on the circuit board 4. The solder is soldered on the circuit board 4 (Fig. 122280.doc-34-200822252 10(e)). In addition, on the electrode 6 of the circuit board 4, a macroscopic flat can also be provided, but it is limited. It is a structure of unevenness when viewed in the range of the electrode 6 degree. Further, the convex portion of the electrode 6 has a pointed shape as sharp as possible. By forming in this way, in order to prevent the solder particles 11# from being crushed by the pressure-bonding plate 〇 or the pressure-bonding rod 42, the solder particles u are diffused in the lateral direction, and the solder particles are squeezed out, and the electrode 6 is detached. And the contact area of the bismuth tin particles " Γ 极 ' ' ' ' ' ' ' ' 电极 电极 电极 电极 电极 电极 电极 电极 电极 电极 电极 电极 电极 电极 电极 电极 电极 电极 电极 电极The method of adding irregularities to the electrode 6 may be carried out by chemical treatment or by pressing on another uneven shape. The convex portion of the pressure-bonding plate 41 and the distal end portion of the crimping bar 42 are required to be smoother than the electrode 6 of the circuit board 4. When the convex portion of the crimping plate 41 and the distal end portion of the crimping bar 42 are not smoother than the surface of the electrode 6 of the circuit board 4, when the solder particles are pressed against the circuit board 4, all of the solder particles may not be used. The solder particles 11 are adhered to the circuit board 4, and the solder particles 11 are adhered to the convex portion of the pressure contact plate 41 and the distal end portion of the pressure bonding rod 42 to remain. The solder particles 11 remain in the convex portion of the pressure-bonding plate 41 and the distal end portion of the pressure-bonding rod 42, indicating that the solder particles n pressed against the circuit board 4 are lower than a predetermined amount. In addition, the amount of solder remaining in the position of the remaining solder particles 压 in the second crimping step is excessive. In order to prevent such a problem, the convex portions of the crimping plates 41 and the distal end portions of the crimping bars 42 are previously processed to have a smooth surface which is less than the surface of the electrode 6 of the circuit board 4, 122280.doc - 35 - 200822252. Further, instead of using the crimping plate 41, the semiconductor wafer 1 with the bumps 5 may be directly pressed to form a solder. That is, as shown in Fig. 11 (a), a uniformly coated solder particle π is formed. Next, as shown in Fig. ii(b), the semiconductor wafer is pressed against the circuit board 4, and the solder substrate particles are sandwiched between the circuit board 4 and the semiconductor wafer. Thereafter, as shown in Fig. 11 (c), unnecessary solder particles 未被 not pressed by the circuit board 4 and the bumps 5 are removed by washing or the like. Finally, the solder particles 1 i are heated and melted to bond the bumps 5 and the circuit substrate 4 (Fig. i(d)). With such a configuration, the electrode 6 of the circuit board 4 and the semiconductor wafer 1 can be welded together. Further, the solder particles n which are not pressed may be removed, and the semiconductor wafer 1 and the circuit board 4 may be pressed in the step of (c), and the flux 13 may be removed from the gap. Thus, the flux 13 can be replenished even when the flux 13 is insufficient during the crimping process. Further, even if the flux 13 remains, it does not adversely affect the soldering. Further, the semiconductor wafer cassette pressed against the circuit board 4 and the circuit board 4 may be temporarily separated, and the gap between the semiconductor wafer cassette and the circuit board 4 may be enlarged, and then washed with the flux 13. According to this configuration, the flux 13 easily flows during the cleaning, and the uncompressed solder particles U can be surely removed. In addition, the spacing of the bumps 5 is much larger than that of the solder particles, and even if some of the solder particles 11 remain, there is no problem in forming the solder, and the primer is pressed into the above even if the solder melting temperature does not cause adverse effects. The bottom glue can simultaneously remove the solder particles and the bottom glue. In any of the cases, 122588.doc - 36 - 200822252, after the uncompressed solder particles are removed, the solder particles 11 are heated and melted to solder the circuit board 4 and the semiconductor wafer 1. Further, in the case where it is not desired to provide a thermal process to the circuit board 4, the solder may be in an unfused state, and when the transfer is repeated or the vibration is large and the solder particles u may fall off, the solder particles may be heated in advance. melt. In the circuit board 4 of the present embodiment, in order to mount the minute wafer-shaped electronic component 2, it is necessary to apply a very small amount of solder, so that it is not necessary to circuit the circuit.

基板4，為了该微小之晶片狀電子零件2而塗佈焊膏。 因此，只須對不比其小之零件，藉由一般之遮罩印刷來 配置焊膏即可。 如此，熔敷了焊錫之電路基板4具有焊錫熔化，與半導 體晶片1等接合時殘留氣泡少的優點。 氣泡多產生於電路基板4之電極6與焊錫之界面。使用先 前之焊膏，將焊錫塗佈於電極6時，因為焊錫粒子重疊好 幾層’所以有焊錫與電極6之界面產生的氣泡不易到達外 部，而容易殘留於内部之問題。The substrate 4 is coated with solder paste for the minute wafer-shaped electronic component 2. Therefore, it is only necessary to configure the solder paste by a general mask printing for parts that are not smaller than the smaller one. As described above, the soldered circuit board 4 has the advantage of being solder-melted and having few residual bubbles when it is bonded to the semiconductor wafer 1 or the like. Air bubbles are often generated at the interface between the electrode 6 of the circuit board 4 and the solder. When the solder is applied to the electrode 6 by using the solder paste of the prior art, since the solder particles are superposed on several layers, the bubbles generated at the interface between the solder and the electrode 6 are less likely to reach the outside, and are liable to remain inside.

本實施形態之方法，因為、度处^ ^ L 口馬知錫粒子11之層非常薄，所以 溶敷焊锡時，在焊錫愈Φ J.-T y- w 圩场η電極6之界面產生的氣泡可輕易到 達外部。 此外’依接合之凸塊5及蕾q々健上 凡及電路基板4之電極6的尺寸、間 隔等，亦有時無須如上述之古、土时从〜^ k之方法嚴格地控制焊錫粒子丨i之 量 0 此種情況下，如圖12(a)所千，收你、、曲由a、 斤不將低)辰度地混入焊錫粒子 11之熔劑13形成於台21，自μ、+、 目上述熔劑13之上，壓上附凸塊 122280.doc -37- 200822252 之半導體晶片1或晶圓，而使焊錫粒子丨丨壓接於凸塊5(圖 12(b))。其後，自上述熔劑13取出附凸塊之半導體晶片丄或 晶圓（圖12(c))。 此時，混入焊錫粒子之熔劑13的濃度為··壓上凸塊時， 在凸塊下有數個焊錫粒子，且不埋入凸塊間之程度。此 外，焊錫粒子11之濃度至少宜為混入目前倒裝片安裝時使 用之各向異性導電膜中的金屬粒子之濃度以上。 另外，亦可取代台21，而在電路基板4上塗佈上述熔劑 13，並藉由壓接板41壓住，該壓接板41具有與希望自其上 壓接焊錫粒子11之電極6的位置相同之凸部圖案，而使焊 錫粒子11壓接於其電極。 [第五種實施形態] 依據圖13說明本發明一種實施形態如下。 本實鼽形悲係揭示在設於半導體晶片丨、晶片狀之電子 零件2、晶圓3及電路基板4之凸塊5、電極6上塗佈焊錫 CJ 後，對未達焊接用之必要量的凸塊5、電極6供給不足之焊 錫的方法。 另外，本實施形態中說明者以外的結構與上述第一種實 施形態等相同。此外，為了方便說明，就具有與顯示於上 述第一種實施形態等之圖式的構件相同功能之構件，註記 相同符號，並省略其說明。 此外，本實施形態中係揭示在設於半導體晶片丨之凸塊5 上塗佈烊錫之方法，不過，並不限定於此，如上述半導體 曰曰片1亦可為晶片狀之電子零件2 '晶圓3或電路基板4，上 122280.doc -38- 200822252 述凸塊5亦可作為電極6。 圖13係設有將焊錫塗佈於凸塊5後，檢查凸塊以焊錫量 =錫讀查工具51。上述焊錫量檢查卫料藉由外觀檢 -等’來檢查進行焊接用之焊錫量是否不^，而抽出焊錫 不足之凸塊5。本實施形態之方法係圖示上述焊錫量檢查 工具判斷為焊錫量不足時，供給焊錫至該烊錫量不足之凸 塊5的方法。In the method of the present embodiment, since the layer of the Ma Zhixi particle 11 is very thin, the solder is soldered, and the solder is more Φ J.-T y- w is generated at the interface of the n electrode 6 Bubbles can easily reach the outside. In addition, the size and spacing of the bumps 5 and the electrodes 6 of the circuit board 4 may be strictly controlled by the method of the above-mentioned ancient and soil. The amount of 丨i is 0. In this case, as shown in Fig. 12(a), the flux 13 which is mixed with the solder particles 11 is formed on the stage 21, from μ, +, above the flux 13, the semiconductor wafer 1 or wafer with the bumps 122280.doc -37-200822252 is pressed, and the solder particles are pressed against the bumps 5 (Fig. 12(b)). Thereafter, the bumped semiconductor wafer cassette or wafer is taken out from the flux 13 (Fig. 12(c)). At this time, the concentration of the flux 13 mixed with the solder particles is such that when the bump is pressed, there are a plurality of solder particles under the bump and are not buried between the bumps. Further, the concentration of the solder particles 11 is preferably at least the concentration of the metal particles mixed in the anisotropic conductive film used in the current flip chip mounting. Alternatively, instead of the stage 21, the flux 13 may be applied to the circuit board 4 and pressed by the crimping plate 41 having the electrode 6 to which the solder particles 11 are desired to be pressed. The bump patterns are the same in position, and the solder particles 11 are pressed against the electrodes. [Fifth Embodiment] An embodiment of the present invention will be described below with reference to Fig. 13 . This embodiment shows the necessity of not applying solder after applying solder CJ to the bumps 5 and 6 of the semiconductor wafer, the wafer-shaped electronic component 2, the wafer 3, and the circuit board 4. The bump 5 and the electrode 6 supply a method of insufficient solder. Further, the configuration other than the one described in the present embodiment is the same as that of the first embodiment described above. In the following description, members having the same functions as those of the members of the above-described first embodiment and the like are denoted by the same reference numerals, and their description will be omitted. Further, in the present embodiment, a method of applying bismuth tin on the bump 5 provided on the semiconductor wafer is disclosed. However, the present invention is not limited thereto, and the semiconductor wafer 1 may be a wafer-shaped electronic component 2 'Wafer 3 or circuit substrate 4, above 122280.doc -38- 200822252 The bump 5 can also be used as the electrode 6. Fig. 13 is a view in which the solder is applied to the bump 5, and the bump is inspected to have a solder amount = tin reading tool 51. The solder amount inspection keeper checks whether the amount of solder for soldering is not detected by the appearance inspection, etc., and extracts the bump 5 having insufficient solder. The method of the present embodiment is a method for supplying the solder to the bump 5 having insufficient solder content when the solder amount inspection tool determines that the solder amount is insufficient.

首先本Λ她开> 悲如圖13(a)所示，在設於半導體晶片】 之凸塊5上，如上述第三或第四種實施形態所述地塗佈焊 錫。塗佈之焊錫量藉由焊錫量檢查工具51檢查。檢查時係 檢測認為照這樣實施倒裝片安裝時，因焊錫量不足而無法 充分地焊接之半導體晶片丨上的凸塊5並抽出。 對於在上述圖13⑷之步驟抽出之凸塊5，進行供給不足 之烊錫的步驟。如圖13(b)所示，如上述第三種實施形態地 準備壓接棒42與均勻地分散於台21的帛錫粒子n，並如圖 13(c)所示，壓接棒42壓住均句地分散於台21之焊錫粒子 11，而使焊錫粒子11假壓接（圖13(d))。 其次，將壓接了焊錫粒子n之壓接棒42，與藉由上述焊 錫量檢查工具51而判斷為焊錫量不足之半導體晶片丨上的 凸塊5對準位置、相對（圖13(e))而接觸（圖13⑴）。 其次，如圖13(g)所示，使壓接於加熱至焊錫熔點之凸 塊5的焊錫粒子11接觸而熔化。壓接於針之頂端的焊錫粒 子11在電極上熔化而擴散於其表面（圖13(g))。如此，由於 可塗佈遠比以針轉印焊膏時少的焊錫，因此，即使半導體 122280.doc •39- 200822252 晶片1上之凸塊5微細時，仍可避免與鄰接之凸塊5跨接， 來塗佈或追加焊錫。 另外，使用壓接棒42之方法時，壓接於壓接棒42之焊錫 粒子11如上述，宜在接觸於半導體晶片1上之凸塊5後熔 解。由於壓接棒42係半導體晶片1上之凸塊5的數量程度重 複壓接與轉印焊錫粒子11，因此，係為了防止壓接焊錫粒 子11時，於壓接棒42之溫度高時，焊錫粒子η熔化，而過 多之焊錫粒子11熔敷於壓接棒42。First, the present invention is opened. As shown in Fig. 13(a), the solder is applied to the bump 5 provided on the semiconductor wafer as described in the third or fourth embodiment. The amount of solder applied is checked by the solder amount inspection tool 51. At the time of inspection, it was found that when the flip chip mounting was performed as described above, the bumps 5 on the semiconductor wafer cassette which could not be sufficiently soldered due to insufficient soldering amount were extracted. The step of supplying insufficient tin in the bump 5 extracted in the above step of Fig. 13 (4) is performed. As shown in Fig. 13 (b), the crimping bar 42 and the antimony tin particles n uniformly dispersed in the stage 21 are prepared as in the above-described third embodiment, and as shown in Fig. 13 (c), the crimping bar 42 is pressed. The solder particles 11 of the stage 21 are dispersed in a uniform manner, and the solder particles 11 are pseudo-compressed (Fig. 13 (d)). Next, the crimping bar 42 to which the solder particles n are crimped is aligned with the bump 5 on the semiconductor wafer cassette which is determined to have insufficient solder amount by the solder amount inspection tool 51 (Fig. 13(e) ) and contact (Fig. 13(1)). Next, as shown in Fig. 13 (g), the solder particles 11 which are pressure-bonded to the bumps 5 heated to the melting point of the solder are brought into contact and melted. Solder particles 11 crimped to the tip of the needle are melted on the electrode and diffused on the surface (Fig. 13(g)). Thus, since the solder can be coated much less than when the solder paste is transferred by the needle, even if the bump 5 on the wafer 1 of the semiconductor 122280.doc • 39-200822252 is fine, the bump 5 adjacent to the adjacent can be avoided. Connect, to apply or add solder. Further, when the crimping bar 42 is used, the solder particles 11 which are crimped to the crimping bar 42 are preferably melted after being in contact with the bumps 5 on the semiconductor wafer 1 as described above. Since the crimping bar 42 is repeatedly crimped and transferred to the solder particles 11 in the number of the bumps 5 on the semiconductor wafer 1, the solder is prevented from being pressed when the solder balls 11 are pressed, and when the temperature of the crimping bar 42 is high, the solder is soldered. The particles η are melted, and too much solder particles 11 are welded to the crimping bar 42.

C 當然，管理上述壓接棒42之溫度時，亦可使半導體晶片 1之凸塊5與焊錫粒子11接觸後，熔化焊錫粒子丨丨，亦可預 先熔化焊錫粒子11，而接觸於加熱之凸塊5。 藉由如上述地構成，可從已經塗佈焊錫結束之半導體晶 片1上的凸塊5等中，抽出認為焊接用之焊錫量不足的凸塊 5，來補充不足之焊錫。 [第六種實施形態] I) 依據圖14說明本發明一種實施形態如下。 本實施形態係揭示具有凸塊5之半導體晶片1、晶片狀之 電子零件2、晶圓3及電路基板4中至少一種，藉由以本實 施形悲之方法壓接焊錫粒子11，溶化上述焊錫粒子丨丨，進 行塗佈（預塗佈）來安裝之方法。 另外，本實施形悲中說明者以外的結構與上述第一種實 施形態等相同。此外，為了方便說明，就具有與顯示於上 述第一種實施形態等之圖式的構件相同功能之構件，註記 相同符號，並省略其說明。 122280.doc •40· 200822252 此外’本實施形態中係揭示藉由焊接而安裝設於半導體 晶片i之凸塊5與設於電路基板4之電極6的情況，不過，並 不限定於此，如亦可使用於與設於上述半導體晶片】之凸 塊5係設於晶圓3等其他之凸塊5等焊接之情況。 ▲圖14⑷及圖14(b)顯示倒裝片安裝設於以第一種實施形 態等之方法預塗佈之半導體晶片！的凸塊5，與以第三種實 施形態等之方法預塗佈之電路基板4上的電極6之方法。 首先，如圖14⑷所示，使預塗佈之凸塊5與預塗佈之電 極6相對。 此時，預先將凸塊5與電極6加熱至焊錫熔化之溫度。由 於凸塊5侧之焊錫與電極6側之焊錫藉由溶化而成為液體， 因此分別產生表面張力。 其次，使該兩者接觸時’形成液狀之焊錫欲縮小其表面 積而相互拉近（圖14(b))。如上述，藉由形成液狀之焊錫的 表面張力，上述凸塊5與電路基板4自對準於焊接之最佳位 〇 置。 此時，兩者之焊錫量過多時，過剩之焊錫擴散而形成不 需要之焊接（跨接）。此外，焊錫量過少時，表面張力在產 生自對準效應上不足，半導體晶片i無法移動至適當之位 置。 本實施形態之方法’如第一種實施形態所述，由於可將 焊錫量予以最佳化，因此可實現自對準。 此外，上述之方法係將凸塊5與電極6之焊錫加熱而熔化 後接5不過，亦可上述兩者均在不加熱狀態下，與先前 122280.doc -41 - 200822252 之倒裝片同樣地以面朝下之方法配置，其後進行加熱。 本實施形態之方法，電路基板4之電極6上的焊錫粒子n 與設於凸塊5頂端之焊錫粒子丨丨，在壓接過程中，其表面 形成平坦。 本實施形態之方法，由於係在設於電路基板4之電極6上 的平坦形狀的焊錫上，重疊設於凸塊5上之平坦形狀的焊 • 錫，因此，使上述兩者相對，以先前之倒裝片的方法配置 f% 時不易產生傾斜。 再者，凸塊5與電極6之各組合中，各個高度之變動小， 不易產生間隙。因而，其特徵為：倒裝片安裝後，不易產 生未接合之凸塊5。 此外，本實施形態之方法，由於可在半導體晶片丨或晶 圓3之凸塊5側與電路基板4側之電極6上預塗佈焊錫，因此 可進行凸塊5之窄間距化。 因為Super Jarfit法係將銅之表面改質來配置焊錫粒子之 〇 方法，所以，原理上僅可在銅上配置焊錫粒子。因而，需 要在電路基板側預塗佈焊接時需要之全部焊錫量。 但疋，預塗佈而與半導體晶片或晶圓之凸塊焊接時，熔 • 化之液狀的焊錫無法藉由表面張力而保持於電極上時，會 自該電極上流出，而與鄰接之電極形成短路（跨接）。 為了防止此情況，需要擴大電極之面積，因而有窄間距 化困難之問題。 但是，本實施形態之方法，即使在半導體晶片丨之凸塊5 側仍可配置焊錫粒子11。藉由此種結構，使用之焊錫的總 122280.doc -42- 200822252 量相同時，須配置於電路基板4之電極6側的焊錫量，可比 使用Super Jarfit法時少。 因此，比使用Super jarfit法時，可縮小電極6之尺寸及 凸塊5之間距。此亦適用於安裝晶片狀之電子零件2時。此 因，晶片狀之電子零件2，其電極6一般而言並非銅，而多 為錫電鍍。C. Of course, when the temperature of the crimping bar 42 is managed, the bump 5 of the semiconductor wafer 1 may be brought into contact with the solder particles 11 to melt the solder particles, and the solder particles 11 may be melted in advance to be in contact with the heated bump. Block 5. According to the above configuration, the bumps 5 which are considered to have insufficient soldering amount for soldering can be extracted from the bumps 5 and the like on the semiconductor wafer 1 on which the solder has been applied, and the insufficient solder can be replenished. [Sixth embodiment] I) An embodiment of the present invention will be described below with reference to Fig. 14 . In the present embodiment, at least one of the semiconductor wafer 1 having the bumps 5, the wafer-shaped electronic component 2, the wafer 3, and the circuit board 4 is disclosed, and the solder particles 11 are pressure-bonded by the present embodiment to melt the solder. The method of coating (precoating) to mount the particles. Further, the configuration other than the one described in the present embodiment is the same as the above-described first embodiment. In the following description, members having the same functions as those of the members of the above-described first embodiment and the like are denoted by the same reference numerals, and their description will be omitted. In the present embodiment, the bump 5 provided on the semiconductor wafer i and the electrode 6 provided on the circuit board 4 are attached by soldering. However, the present invention is not limited thereto. It can also be used in the case where the bumps 5 provided on the semiconductor wafer are attached to other bumps 5 such as the wafer 3 or the like. ▲ Figure 14 (4) and Figure 14 (b) show that the flip-chip is mounted on a semiconductor wafer pre-coated in the first embodiment or the like! The bump 5 is a method of electrode 6 on the circuit board 4 which is precoated by the third embodiment or the like. First, as shown in Fig. 14 (4), the precoated bump 5 is opposed to the precoated electrode 6. At this time, the bump 5 and the electrode 6 are heated in advance to a temperature at which the solder melts. Since the solder on the side of the bump 5 and the solder on the side of the electrode 6 become liquid by melting, surface tension is generated. Next, when the two are brought into contact, the liquid solder is formed to be reduced in surface area and brought closer to each other (Fig. 14(b)). As described above, by forming the surface tension of the liquid solder, the bump 5 and the circuit board 4 are self-aligned to the optimum position of the solder. At this time, when the amount of solder between the two is too large, the excess solder diffuses to form an unnecessary solder (crossover). Further, when the amount of solder is too small, the surface tension is insufficient in the self-alignment effect, and the semiconductor wafer i cannot be moved to an appropriate position. According to the method of the present embodiment, as described in the first embodiment, since the amount of solder can be optimized, self-alignment can be achieved. In addition, in the above method, the solder of the bump 5 and the electrode 6 is heated and melted and then connected, but the both may be in the same state as the flip chip of the previous 122280.doc -41 - 200822252. It is placed face down, followed by heating. In the method of the present embodiment, the solder particles n on the electrode 6 of the circuit board 4 and the solder particles 设 provided on the tip end of the bump 5 are flattened during the pressure bonding. In the method of the present embodiment, since the solder of the flat shape is superposed on the bump 5 provided on the electrode 6 provided on the electrode 6 of the circuit board 4, the two are opposed to each other. The flip chip method is less prone to tilt when f% is configured. Further, in each combination of the bump 5 and the electrode 6, the variation in height is small, and a gap is less likely to occur. Therefore, it is characterized in that after the flip chip is mounted, the unbonded bumps 5 are less likely to be produced. Further, in the method of the present embodiment, solder can be pre-coated on the electrode 5 side of the semiconductor wafer or the bump 3 and the electrode 6 on the circuit board 4 side, so that the pitch of the bump 5 can be narrowed. Since the Super Jarfit method modifies the surface of copper to configure the solder particles, it is only possible to dispose solder particles on copper. Therefore, it is necessary to pre-coat all the amount of solder required for soldering on the circuit substrate side. However, when pre-coated and soldered to a bump of a semiconductor wafer or wafer, when the molten liquid solder cannot be held on the electrode by surface tension, it will flow out from the electrode, and adjacent to it. The electrodes form a short circuit (crossover). In order to prevent this, it is necessary to enlarge the area of the electrode, so that it is difficult to narrow the pitch. However, in the method of the present embodiment, the solder particles 11 can be disposed even on the bump 5 side of the semiconductor wafer. With such a configuration, when the total amount of solder used is 122280.doc - 42 - 200822252, the amount of solder to be disposed on the electrode 6 side of the circuit board 4 can be less than that in the case of the Super Jarfit method. Therefore, the size of the electrode 6 and the distance between the bumps 5 can be reduced than when the Super jarfit method is used. This also applies when the wafer-shaped electronic component 2 is mounted. For this reason, the wafer-like electronic component 2, whose electrode 6 is generally not copper, is mostly tin plated.

Super Jarfit法無法使錫電鍍電極附著焊錫粒子丨丨，但 ( 疋，本實施形態及相關之實施形態的方法，即使對錫電鍍 電極及其他電極，仍可附著焊錫粒子丨丨，而可實現藉由自 對準之焊接的最佳位置對準，及進行凸塊5之窄間距化。 如以上所述，由於本實施形態可在微小之區域上配置焊 錫粒子，因此可實現藉由良好間距之焊接的倒裝片安裝及 超小型晶片狀之電子零件的安裝。 此外，不需要特別之裝置、材料及處理，而可以低價格 安裝。 、α G 再者，由於可以另外之步驟進行底膠之硬化，因此可通 量佳地進行製造。 此外，本實施形態之電子電路之製造方法，係電子零件 之電極部亦可為電子零件之凸塊電極。 藉此，可在電子零件之凸塊電極上抵接焊錫粒子而壓 接，來將上述電子零件接合於上述電路基板上。 此外，本實施形態之電子電路之製造方法，亦可上述電 子零件之電極部無階差，或是有階差地形成於該電極部之 形成面上，上述第二步驟係將上述電子零件《電極形成面 122280.doc -43- 200822252 抵接於上述台上的焊錫粒 而在5亥電極形成面上假壓接 ^錫粒子，再者，將上述電子零件之電極形成面壓在上述 ，子零件之電極部附近形成凸起的板上，僅使假麼接之 、錫粒子中’在電極部附近之焊錫粒子真壓接後，除去不 真壓接之焊錫粒子。The Super Jarfit method cannot adhere the solder particles to the tin plating electrode. However, in the method of the present embodiment and the related embodiments, the solder particles can be adhered even to the tin plating electrode and other electrodes, and the solder particles can be attached. The alignment of the self-aligned solder is optimally aligned, and the pitch of the bumps 5 is narrowed. As described above, since the solder particles are disposed in a minute region in the present embodiment, it is possible to achieve a good pitch. Soldering flip-chip mounting and installation of ultra-small wafer-shaped electronic components. In addition, no special equipment, materials and processing are required, and it can be installed at a low price. α G, because of the additional steps, the primer can be used. Further, in the method of manufacturing an electronic circuit of the present embodiment, the electrode portion of the electronic component may be a bump electrode of an electronic component. Thereby, the bump electrode of the electronic component can be used. The electronic component is bonded to the circuit board by abutting against the solder particles, and the electronic circuit manufacturing method of the embodiment Alternatively, the electrode portion of the electronic component may be formed on the electrode surface without a step, or may be formed with a step. The second step is to contact the electronic component "electrode forming surface 122280.doc -43 - 200822252". The tin particles are pseudo-compressed on the surface of the five-electrode electrode on the electrode on the stage, and the electrode forming surface of the electronic component is pressed against the electrode forming portion of the sub-part to form a convex plate. Only the solder particles in the vicinity of the electrode portion in the tin particles are simply crimped, and the solder particles that are not crimped are removed.

藉此’將無階差或是大致無階差而形成的上述電子零件 :電極部的上述電子零件之電極形成面抵接於上述台上的 焊錫粒子’在该電極形成面上假壓接焊錫粒子。再者，將 上述電子零件之電極形成面壓在上述電子零件之電極部附 近形成凸起的壓板上，僅使假壓接之焊錫粒子中，在電極 部料之焊錫粒子真壓接。其後，除去不真壓接之焊锡粒 子。藉此，僅使電極部壓接焊錫粒子，而可將上述電子零 件接合於上述電路基板上。 “卜本實知开》態之電子電路之製造方法，亦可上述電 子零件之電極部無階差，或是有階差地形成於該電極部之 成面上上述第一步驟係將上述電子零件之電極形成面 氐接於上述台上的焊錫粒子，而在該電極形成面上壓接焊 錫粒子再者，藉由擴張壓接於上述電子零件之電極部附 L X外之：(：干錫粒子抵接加熱構件而熔化的焊錫，而除去壓 接於電極部以外之焊錫粒子。 藉此將無階差或是大致無階差而形成的上述電子零件 之電極部的上述電子零件之電極形成面抵接於上述台上的 太干錫粒子，在該電極形成面上壓接焊錫粒子。再者，擴張 在壓接於上述電子零件之電極部附近以外的焊錫粒子上抵 122280.doc -44 - 200822252 接加熱構件而溶化的焊錫，而除去遂接於電極部以外之尸 錫粒子，並且使電極部熔敷焊錫粒子，而可將上述電子^ 件接合於上述電路基板上。 ^ 此外’本實施形態之電子電路之製造方法，係上述包含 突起部之構件亦可為形成與在上述第五步驟轉印焊錫粒子 之電極部的圖案相同之凹凸圖案者。 藉此’由於上述包含突起部之構件係以與轉印焊錫粒子 f 之電極部的圖案相同之安 J之凹凸圖案而形成，因此數個電極部 上可一起轉印。 此外，本實施形態之電子電路之製造方法，係上述包含 突起部之構件為其頂端面積係上述電㈣程度的棒狀構 件，上述第四及第五步驟亦可藉由重複數次將壓接於上述 棒狀構件之頂端的焊錫粒子轉印於上述電極部來實施。 藉此，上述包含突起部之構件係棒狀之構件，且可藉由By the above-mentioned electronic component which is formed without step or substantially no step: solder particles of the electrode portion of the electrode portion that are in contact with the electrode forming surface of the electronic component are pseudo-crimped on the electrode forming surface. particle. Further, the electrode forming surface of the electronic component is pressed against the electrode plate on the vicinity of the electrode portion of the electronic component to form a bump, and only the solder particles in the dummy portion are pressure-bonded to the solder particles in the electrode portion. Thereafter, the solder particles which are not crimped are removed. Thereby, only the electrode portion is pressure-bonded to the solder particles, and the electronic component can be bonded to the circuit board. The manufacturing method of the electronic circuit of the "Buben knowing" state may be such that the electrode portion of the electronic component has no step difference or is formed on the surface of the electrode portion with a step difference. The first step is to use the electronic component. The electrode forming surface is connected to the solder particles on the stage, and the solder particles are pressure-bonded on the electrode forming surface, and the electrode portion of the electronic component is expanded and crimped to be attached to the LX: (: dry tin particles are received The solder which is melted by the heating member is removed, and the solder particles which are pressed against the electrode portion are removed. Thereby, the electrode forming surface of the electronic component of the electrode portion of the electronic component which is formed without step or substantially no step is abutted The dry tin particles attached to the stage are pressed against the solder particles on the electrode forming surface, and further expanded on the solder particles other than the vicinity of the electrode portion of the electronic component. 122280.doc -44 - 200822252 The solder which is melted by the heating member is removed, and the cadmium particles which are bonded to the electrode portion are removed, and the electrode portion is welded to the solder particles, whereby the electronic component can be bonded to the circuit board. Further, in the method of manufacturing an electronic circuit according to the present embodiment, the member including the protrusion may be formed into a concave-convex pattern having the same pattern as that of the electrode portion of the solder particles transferred in the fifth step. Since the member including the protrusion portion is formed by the concave-convex pattern of the same pattern as the electrode portion of the transfer solder particle f, the plurality of electrode portions can be transferred together. Further, the method of manufacturing the electronic circuit of the present embodiment The member including the protrusion portion is a rod-shaped member whose tip end area is the above-mentioned electric (four) degree, and the fourth and fifth steps may also be performed by rotating the solder particles crimped to the tip end of the rod-shaped member several times. Printing is performed on the electrode portion. Thereby, the member including the protrusion is a rod-shaped member, and can be

重複數次轉印於上述電極都，而/去I 电徑。丨而在數個電極部上轉印焊錫 粒子。 此外’本實施形態之電子電路之製造方法，係上述第五 步驟亦可使壓接於上述突起部之焊錫粒子熔化，而轉印於 上述電極部上。 藉此，壓接於上述突起部之焊錫粒子藉由溶化而轉印於 上述電極部上。 此外，本實施形態之電子電路之製造方法，係上述第一 步驟亦可在上述台上均勻地塗佈液體後，放置比附著於上 述液體多之焊錫粒子’藉由自台上除去不附著於上述液體 122280.doc -45- 200822252 之焊錫粒子，而形成均勻之焊錫粒子層。 藉此，在上述台上均勻地塗佈液體，並 之悍錫粒子。附著於上述液體之悍錫粒子雖與上2 = (附著於上述。上’不過，因為不附著於上述液體之焊錫 &子容易除去，所以可形成均勾之焊錫粒子層。 此外’本實施形態之電子電路之製造方法，係上述液體 • <㈣厚度亦可為上料錫粒子之直徑町的厚度。 ( "藉此，由於上述液體塗佈之厚度成為上述焊錫粒子之直 仫以下’因此可在上述台上均勻地塗佈一層上述焊錫粒 子。 此外’本實施形態之電子電路之製造方法，係上述包含 突起部之構件亦可為形成與上述電路基板之電極部的圖案 相同之凹凸圖案者。 藉此纟於上述包含突起部之構件由與轉印焊錫粒子之 電極部的圖案相同之凹凸圖案而形成，因此數個電極部上 可一起轉印。 此外’本實施形態之電子電路之製造方法，係上述包含 突起部之構件為其頂端面積係上述電極部程度之棒狀構 件且上述第七步驟亦可藉由重複數次抵接上述棒狀構 件，使該焊錫粒子壓接於上述電路基板之電極部來實施。 藉此，上述包含突起部之構件健頂端面積為上述電極 部程度之棒狀構件，且可藉由將棒狀構件重複數次抵接於 上述電極部，而在數個電極部上轉印焊錫粒子。 此外’本實施形態之電子電路之製造方法，係上述包含 122280.doc -46 - 200822252 突起部之構件亦可為包含凸塊電極之電子零件。 藉此，以電子零件之凸塊電極抵接上述電路基板上之焊 錫粒子而壓接，可將上述電子零件接合於上述電路基板 上。 此外，本實施形態之電子電路之製造方法，係上述第六 步驟亦可在上述電路基板上均勻地塗佈液體後，放置比附 著於上述液體多的焊錫粒子，藉由自電路基板上除去不附 (、 著於上述液體之焊錫粒子，而形成均勻之焊錫粒子層。 藉此，在上述電路基板上均勻地塗佈液體，並自其上灑 上多里之焊錫粒子。附著於上述液體之焊錫粒子雖與上述 液體一起附著於上述電路基板上，不過，因為可輕易除去 不附著於上述液體之焊錫粒子，所以可形成均勻之焊錫粒 子層。 此外，本實施形態之電子電路之製造方法，亦可將上述 液體之塗佈尽度形成上述焊錫粒子之直徑以下的厚产。 I 藉此，由於上述液體塗佈之厚度成為上述焊錫粒子之直 徑以下’因此可在上述電路基板上均勻地塗佈一層上述焊 錫粒子。 此外，本實施形態之電子電路之製造方法，係在上述第 二步驟後’ ϋ述第三步驟之前包含第八步驟，其係檢測 壓接於上述電路基板之電極部的焊錫粒子之不足，並在檢 測出焊錫粒子不足之電極部上供給焊錫粒子，上述第八步 驟亦可為在放置於台上之焊錫粒子上抵接包含突起部之ς 件，使該焊錫粒子壓接於上述突起部，並將壓接於上述突 122280.doc -47- 200822252 起部之焊錫粒子轉印於檢測出焊錫粒子不足之電極部上的 步驟。 藉此，可在抵接電子零件之電極冑，使焊錫粒子壓接於 料極部後，且在將上料子零件接合於上料路基板之 前，檢查壓接於上述電路基板之電極部的焊錫粒子是否為 焊接用之需要量，而在檢測出焊錫粒子不足之電極部上， 重新壓接轉印焊錫粒子。Repeat the transfer to the above electrodes several times, and / to I path. The solder particles are transferred over a plurality of electrode portions. Further, in the method of manufacturing an electronic circuit according to the present embodiment, in the fifth step, the solder particles pressed against the protruding portion may be melted and transferred onto the electrode portion. Thereby, the solder particles pressed against the protruding portion are transferred to the electrode portion by melting. Further, in the method of manufacturing an electronic circuit according to the present embodiment, in the first step, the liquid may be uniformly applied to the stage, and then the solder particles attached to the liquid may be removed from the stage without being attached to the solder. The above-mentioned liquid 122280.doc -45- 200822252 solder particles form a uniform layer of solder particles. Thereby, the liquid is uniformly applied to the above stage, and the tin particles are rubbed. The tin-tin particles adhering to the above liquid are the same as the upper 2 = (attached to the above. However, since the solder and the electrode which are not attached to the liquid are easily removed, a solder particle layer of a uniform hook can be formed. In the method of manufacturing the electronic circuit of the form, the thickness of the liquid may be the thickness of the diameter of the tin-coated particles. (Therefore, the thickness of the liquid coating is equal to or less than the thickness of the solder particles. Therefore, the solder particles may be uniformly coated on the stage. Further, in the method of manufacturing the electronic circuit of the embodiment, the member including the protrusion may be formed in the same pattern as the electrode portion of the circuit board. In the concave-convex pattern, the member including the protrusion portion is formed by the same concavo-convex pattern as the pattern of the electrode portion for transferring the solder particles, and thus the plurality of electrode portions can be transferred together. Further, the electron of the embodiment The manufacturing method of the circuit is characterized in that the member including the protrusion portion has a rod-shaped member whose tip end area is the electrode portion and the seventh step Alternatively, the soldering particles may be pressed against the electrode portion of the circuit board by a plurality of times of abutting the rod-shaped member, whereby the area of the member including the protrusion portion is a rod shape of the electrode portion. The member may be transferred to the electrode portion by repeating the rod member several times, and the solder particles may be transferred to the plurality of electrode portions. Further, the method for manufacturing the electronic circuit of the present embodiment includes the above-mentioned 122280.doc -46 - 200822252 The member of the protrusion may be an electronic component including a bump electrode. Thereby, the bump electrode of the electronic component is pressed against the solder particles on the circuit board, and the electronic component may be bonded to the above Further, in the method of manufacturing an electronic circuit according to the present embodiment, in the sixth step, the liquid may be uniformly applied to the circuit board, and then solder particles may be placed in a larger amount than the liquid adhered to the liquid. The solder particles which are not attached to the liquid are removed from the substrate to form a uniform solder particle layer. Thereby, the circuit board is uniformly coated on the circuit board. a liquid, and a plurality of solder particles are sprinkled thereon. The solder particles adhering to the liquid adhere to the circuit board together with the liquid, but since the solder particles not adhering to the liquid can be easily removed, Further, in the method for producing an electronic circuit of the present embodiment, the coating end of the liquid may be formed to have a thickness below the diameter of the solder particles. The thickness is equal to or less than the diameter of the solder particles. Therefore, one layer of the solder particles can be uniformly applied to the circuit board. Further, in the method of manufacturing the electronic circuit of the embodiment, the third step is described after the second step. The eighth step includes the steps of detecting the shortage of solder particles pressed against the electrode portion of the circuit board, and supplying the solder particles to the electrode portion where the solder particles are insufficient, and the eighth step may be placed on the stage. The solder particles on the upper surface of the solder particles abut against the protrusions including the protrusions, and the solder particles are pressed against the protrusions. Crimping the solder particles 122280.doc -47- 200822252 from above of the projecting portion detected in the step of transferring the electrode portion of the solder particles is insufficient. Thereby, after the solder particles are pressed against the electrode portion, the solder particles are pressed against the electrode portion, and the solder portion pressed to the electrode portion of the circuit substrate is inspected before the upper material member is bonded to the upper substrate. Whether or not the particles are required for soldering, the transfer solder particles are re-compressed on the electrode portion where the solder particles are insufficient.

C Ο 此外’本實施形態之電子電路之製造方法，係在上述第 :步驟後’且上述第三步驟之前包含第八步驟，其係檢測 壓接於上述電路基板之電極部的焊錫粒子之不足，並在檢 測出焊錫粒子不足之電極部上供給焊錫粒子，上述第八: 驟亦可為在放置於台上之焊錫粒子上抵接包含突起部之構 件，使該焊錫粒子壓接於上述突起部，並將壓接於上述突 起部之焊錫粒子轉印於檢測出焊錫粒子不^之電極部上的 步驟。 藉此’可在將壓接於突起部之焊錫粒子轉印於上述電子 零件或上述電路基板之電極部之後，且在將上述電子愛件 接合於上述電路基板之前，檢查壓接於上述電路基板之電 極部的焊錫粒子是否為焊接用之需要量，而在檢測出焊錫 粒子不足之電極部上，重新壓接轉印焊錫粒子。C Ο In addition, the method for manufacturing an electronic circuit according to the present embodiment includes the eighth step before the third step, and the eighth step of detecting the shortage of solder particles pressed against the electrode portion of the circuit board. And supplying the solder particles to the electrode portion where the solder particles are insufficient, and the eighth step: abutting the solder particles placed on the stage to contact the member including the protrusion, and pressing the solder particles to the protrusion And transferring the solder particles pressed against the protruding portion to the electrode portion where the solder particles are not detected. Therefore, after the solder particles pressed against the protrusions are transferred to the electrode portion of the electronic component or the circuit board, and the electronic favorite is bonded to the circuit board, the voltage is pressed to the circuit board. Whether or not the solder particles in the electrode portion are required for soldering, the transfer solder particles are re-compressed on the electrode portion where the solder particles are insufficient.

此外’本實施形態之電子電路之製造方法，係在上述第 ::驟後’且上述第三步驟之前包含第八步驟，其係檢測 壓接於上述電路基板之電極部的焊錫粒子之^足，並在於 測出焊錫粒子不足之電極部上供給焊錫粒子，上述第八I 122280.doc -48- 200822252 驟亦可為在放置於台上之焊錫粒子上抵接包含突起部之構 件’使該焊錫粒子壓接於上述突起部，並將壓接於上述突 起部之焊錫粒子轉印於檢測出焊錫粒子不足之電極部上的 步驟。Further, the method for manufacturing an electronic circuit according to the present embodiment includes the eighth step before the third step, and the third step is to detect the solder particles pressed against the electrode portion of the circuit board. And the solder particles are supplied to the electrode portion where the solder particles are insufficient, and the eighth I 122280.doc -48- 200822252 may be a member that abuts the protrusion including the protrusion on the solder particles placed on the stage. The solder particles are pressed against the protruding portion, and the solder particles pressed against the protruding portion are transferred to the electrode portion where the solder particles are insufficient.

Ο 藉此’可在放置於上述電路基板上之焊錫粒子上抵接包 含突起部之構件，使該焊錫粒子壓接於上述電路基板之電 極部之後，且在將上述電子零件接合於上述電路基板之 前，檢查壓接於上述電路基板之電極部的焊錫粒子是否為 焊接用之需要量，而在檢測出焊錫粒子不足之電極部上， 重新壓接轉印焊錫粒子。 本實施形態係關於使用凸塊而安裝於電路基板之半導體 裝置、上述半導體裝置之製造方法者。特別是可使用於倒 裝片方式之安裝方法，再者，亦可適用於稱為咖及〇4〇2 之微小晶片狀的電子零件之安裝。 實施方式射構成之具时施_或實施㈣係說明本 發明之技術内容者，不應狹羞±士 應狄義地解釋為僅限定於此種具體 例，在符合本發明之精神與复今 、/、-人揭不之申請專利範圍内， 可作各種變更來實施。 【圖式簡單說明】 圖1(a)係顯示實施形態者， 且係顯不在設於晶片或晶圓 的凸塊上壓接焊錫粒子之方法的剖面圖。 圖1(b)係顯示實施形態者， λα π成u r上 且係顯示在設於晶片或晶圓 的凸塊上祕焊錫粒子之方法的剖面圖。 圖1(C)係顯示實施形態者， 且係顯示在設於晶片或晶圓 122280.doc •49- 200822252 的凸塊上壓接焊錫粒子之方法的剖面圖。 圖1(d)係顯示實施形態者，且係顯示在設於晶片或晶圓 的凸塊上壓接焊錫粒子之方法的剖面圖。 圖1(e)係顯示實施形態者，且係顯示在設於晶片或晶圓 的凸塊上壓接焊錫粒子之方法的剖面圖。 圖2⑷係顯示均勻地塗佈在圖i⑷〜圖i⑷所示之上述方 法中使用之焊錫粒子的方法之剖面圖。With the above, the solder particles coated on the circuit board can be brought into contact with the member including the protrusion, and the solder particles can be bonded to the electrode portion of the circuit board, and the electronic component can be bonded to the circuit board. Previously, it was examined whether or not the solder particles pressed against the electrode portion of the circuit board were required for soldering, and the transfer solder particles were re-compressed on the electrode portion where the solder particles were insufficient. The present embodiment relates to a semiconductor device mounted on a circuit board using bumps, and a method of manufacturing the above semiconductor device. In particular, it can be used for the mounting method of the flip chip method, and can also be applied to the mounting of a micro wafer-shaped electronic component called a coffee maker.实施 实施 实施 实施 实施 实施 实施 实施 实施 实施 实施 实施 实施 实施 实施 实施 实施 实施 实施 实施 实施 实施 实施 实施 实施 实施 实施 实施 实施 实施 实施 实施 实施 实施 实施 实施 实施 实施 实施 实施 实施 实施 实施 实施 实施 实施 实施 实施 实施 实施 实施, /, - people can not be applied for a variety of changes within the scope of the patent application. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1(a) is a cross-sectional view showing a method of crimping solder particles on a bump provided on a wafer or a wafer. Fig. 1(b) is a cross-sectional view showing a method in which λα π is u r and is a method of displaying solder particles on bumps of a wafer or a wafer. Fig. 1(C) is a cross-sectional view showing a method of crimping solder particles on bumps provided on a wafer or wafer 122280.doc • 49-200822252. Fig. 1(d) is a cross-sectional view showing a method of pressing and soldering solder particles on bumps provided on a wafer or a wafer. Fig. 1(e) is a cross-sectional view showing a method of pressing and soldering solder particles on bumps provided on a wafer or a wafer. Fig. 2 (4) is a cross-sectional view showing a method of uniformly applying solder particles used in the above-described methods shown in Figs. i(4) to i(4).

C Ο 圖2(b)係顯示均勾地塗佈在圖i⑷〜圖_所示之上述方 法中使用之焊錫粒子的方法之剖面圖。 圖2(c)係顯示均勻地塗佈在圖i⑷〜圖叫所示之上述方 法中使用之焊錫粒子的方法之剖面圖。 圖2(d)係顯示均勻地塗佈在圖j⑷〜圖叫所示之上述方 法中使用之焊錫粒子的方法之剖面圖。 圖3⑷係顯示均勾地塗佈一層在圖i⑷〜圖⑼所示之上 述方法中使用之焊錫粒子的方法之剖面圖。 圖3(b)係顯示均句地塗佈-層在圖1⑷〜圖i⑷所示之上 述方法令使用之焊錫粒子的方法之剖面圖。 圖3⑷係顯示均勻地塗佈一層在圖1⑷〜圖ι⑷所示之上 述方法中使用之焊錫粒子的方法之剖面圖。 圖4⑷係顯示在電極與密封部分之高度不同的晶片狀電 子零件上壓接焊錫粒子之方法的剖面圖。 圖4(b)係顯示在電極與密封部分之高度不同的晶片狀電 子零件上壓接焊錫粒子之方法的剖面圖。 圖5⑷係顯示在電極與密封部分之高度相同的晶片狀電 122280.doc -50- 200822252 子零件上壓接㈣粒子之Μ㈣面圖。 :)係顯示在電極與密封部分之高度相同的晶片狀電 子零件上壓接焊錫粒子之方法的剖面圖。 圖5_示在電極與密封部分之高度相同的晶片狀電 子零件上壓接焊錫粒子之方法的剖面圖。 係顯示在電極與密封部分之高度相同的晶片狀電 零件上壓接焊錫粒子之方法的剖面圖。C Ο Fig. 2(b) is a cross-sectional view showing a method of uniformly applying solder particles used in the above-described method shown in Figs. i(4) to _. Fig. 2 (c) is a cross-sectional view showing a method of uniformly applying solder particles used in the above-described method shown in Fig. i (4) to the drawing. Fig. 2 (d) is a cross-sectional view showing a method of uniformly applying the solder particles used in the above-described method shown in Fig. j (4) to the figure. Fig. 3 (4) is a cross-sectional view showing a method of uniformly coating a layer of solder particles used in the above-described method shown in Figs. i(4) to (9). Fig. 3(b) is a cross-sectional view showing a method of uniformly coating the solder particles used in the method shown in Figs. 1(4) to i(4). Fig. 3 (4) is a cross-sectional view showing a method of uniformly coating a layer of solder particles used in the above-described method shown in Figs. 1 (4) to (4). Fig. 4 (4) is a cross-sectional view showing a method of crimping solder particles on a wafer-shaped electronic component having different heights of electrodes and sealing portions. Fig. 4 (b) is a cross-sectional view showing a method of crimping solder particles on a wafer-shaped electronic component having different heights of electrodes and sealing portions. Fig. 5 (4) shows a Μ (four) plane view of the (iv) particles on the wafer-shaped electric 122280.doc -50- 200822252 sub-parts of the same height as the sealing portion. :) is a cross-sectional view showing a method of crimping solder particles on a wafer-like electronic component having the same height as the sealing portion. Fig. 5 is a cross-sectional view showing a method of crimping solder particles on a wafer-like electronic component having the same height as that of the sealing portion. A cross-sectional view showing a method of crimping solder particles on a wafer-shaped electric component having the same height as that of the sealing portion.

Ο 圖5⑷係顯示在電極與密封部分之高度相同的晶片狀電 子零件上壓接焊錫粒子之方法的剖面圖。 Θ ()係·、、、頁不在電極與密封部分之高度相同的晶片狀電 子零件上壓接焊錫粒子之方法的剖面圖。 圖5(g)係顯示在電極與密封部分之高度相同的晶片狀電 子零件上壓接焊錫粒子之方法的剖面圖。 θ ()係顯不在電極與密封部分之高度相同的晶片狀電 子零件上壓接焊錫粒子之另外方法的剖面圖。 圖6(b)係顯示在電極與密封部分之高度相同的晶片狀電 子零件上壓接焊錫粒子之另外方法的剖面圖。 圖6(。)係顯示在電極與密封部分之高度相同的晶片狀電 子零件上壓接焊錫粒子之另外方法的剖面圖。 =6⑷係顯示在電極與㈣部分之高度相㈣晶片狀電 子令件上壓接焊錫粒子之另外方法的剖面圖。 圖6(e)係顯不在電極與密封部分之高度相同的晶片狀電 子^件上壓接焊錫粒子之另外方法的剖面圖。 圖6(f)係顯不在電極與密封部分之高度相同的晶片狀電 122280.doc 51 - 200822252 子零件上壓接焊錫粒子之另外方法的剖面圖。 圖7(a)係顯示在設於晶片或晶圓之凸塊上塗佈焊錫之方 法的剖面圖。 圖7(b)係顯示在設於晶片或晶圓之凸塊上塗佈焊錫之方 法的剖面圖。 图7(c)係顯示在設於晶片或晶圓之凸塊上塗佈焊錫之方 法的剖面圖。 圖7(d)係顯示在設於晶片或晶圓之凸塊上塗佈焊錫之方 法的剖面圖。 圖7(e)係顯示在設於晶片或晶圓之凸塊上塗佈焊錫之方 法的剖面圖。 圖7(f)係顯示在設於晶片或晶圓之凸塊上塗佈焊錫之方 法的剖面圖。 圖7(g)係顯示在設於晶片或晶圓之凸塊上塗佈焊錫之方 法的剖面圖。 V 圖8(a)係顯示在設於晶片或晶圓之凸塊上塗佈焊錫之另 外方法的剖面圖。 圖8(b)係顯示在設於晶片或晶圓之凸塊上塗佈焊錫之另 外方法的剖面圖。 圖8(c)係顯示在設於晶片或晶圓之凸塊上塗佈焊錫夕2 外方法的剖面圖。 圖8(d)係顯示在設於晶片或晶圓之凸塊上塗佈焊 外方法的剖面圖。 圖8(e)係顯示在設於晶片或晶圓之凸塊上塗佈焊錫之另 122280.doc -52- 200822252 Ο 外方法的剖面圖。 圖8(〇係顯示在設於晶片 外方法的剖面圖。 图8(g)係顯示在設於晶片 外方法的剖面圖。 圖9(a)係顯示在設於晶片 外方法的剖面圖。 圖9(b)係顯示在設於晶片 外方法的剖面圖。 圖9(e)係顯示在設於晶片 外方法的剖面圖。 或晶圓之凸塊上塗佈焊錫之另 或晶圓之凸塊上塗佈焊锡之另 或晶圓之凸塊上塗佈焊錫之另 或晶圓之凸塊上塗佈焊錫之另 或晶圓之凸塊上塗佈焊錫之另 图9(d)係顯示在設於晶片或晶圓之凸塊上塗佈焊錫 外方法的剖面圖。 、之另 圖9(e)係顯示在設於晶片或晶圓之凸塊上塗佈焊錫 外方法的剖面圖。 另 u 图9 (f)係顯示在設於晶片或晶圓之凸塊上塗佈焊锡 外方法的剖面圖。 于、之另 图9(g)係顯示在設於晶片或晶圓之凸塊上塗佈焊錫之 外方法的剖面圖。 另 圖10(a)係顯示在設於晶片或晶圓之凸塊上塗佈焊锡 外方法的剖面圖。 干、之另 圖1〇(b)係顯示在設於晶片或晶圓之凸塊上塗佈太曰 另外方法的剖面圖。 、之 圖1〇(c)係顯示在設於晶片或晶圓之凸塊上塗佈焊锡 另 122280.doc -53- 200822252 外方法的剖面圖。 固10(d)係顯示在設於晶片或晶圓之凸塊上塗佈焊锡 另外方法的剖面圖。 干，之 圖10(e)係顯示在設於晶片或晶圓之凸塊上塗佈恆 外t、+ 土即坪场之另 卜方去的剖面圖。 圖1丨（勾係顯示在設於晶片或晶圓之凸塊上塗佈焊 外方法的剖面圖。 、另 Ο Ο 圓之凸塊上塗佈焊錫之 圖U(b)係顯示在設於晶片或晶 另外方法的剖面圖。 錫之另 圖11 (c)係顯示在設於晶片或晶圓之凸塊上塗佈 外方法的剖面圖。 圖1 i(d)係顯示在設於晶片或晶圓之凸塊 另外方法的剖面圖。 佈卜錫之 外係顯示在設於晶片或晶圓之凸塊上塗佈焊錫之另 卜方去的剖面圖。 塗佈焊錫 圖i2(b)係顯示在設於晶片或晶圓之凸 另外方法的剖面圖。 塊上塗佈焊錫之另 e (c)係顯示在設於晶片或晶圓之凸 外方法的剖面圖。 :=示在未達焊接用之必要量―不足 叶物的方法之剖面圖。 圖l3(b)係顯示在未達焊接用之必要量 足，焊锡的方法之剖面圖。 、‘供給不 圖13(c)係顯示在未達焊接用之必要量的凸塊上供給不足 122280.doc -54- 200822252 之焊錫的方法之剖面圖。 足顯示在未達焊接用之必要量的凸塊上供給不 之坏锡的方法之剖面圖。 之=(::顯示在未達焊接用之必要量的凸塊上供給不足 <斗錫的方法之剖面圖。 圖13(f)係顯示在未達焊接用之必要 之焊錫的方法之剖面圖。 充上供… Γ Ο 足=係顯示在未達焊接用之必要量的凸塊上供給不 足之知錫的方法之剖面圖。 图14(a)係顯示在 而倒裝片接合之纽 壓接焊錫粒子， 之方去的剖面圖。 圖14(b)係g苜-士 子，㈣壯 凸塊與電路基板之兩方壓接焊錫粒 子/倒裝片接合之方法的剖面圖。 進：倒穿月技員不先刖技術者’且係顯示藉由Super Jarfit* 倒凌片接合方法之剖面圖。 圖i5(b)係顯示先 少一 進行倒裝片技_ 技術者，且係顯示藉由Super Jarfit法 "接合方法之剖面圖。 圖15(c)係顯示春义^ 進行倒裝片接_則技術者，且係顯示藉由Super Jarfit法 ^ 合方法之剖面圖。 圖15(d)係顯示弁二 一 進行倒裝片人刖術者，且係顯示藉由Super Jarfit法 " 妾合方法之剖面圖。 圖i5(e)係顯示先^ 進行倒裝片八則術者，且係顯示藉由Super Jarfit法 合方法之剖面圖。 圖15(f)係顯示务‘ 則技術者’且係顯示藉由Super Jarfit法 122280.doc -55- 200822252 進行倒裝片接合方法之剖面圖。 圖16⑷係顯μ #技術者， 屬粒子之各向異性導電膜的倒^人^吏用底膠中包含金 圖剛係顯示先前技術者，且:：方法之剖面圖。 金屬粒子之各向異性導係㉝不使用底膠中包含 圖16(c)係顯示先a 、、倒裝片接合方法之剖面圖。 氣、貝不先則技術者 屬粒子之各向隸導電膜的倒以接 包含金Figure 5 (4) is a cross-sectional view showing a method of crimping solder particles on a wafer-like electronic component having the same height as the sealing portion. Θ () is a cross-sectional view of a method in which a page is not pressed against solder particles on a wafer-like electronic component having the same height as the electrode and the sealing portion. Fig. 5 (g) is a cross-sectional view showing a method of crimping solder particles on a wafer-shaped electronic component having the same height as that of the sealing portion. θ () is a cross-sectional view showing another method of crimping solder particles on a wafer-shaped electronic component having the same height as the electrode and the sealing portion. Fig. 6(b) is a cross-sectional view showing another method of crimping solder particles on a wafer-like electronic component having the same height as the electrode and the sealing portion. Fig. 6 (.) is a cross-sectional view showing another method of crimping solder particles on a wafer-like electronic component having the same height as the sealing portion. = 6 (4) is a cross-sectional view showing another method of crimping solder particles on the electrode (4) portion of the height phase (4) wafer-like electronic component. Fig. 6(e) is a cross-sectional view showing another method of crimping solder particles on a wafer-like electronic component having the same height as the electrode and the sealing portion. Fig. 6(f) is a cross-sectional view showing another method of crimping the solder particles on the sub-parts of the wafer-like electricity 122280.doc 51 - 200822252 which is not the same height as the sealing portion. Fig. 7(a) is a cross-sectional view showing a method of applying solder on bumps provided on a wafer or a wafer. Fig. 7(b) is a cross-sectional view showing a method of applying solder on a bump provided on a wafer or a wafer. Fig. 7(c) is a cross-sectional view showing a method of applying solder on bumps provided on a wafer or a wafer. Fig. 7(d) is a cross-sectional view showing a method of applying solder on a bump provided on a wafer or a wafer. Fig. 7(e) is a cross-sectional view showing a method of applying solder on a bump provided on a wafer or a wafer. Fig. 7(f) is a cross-sectional view showing a method of applying solder on a bump provided on a wafer or a wafer. Fig. 7(g) is a cross-sectional view showing a method of applying solder on a bump provided on a wafer or a wafer. V Fig. 8(a) is a cross-sectional view showing another method of applying solder on bumps provided on a wafer or a wafer. Fig. 8(b) is a cross-sectional view showing another method of applying solder on bumps provided on a wafer or a wafer. Fig. 8(c) is a cross-sectional view showing a method of applying solder on a bump provided on a wafer or a wafer. Fig. 8(d) is a cross-sectional view showing a method of applying a soldering method on a bump provided on a wafer or a wafer. Fig. 8(e) is a cross-sectional view showing another method of applying solder to a bump provided on a wafer or wafer, 122280.doc-52-200822252. Fig. 8 is a cross-sectional view showing a method of providing the method outside the wafer. Fig. 8(a) is a cross-sectional view showing the method of providing the method outside the wafer. Fig. 9(a) is a cross-sectional view showing the method of providing the method outside the wafer. Fig. 9(b) is a cross-sectional view showing the method of being disposed outside the wafer. Fig. 9(e) is a cross-sectional view showing the method of being disposed outside the wafer, or by applying solder or wafer to the bump of the wafer. Figure 9(d) shows the application of solder on the bump or the bump of the wafer coated with solder on the bump or on the bump of the wafer. A cross-sectional view showing a method of applying solder on a bump provided on a wafer or a wafer. Fig. 9(e) is a cross-sectional view showing a method of applying solder on a bump provided on a wafer or a wafer. Fig. 9(f) is a cross-sectional view showing a method of applying solder on a bump provided on a wafer or a wafer. Fig. 9(g) shows a bump formed on a wafer or a wafer. A cross-sectional view of a method of applying solder to a block. Fig. 10(a) is a cross-sectional view showing a method of applying solder to a bump provided on a wafer or a wafer. Fig. 1(b) system A cross-sectional view showing another method of coating a bump on a wafer or a wafer. Figure 1 (c) shows the application of solder on a bump provided on a wafer or wafer. -53- 200822252 Cross-section of the external method. Solid 10 (d) shows a cross-sectional view of another method of applying solder on a bump provided on a wafer or wafer. Dry, Figure 10 (e) is shown in A cross-sectional view of the wafer or wafer bump coated with a constant external t, + soil, that is, a flat field. Figure 1丨 (hook system shows the application of solder on the bump provided on the wafer or wafer) A cross-sectional view of the method. Ο Ο A diagram of the application of solder on the bump of the circle U(b) is shown in a cross-sectional view of another method provided on the wafer or crystal. Figure 11 (c) of the tin is shown in A cross-sectional view of an external method of coating a bump on a wafer or wafer. Figure 1 i(d) is a cross-sectional view showing another method of bumping on a wafer or wafer. The outside of the Bub tin is shown on the wafer or A cross-sectional view of the solder on the bump of the wafer. The coated solder pattern i2(b) is a cross section showing another method of bumping on the wafer or wafer. The other part (b) of the solder coated on the block is a cross-sectional view showing the method of the convexity of the wafer or the wafer. : = A cross-sectional view showing the method of not using the necessary amount of soldering. Fig. 13(b) is a cross-sectional view showing the method of soldering the solder which is not necessary for soldering. 'Supply not Fig. 13(c) shows that the supply is less than 122280 on the bumps which are not necessary for soldering. .doc -54- 200822252 Cross-sectional view of the method of soldering. The foot shows a cross-sectional view of the method of supplying undesired tin on the bumps which are not necessary for soldering. The =(:: is shown in the case of not welding. A cross-sectional view of a method of supplying insufficient tin in the required amount of bumps. Fig. 13 (f) is a cross-sectional view showing a method of soldering which is not necessary for soldering. Filling the supply... Γ 足 Foot = is a cross-sectional view showing the method of supplying insufficient tin to the bumps that are not necessary for soldering. Fig. 14 (a) is a cross-sectional view showing the crimped solder particles in the flip chip bonding. Fig. 14(b) is a cross-sectional view showing a method of bonding the solder bumps/flip sheets to the both sides of the circuit board and the circuit board. Into: Invert the monthly technicians without first knowing the technicians' and display a cross-sectional view of the method by the Super Jarfit*. Figure i5(b) shows a cross-sectional view of the joining method by the Super Jarfit method. Fig. 15(c) shows a cross-sectional view of the spring method, which is performed by flip-chip bonding, and shows a method by the Super Jarfit method. Fig. 15(d) shows a cross-sectional view of the flip-chip manipulator, and shows a method by the Super Jarfit method. Figure i5(e) shows a cross-sectional view of the first method of flip-chip processing and shows the method by the Super Jarfit method. Fig. 15 (f) is a cross-sectional view showing the flip chip bonding method by the Super Jarfit method 122280.doc - 55 - 200822252. Fig. 16(4) shows a technique in which the anisotropic conductive film belonging to the particle contains a gold in the primer, and the gold is shown in the prior art, and: a cross-sectional view of the method. The anisotropic guide 33 of the metal particles is not included in the primer. Fig. 16(c) shows a cross-sectional view showing the first a and the flip chip bonding method. The gas is not the first, then the technician belongs to the opposite direction of the conductive film of the particles.

C Ο 圖17⑷係顯示先前技術者 ^方法之剖面圖。 錫粒子者的倒裝片接人方汰 t員不使用底膠中混合焊 〇 A ^之剖面圖。 圖17(b)係顯示先前技術者 焊錫粒子者的倒裝係顯不使用底膠中混合 々按σ方法之剖面圖。 圖17(〇係顯示先前技術者， 總物工本a j I係、暴貝$使用底膠中混合焊C Ο Figure 17(4) shows a cross-sectional view of the prior art method. The flip-chip of the tin particles is not used in the cross-section of the hybrid welding 〇 A ^ in the primer. Fig. 17 (b) is a cross-sectional view showing that the flip chip of the prior art solder paste is not mixed with the primer and is subjected to the σ method. Figure 17 (〇 shows the prior art, the total material work a j I system, the violent shell $ used in the primer welding

錫粒子者的倒裝片接合-膠U 『 一 回圖。 【主要元件符號說明】 1，101 半導體晶片（電子零件） 2 晶片狀之電子零件（電子 3 晶圓 4, 104 電路基板 5, 105 凸塊(電極部、凸塊電極 6, 106 電極（電極部、電極形成 7 密封部 11，111 焊錫粒子 12 液體 13 熔劑 122280.doc •56 200822252 21 台 31 壓板 32 加熱工具（加熱構件） 41 壓接板（突起部、包含突起部之構件） 42 壓接棒（突起部、包含突起部之構件、棒 狀構件） 51 焊錫量檢查工具 114 底膠 ϋ 122280.doc •57-The flip chip bonding of the tin particles - glue U 『 one figure. [Description of main component symbols] 1,101 Semiconductor wafer (electronic parts) 2 Wafer-shaped electronic components (electronic 3 wafer 4, 104 circuit board 5, 105 bumps (electrode part, bump electrode 6, 106 electrode (electrode part) , Electrode formation 7 Sealing part 11, 111 Solder particles 12 Liquid 13 Flux 122280.doc • 56 200822252 21 Table 31 Platen 32 Heating tool (heating member) 41 Crimp plate (protrusion, member including protrusion) 42 Crimp rod (protrusion, member including protrusion, rod member) 51 Soldering amount inspection tool 114 Primer 122280.doc • 57-

Claims (1)

200822252 十、申請專利範圍： 1· 一種電子電路之製诰方、、么 表方法，其特徵為··其係使用焊錫將 電子零件接合於電路美你μ 电浴&扳上的電子電路之製造方法，且 包含： 置焊錫粒子； 之電極部按壓抵接於 而使焊錫粒子壓接於 第一步驟，其係在台上層狀地放 第二步驟，其係將上述電子零件 被放置於上述台上之焊錫粒子上， 該電極部；及200822252 X. Patent application scope: 1. A method for manufacturing electronic circuit, which is characterized by the use of solder to bond electronic components to the circuit, the electronic circuit of the electric bath & The manufacturing method further includes: placing the solder particles; pressing the electrode portion to press the solder particles in the first step, and placing the solder layer on the stage in a second step, wherein the electronic component is placed on the electronic component The electrode portion on the solder particles on the stage; and 第三步驟，其係使用⑧接於上述電極部之焊錫粒子 將上述電子零件接合於上述電路基板上。 ’其中上述電極部係 ’其中上述電子零件 無階差或有階差地形 2·如請求項1之電子電路之製造方法 上述電子零件之凸塊電極。 3·如請求項1之電子電路之製造方法 之電極部在該電極部之形成面上， 成； 於上述第二步驟中， θ將上述電子零件之電極形成面按壓抵接於上述台上之 坏錫粒子上’而在該電極形成面上暫時壓接焊錫粒子； 再者，將上述電子零件之電極形成面壓在上述電子零 件之電極部附近形成為凸的壓板上，僅使暫時壓接之焊 錫粒子中電極部附近之焊錫粒子正式堡接後，除去未被 正式壓接之焊錫粒子。 4.如請求項丨之電子電路之製造方法，其巾上述電子愛件 之電極部在該電極部之形成面上，無階差或有階差：形 122280.doc 200822252 成； 於上述第二步驟中， 將上述電子零件之電極形成面按壓抵接於上述台上之 焊錫粒子上，而在該電極形成面上壓接烊錫粒子； 再者，藉由一面將加熱構件按壓抵接於被壓接於上述 電子零件之電極部附近以外的焊錫粒子上_面擴散被炼 化之焊錫，來除去壓接於電極部以外之焊錫粒子。 5· ^種電子電路之製造方法，其特徵為··其係使用焊锡將 電子零件接合於電路基板上的電子電路之製造方法，且 包含： 第一步驟， 第四步驟， 置於上述台上 述突起部； 其係在台上層狀地放置焊錫粒子； 其係將包含突起部之構件按壓抵接於被放 之焊錫粒子上，而使該焊錫粒子壓接於上 〇 6.In the third step, the electronic component is bonded to the circuit board by using solder particles 8 connected to the electrode portion. The above-mentioned electrode portion is in which the above-mentioned electronic component has no step or stepped terrain. 2. The method of manufacturing the electronic circuit of claim 1 is the bump electrode of the above electronic component. 3. The electrode portion of the method for manufacturing an electronic circuit according to claim 1 is formed on a surface on which the electrode portion is formed; and in the second step, θ is pressed against the electrode forming surface of the electronic component. On the bad tin particles, the solder particles are temporarily pressure-bonded on the electrode forming surface. Further, the electrode forming surface of the electronic component is pressed against the electrode portion of the electronic component to form a convex pressing plate, and only the temporary crimping is performed. After the solder particles in the vicinity of the electrode portion of the solder particles are officially bonded, the solder particles that have not been subjected to the final pressure bonding are removed. 4. The method of manufacturing the electronic circuit of claim 1, wherein the electrode portion of the electronic object of the towel has no step or step difference on the surface of the electrode portion: a shape 122280.doc 200822252; In the step, the electrode forming surface of the electronic component is pressed against the solder particles on the stage, and the tin-plated particles are pressed against the electrode forming surface; and the heating member is pressed against the surface by the heating member. The solder particles which are pressed against the vicinity of the electrode portion of the electronic component are surface-diffused with the refining solder to remove solder particles which are pressed against the electrode portion. 5. A method of manufacturing an electronic circuit, characterized in that it is a method of manufacturing an electronic circuit in which an electronic component is bonded to a circuit board using solder, and includes: a first step, a fourth step, which is placed on the above-mentioned table a protruding portion; the solder particles are placed on the top of the stage; the member comprising the protrusion is pressed against the placed solder particles, and the solder particles are crimped to the upper crucible. 第五步驟，其係將壓接於上述突起部之焊錫粒子轉印 於^述電子零件或上述電路基板之電極部上；及 第三步驟，其係使用壓接於上述電極部之焊錫粒子， 將上述電子零件接合於上述電路基板上。 如請求項5之電子電路制 I方法，其中上述包含突起 係形成有與在上述第五步驟轉印 極部的圖案相同之凹凸圖案者。 子之電 如睛未項5之電子電路之製造方法，其中上述包含突起 部之構件係其頂端面積為上述電極部程度的棒狀構件； 上^四及第五步驟係藉由重複複數次將壓接於上述 122280.doc 200822252 棒狀構件頂端的焊錫I;_ 项位子轉印於上述電極部來實施。 8·如請求項5之電子電路之製造方法，其中於上述第五步 驟中’使壓接於上述突起部之焊錫粒子溶化而轉印於上 述電極部。 9 ·如請求項1之電子電路 电吟芡方法，其中於上述第一步 驟中， ' 述口上均勻地塗佈液體後起，放置比附著於上 述液體更多之焊錫粒子，菸 、 丁 稭由自口上除去不附著於上述 液體之焊錫粒子，而形成均勻之焊錫粒子層。 10·如請求項5之電子電路 电峪方法，其中於上述第一步 驟中， k在上述台上均勻地塗佈液體後起， 述液體多之焊錫粒子，夢由自二上卜本 者上 丁 糟甶自台上除去不附著於上述液 體之知錫粒子，而形成均勾之焊錫粒子層。 11·如請求項9之電子電路之铆生古 甘占Μ 电峪灸裹每方法，其中將上述液體之 Ο 塗佈厚度形成上述焊錫粒子之直徑以下的厚度。 月求項1G之電子電路之製造方法，其中將上述液體之 塗佈厚度形成上述焊錫粒子之直徑以下的厚度。 13. -種電子電路之製造方法，其特徵為：其係^用焊錫將 電子零件接合於電路基板上的電子電路之製造方法，且 包含： 第/、步驟，其係在上述電路基板上層狀地放置焊錫粒 子； 第七步驟，其係將包含突起部之構件按壓抵接於被放 122280.doc 200822252 置於上述電路基板上之焊錫粒子上，而使該焊錫粒子壓 接於上述電路基板之電極部上；及 第一步驟，其係使用壓接於上述電極部之焊錫粒子， 將上述電子零件接合於上述電路基板上。 14·如請求項13之電子電路之製造方法，其中上述包含突起 部之構件係形成有與上述電路基板之電極部的圖案相同 之凹凸圖案者。 15. 如請求項13之電子電路之製造方法，其中上述包含突起 部之構件係其頂端面積為上述電極部程度的棒狀構件； 上述第七步驟係藉由重複數次按壓抵接上述棒狀構 件而使該焊錫粒子壓接於上述電路基板之電極部來實 施。 16. 如請求項13之電子電路之製造方法，其中上述包含突起 部之構件係包含凸塊電極之電子零件。 17. 如請求項丨3之電子電路之製造方法，其中於上述第六步 驟中， 從在上述電路基板上均勻地塗佈液體後起，放置比附 著於上述液體多之焊錫粒子，藉由自電路基板上除去不 附著於上述液體之焊錫粒子，而形成均句之焊錫粒子 層。 18·如請求項丨7之電子電路之製造方法，其中將上述液體之 塗佈厚度形成上述焊锡粒子之直徑以下的厚度。 19·如請求項1之電子電路之製造方法，其中在上述第二步 驟後，且上述第三步驟前， 122280.doc 200822252 包含第八步驟，其係檢測壓接於上述電子零件之電極 部的焊錫粒子之不^，而在檢測出焊錫粒子不足之電極 部上供給焊錫粒子； 上述第八步驟係將包含突起部之構件按壓抵接於被放 置於CT上之焊錫粒子上’使該焊錫粒子壓接於上述突起 部’並將壓接於上述突起部之焊錫粒子轉印於檢測出焊 錫粒子不足之電極部上的步驟。a fifth step of transferring solder particles pressed against the protruding portion to an electrode portion of the electronic component or the circuit substrate; and a third step of using solder particles crimped to the electrode portion, The electronic component is bonded to the circuit board. The electronic circuit manufacturing method according to claim 5, wherein the projections are formed by forming the same concave and convex pattern as the pattern of the transfer portion in the fifth step. The method for manufacturing an electronic circuit according to the item 5, wherein the member including the protrusion is a rod-shaped member whose tip end area is the extent of the electrode portion; and the upper and fourth steps are repeated by repeating a plurality of times The solder I; _ term position which is crimped to the tip of the above-mentioned 122280.doc 200822252 rod member is transferred to the above electrode portion. 8. The method of manufacturing an electronic circuit according to claim 5, wherein in the fifth step, the solder particles pressed against the protruding portion are melted and transferred to the electrode portion. 9. The electronic circuit electrical method according to claim 1, wherein in the first step, after the liquid is uniformly applied to the mouth, more solder particles are deposited than the liquid attached to the liquid, and the smoke and the straw are The solder particles not adhering to the liquid are removed from the mouth to form a uniform solder particle layer. 10. The electronic circuit electrophoresis method according to claim 5, wherein in the first step, k is uniformly applied to the liquid on the stage, and the solder particles are more liquid, and the dream is from the second Ding Ding removes the tin particles which do not adhere to the above liquid from the stage, and forms a solder particle layer of the uniform hook. 11. The electronic circuit of claim 9 wherein the electric moxibustion is coated by a method in which the thickness of the liquid is applied to a thickness below the diameter of the solder particles. A method of producing an electronic circuit according to the item 1G, wherein the coating thickness of the liquid is formed to a thickness equal to or less than a diameter of the solder particles. 13. A method of manufacturing an electronic circuit, characterized in that it is a method of manufacturing an electronic circuit in which an electronic component is bonded to a circuit board by solder, and comprises: a step of: on the upper layer of the circuit substrate And placing the solder particles on the solder substrate on the circuit substrate, and pressing the solder particles on the circuit substrate; and the step of placing the solder particles on the circuit substrate; And the first step of bonding the electronic component to the circuit board by using solder particles pressed against the electrode portion. The method of manufacturing an electronic circuit according to claim 13, wherein the member including the protruding portion is formed with a concave-convex pattern having the same pattern as that of the electrode portion of the circuit board. 15. The method of manufacturing an electronic circuit according to claim 13, wherein the member including the protrusion is a rod-shaped member having a tip end area of the electrode portion; and the seventh step is abutting the rod by repeating pressing a plurality of times The member is pressed against the electrode portion of the circuit board by pressing the solder particles. 16. The method of manufacturing an electronic circuit of claim 13, wherein the member including the protrusion is an electronic component including a bump electrode. 17. The method of manufacturing an electronic circuit according to claim 3, wherein in the sixth step, since the liquid is uniformly applied on the circuit substrate, more solder particles are attached than the liquid adhered to the liquid, Solder particles not adhering to the liquid are removed from the circuit board to form a uniform solder particle layer. 18. The method of producing an electronic circuit according to claim 7, wherein the coating thickness of the liquid is formed to a thickness equal to or less than a diameter of the solder particles. 19. The method of manufacturing the electronic circuit of claim 1, wherein after the second step, and before the third step, 122280.doc 200822252 includes an eighth step of detecting crimping to the electrode portion of the electronic component. Solder particles are supplied to the electrode portion where the solder particles are insufficient, and the eighth step is to press the member including the protrusion against the solder particles placed on the CT. The step of crimping the protrusions ' and transferring the solder particles pressed against the protrusions to the electrode portions where the solder particles are insufficient is transferred. 20.如請求項5之電子電路之製造方法，其中在上述第五步 驟後，且上述第三步驟前， 包含第八步驟，其係檢測壓接於上述電子零件或上述 電路基板之電極部的焊錫粒子之不足，而在檢測出焊錫 粒子不足之電極部上供給焊錫粒子； 上述第八步驟係將包含突起部之構件按壓抵接於被放 置於口上之焊錫粒子上’使該焊錫粒子壓接於上述突起 口P並將壓接於上述突起部之焊錫粒子轉印於檢測出焊 錫粒子不足之電極部上的步驟。 21·如請求項13之電子電路之製造方法，其中在上述第七步 驟後，且上述第三步驟前， 部 包a第八步驟’其係檢㈣接於上述電路基板之電極 的焊錫粒子之不足，而在檢測出焊錫粒子不足之電極 部上供給焊錫粒子； 置 部 上述第八步驟係將包含突起部之構件按壓抵接於被放 於台上之焊錫粒子上，使該焊錫粒子壓接於上述突起 並將壓接於上述突起部之焊錫粒子轉印於檢測出焊 122280.doc 200822252 錫粒子不足之電極部上的步驟。 22· —種電子電路之製造方法，其 電子零件接合於電路基板上的電子上.其係使用焊錫將 板上的電子電路之製造方法，且 才 以$^方法’使附著於上述電子零件之電 =焊錫粒子炫化，焊錫預塗佈上述電子零件之 Γ 二=二述…… 電極部； …錫預塗佈上述電路基板之 在使電極部以焊錫預塗佈之上述電子零件與上述電路 基板相對而接觸之狀態下，使上述焊錫熔化，藉由作用 ㈣焊錫之表面張力，使上述電子零件與上述電路基板 定位。 23·種電子電路之製造方法，其特徵為··其係使用焊錫將 電:零件接合於電路基板上的電子電路之製造方法，且 (j 冑由如w求項5之方法，使附著於上述電子零件之電 極部的焊錫粒子溶化’而以蟬錫預塗佈上述電子零件之 電極部； 错由如請求項5之#法，使附著於上述電路基板之電 才"P的丈于錫粒子炼化，❿以焊錫預塗佈上述電路基板之 電極部； 在使電極部以焊錫預塗佈之上述電子零件與上述電路 基板：對而接觸之狀態下，使上述焊錫熔化，藉由作用 於該知錫之表面張力，使上述電子零件與上述電路基板 122280.doc 200822252 定位。 24· 一種電子電路之製造方法，其特徵為··其係使用焊踢將 電:零件接合於電路基板上的電子電路之製造方法，且 藉由如明求項！之方法，使附著於上述電子零件之電 極部的焊❹㈣化，心㈣職佈上 電極部； ，使附著於上述電路基板之電 以焊錫預塗佈上述電路基板之20. The method of manufacturing an electronic circuit according to claim 5, wherein after the fifth step and before the third step, the eighth step includes detecting an electrode portion crimped to the electronic component or the electrode portion of the circuit substrate. In the case where the solder particles are insufficient, the solder particles are supplied to the electrode portion where the solder particles are insufficient. In the eighth step, the member including the protrusion is pressed against the solder particles placed on the port to crimp the solder particles. The protrusions P are transferred to the electrode portions that are pressed against the protrusions, and are transferred to the electrode portions where the solder particles are insufficient. 21. The method of manufacturing an electronic circuit according to claim 13, wherein after the seventh step and before the third step, the eighth step of the package a is performed (four) solder particles attached to the electrodes of the circuit substrate. Insufficient, the solder particles are supplied to the electrode portion where the solder particles are insufficient. In the eighth step, the member including the protrusion is pressed against the solder particles placed on the stage, and the solder particles are crimped. The protrusions are transferred to the electrode portions which are pressed against the protrusions and are transferred to the electrode portions where the solder particles 122280.doc 200822252 are insufficient. 22. A method of manufacturing an electronic circuit, wherein an electronic component is bonded to an electron on a circuit board. The method of manufacturing the electronic circuit on the board using solder is attached to the electronic component by a method of Electric=solder particle smashing, solder pre-coating the above-mentioned electronic component Γ2=2... Electrode part; ... tin pre-coating the above-mentioned electronic component and the above-mentioned electronic circuit in which the electrode part is pre-coated with solder The solder is melted while the substrate is in contact with each other, and the electronic component and the circuit board are positioned by acting on the surface tension of the solder. 23. A method of manufacturing an electronic circuit, characterized in that it is a method for manufacturing an electronic circuit in which solder is used to bond a component to a circuit board, and (j 胄 is adhered to by the method of claim 5; The solder particles of the electrode portion of the electronic component are melted, and the electrode portion of the electronic component is pre-coated with antimony tin. The error is caused by the method of claim 5, and the electric component attached to the circuit substrate is Refining the tin particles, pre-coating the electrode portion of the circuit board with solder, and melting the solder in a state where the electronic component pre-coated with the electrode portion and the circuit substrate are in contact with each other Acting on the surface tension of the known tin, positioning the electronic component and the circuit board 122280.doc 200822252. 24) A method of manufacturing an electronic circuit, characterized in that it uses a welding kick to electrically: a component is bonded to a circuit substrate In the method of manufacturing the electronic circuit, the soldering wire attached to the electrode portion of the electronic component is formed by the method of the method of the present invention, and the electrode portion is placed on the core (4); The circuit board is electrically coated with solder to pre-coat the circuit board 藉由如請求項13之方法 極部的焊錫粒子熔化，而 電極部； 在使電極部以焊錫預塗佈 基板相對而接觸之狀態下， 於該焊錫之表面張力，使上 定位。 之上述電子零件與上述電路 使上述焊錫溶化，藉由作用 述電子零件與上述電路基板 種電子電路之製造方法’其特徵為··其係使用焊锡將 電子零件接合於電路基板上的電子電路之製造方法，且 〇 #由如請求項5之m吏附著於上述電？零件之電 極部的焊錫粒子炼化’而以悍錫預塗佈上述電子零件之 電極部； 藉由如請求項Π之方法，使附著於上述電路基板之電 極部的焊錫粒子溶化’而以焊錫預塗佈上述電路基板之 電極部； 在使電極部以焊錫預塗佈之上述電子零件與上述電路 基板相對而接觸之狀態下，使上述焊錫熔化，藉由作用 於忒烊錫之表面張力，使上述電子零件與上述電路基板 122280.doc 200822252 26. 定位。 :種電子電路之製造方法，其特徵為 半導體元件接合於電路基板上的電法，且 :其係使用焊錫將 子電路之製造方 27.The solder particles of the electrode portion of the method of claim 13 are melted, and the electrode portion is positioned in contact with the surface of the solder in a state where the electrode portion is brought into contact with the solder precoated substrate. The above-described electronic component and the above-described circuit dissolve the solder, and the electronic component and the circuit board type electronic circuit manufacturing method described above are characterized in that the electronic component is bonded to the electronic circuit on the circuit board by using solder. The manufacturing method, and 〇# is attached to the above electricity by the m吏 of the request item 5? The solder particles of the electrode portion of the component are refining and soldering, and the electrode portion of the electronic component is pre-coated with antimony tin; and the solder particles adhering to the electrode portion of the circuit board are melted by the method of claim 而The electrode portion of the circuit board is precoated; and the solder is melted in a state in which the electronic component pre-coated with the electrode portion is in contact with the circuit board, and the surface tension is applied to the surface of the solder. The electronic component is positioned with the circuit board 122280.doc 200822252 26. A method of manufacturing an electronic circuit characterized by an electrical method in which a semiconductor element is bonded to a circuit board, and: a method of manufacturing a sub-circuit using solder. ▲在將上述半導體元件接合於上述電路基板時， 明求項1〜25中任一項之電子電路之製造方法。 一種半導體裝置，其特徵為：其係藉由如請求項 任一項之電子電路之製造方法來製造。 使用如 1〜25中 28. 29.▲ The method of manufacturing the electronic circuit according to any one of items 1 to 25, wherein the semiconductor element is bonded to the circuit board. A semiconductor device characterized in that it is manufactured by the method of manufacturing an electronic circuit according to any one of the claims. Use as in 1~25 28. 29. 30. 一種半導體裝置，其特徵為：其係藉由如請求項26之電 子電路之製造方法來製造。 :種電子電路之製造裝置，其特徵為：其係❹焊錫將 電子零件接合於電路基板上的電子電路之製造裝置，且 二將上述電子零件之電極部按壓抵接於被層狀地放置於 台上的焊錫粒子上，使焊錫粒子壓接於該電極部； 使用接於上述電極部之焊錫粒+，將上述電子零件 接合於上述電路基板上。 ^ -種電子電路之製造裝置，其特徵為··其係使用焊錫將 電子零件接合於電路基板上的電子電路之製造裝置，且 將包含突起部之構件按壓抵接於被層狀地放置於台上 之焊錫粒子上，使該焊錫粒子壓接於上述突起部； 使壓接於上述突起部之焊錫粒子轉印於上述電子零件 或上述電路基板之電極部上； 使用壓接於上述電極部之焊錫粒子，將上述電子零件 接合於上述電路基板上。 7 122280.doc 200822252 3 1. —種電子電路之製造裝置，其特徵為：其係使用焊錫將 電子零件接合於電路基板上的電子電路之製造裝置，且 在電路基板上層狀地放置焊錫粒子； 將包含突起部之構件按壓抵接於被放置於上述電路基 板上之焊錫粒子上，使該焊錫粒子壓接於上述電路基板 之電極部； 使用壓接於上述電極部之焊錫粒子，將上述電子零件 接合於上述電路基板上。 G 122280.docA semiconductor device characterized in that it is manufactured by a method of manufacturing an electronic circuit as claimed in claim 26. An apparatus for manufacturing an electronic circuit, characterized in that the solder is a device for manufacturing an electronic circuit in which an electronic component is bonded to a circuit board, and the electrode portion of the electronic component is pressed against the layered layer. Solder particles are pressure-bonded to the electrode portion on the solder particles on the stage, and the electronic component is bonded to the circuit board by using solder particles + attached to the electrode portion. A manufacturing apparatus for an electronic circuit, characterized in that it is a manufacturing apparatus of an electronic circuit in which an electronic component is bonded to a circuit board by using solder, and a member including the protrusion is pressed against the layered layer. Solder particles are pressure-bonded to the protrusions on the solder particles on the stage, and solder particles pressed against the protrusions are transferred onto the electronic component or the electrode portion of the circuit board; and the electrode portion is crimped to the electrode portion. The solder particles are bonded to the circuit board by the electronic component. 7 122280.doc 200822252 3 1. A manufacturing apparatus for an electronic circuit, characterized in that it is a manufacturing apparatus for bonding an electronic component to an electronic circuit on a circuit board using solder, and placing solder particles layerwise on the circuit substrate And pressing and pressing a member including the protrusion on the solder particles placed on the circuit board, and pressing the solder particles against the electrode portion of the circuit board; and using the solder particles pressed against the electrode portion The electronic component is bonded to the above circuit board. G 122280.doc
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