TW200737407A - Semiconductor device and method of manufacturing semiconductor device - Google Patents
Semiconductor device and method of manufacturing semiconductor deviceInfo
- Publication number
- TW200737407A TW200737407A TW095141557A TW95141557A TW200737407A TW 200737407 A TW200737407 A TW 200737407A TW 095141557 A TW095141557 A TW 095141557A TW 95141557 A TW95141557 A TW 95141557A TW 200737407 A TW200737407 A TW 200737407A
- Authority
- TW
- Taiwan
- Prior art keywords
- semiconductor device
- film
- wiring
- conductor
- manganese
- Prior art date
Links
- 239000004065 semiconductor Substances 0.000 title 2
- 238000004519 manufacturing process Methods 0.000 title 1
- 230000004888 barrier function Effects 0.000 abstract 2
- 239000004020 conductor Substances 0.000 abstract 2
- ASTZLJPZXLHCSM-UHFFFAOYSA-N dioxido(oxo)silane;manganese(2+) Chemical compound [Mn+2].[O-][Si]([O-])=O ASTZLJPZXLHCSM-UHFFFAOYSA-N 0.000 abstract 2
- 238000009413 insulation Methods 0.000 abstract 2
- PWHULOQIROXLJO-UHFFFAOYSA-N Manganese Chemical compound [Mn] PWHULOQIROXLJO-UHFFFAOYSA-N 0.000 abstract 1
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 abstract 1
- 229910052748 manganese Inorganic materials 0.000 abstract 1
- 239000011572 manganese Substances 0.000 abstract 1
- 229910052814 silicon oxide Inorganic materials 0.000 abstract 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
- H01L23/53204—Conductive materials
- H01L23/53209—Conductive materials based on metals, e.g. alloys, metal silicides
- H01L23/53228—Conductive materials based on metals, e.g. alloys, metal silicides the principal metal being copper
- H01L23/53238—Additional layers associated with copper layers, e.g. adhesion, barrier, cladding layers
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76829—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
- H01L21/76831—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers in via holes or trenches, e.g. non-conductive sidewall liners
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76829—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
- H01L21/76834—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers formation of thin insulating films on the sidewalls or on top of conductors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76843—Barrier, adhesion or liner layers formed in openings in a dielectric
- H01L21/76849—Barrier, adhesion or liner layers formed in openings in a dielectric the layer being positioned on top of the main fill metal
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76853—Barrier, adhesion or liner layers characterized by particular after-treatment steps
- H01L21/76861—Post-treatment or after-treatment not introducing additional chemical elements into the layer
- H01L21/76864—Thermal treatment
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76867—Barrier, adhesion or liner layers characterized by methods of formation other than PVD, CVD or deposition from a liquids
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76871—Layers specifically deposited to enhance or enable the nucleation of further layers, i.e. seed layers
- H01L21/76873—Layers specifically deposited to enhance or enable the nucleation of further layers, i.e. seed layers for electroplating
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76886—Modifying permanently or temporarily the pattern or the conductivity of conductive members, e.g. formation of alloys, reduction of contact resistances
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
- H01L23/5329—Insulating materials
- H01L23/53295—Stacked insulating layers
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
- H01L21/76807—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics for dual damascene structures
- H01L21/76808—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics for dual damascene structures involving intermediate temporary filling with material
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2005335309A JP4529880B2 (ja) | 2005-11-21 | 2005-11-21 | 半導体装置および半導体装置の製造方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
TW200737407A true TW200737407A (en) | 2007-10-01 |
TWI371083B TWI371083B (zh) | 2012-08-21 |
Family
ID=38112615
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW095141557A TW200737407A (en) | 2005-11-21 | 2006-11-09 | Semiconductor device and method of manufacturing semiconductor device |
Country Status (5)
Country | Link |
---|---|
US (1) | US8035230B2 (zh) |
JP (1) | JP4529880B2 (zh) |
KR (1) | KR20070053636A (zh) |
CN (1) | CN1971901B (zh) |
TW (1) | TW200737407A (zh) |
Families Citing this family (28)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP5103914B2 (ja) * | 2007-01-31 | 2012-12-19 | 富士通セミコンダクター株式会社 | 半導体装置の製造方法及び半導体装置 |
JP5288734B2 (ja) * | 2007-06-22 | 2013-09-11 | ローム株式会社 | 半導体装置およびその製造方法 |
WO2009001780A1 (ja) * | 2007-06-22 | 2008-12-31 | Rohm Co., Ltd. | 半導体装置およびその製造方法 |
US8168532B2 (en) | 2007-11-14 | 2012-05-01 | Fujitsu Limited | Method of manufacturing a multilayer interconnection structure in a semiconductor device |
JP2009141058A (ja) * | 2007-12-05 | 2009-06-25 | Fujitsu Microelectronics Ltd | 半導体装置およびその製造方法 |
JP2010073736A (ja) * | 2008-09-16 | 2010-04-02 | Rohm Co Ltd | 半導体装置の製造方法 |
JP2010098195A (ja) * | 2008-10-17 | 2010-04-30 | Hitachi Cable Ltd | 配線構造及び配線構造の製造方法 |
JP5532578B2 (ja) * | 2008-10-21 | 2014-06-25 | 富士通セミコンダクター株式会社 | 半導体装置の製造方法 |
JP5396854B2 (ja) * | 2008-12-25 | 2014-01-22 | 富士通セミコンダクター株式会社 | 半導体装置の製造方法 |
US8653664B2 (en) * | 2009-07-08 | 2014-02-18 | Taiwan Semiconductor Manufacturing Company, Ltd. | Barrier layers for copper interconnect |
US8313659B2 (en) * | 2009-07-10 | 2012-11-20 | Seagate Technology Llc | Fabrication of multi-dimensional microstructures |
US8531033B2 (en) | 2009-09-07 | 2013-09-10 | Advanced Interconnect Materials, Llc | Contact plug structure, semiconductor device, and method for forming contact plug |
US8653663B2 (en) | 2009-10-29 | 2014-02-18 | Taiwan Semiconductor Manufacturing Company, Ltd. | Barrier layer for copper interconnect |
US8361900B2 (en) | 2010-04-16 | 2013-01-29 | Taiwan Semiconductor Manufacturing Company, Ltd. | Barrier layer for copper interconnect |
US8492289B2 (en) | 2010-09-15 | 2013-07-23 | International Business Machines Corporation | Barrier layer formation for metal interconnects through enhanced impurity diffusion |
US8461683B2 (en) * | 2011-04-01 | 2013-06-11 | Intel Corporation | Self-forming, self-aligned barriers for back-end interconnects and methods of making same |
US20130307153A1 (en) | 2012-05-18 | 2013-11-21 | International Business Machines Corporation | Interconnect with titanium-oxide diffusion barrier |
US9054109B2 (en) * | 2012-05-29 | 2015-06-09 | International Business Machines Corporation | Corrosion/etching protection in integration circuit fabrications |
CN103515297B (zh) * | 2012-06-28 | 2016-03-30 | 中芯国际集成电路制造(上海)有限公司 | 一种半导体器件的制造方法 |
JP6030439B2 (ja) * | 2012-12-27 | 2016-11-24 | 東京エレクトロン株式会社 | マンガン含有膜の形成方法、処理システム、および電子デバイスの製造方法 |
JP2014141739A (ja) * | 2012-12-27 | 2014-08-07 | Tokyo Electron Ltd | 金属マンガン膜の成膜方法、処理システム、電子デバイスの製造方法および電子デバイス |
US9343400B2 (en) * | 2013-03-13 | 2016-05-17 | Taiwan Semiconductor Manufacturing Company, Ltd. | Dual damascene gap filling process |
US20150137372A1 (en) * | 2013-11-15 | 2015-05-21 | Globalfoundries Inc. | Self forming barrier layer and method of forming |
US9997457B2 (en) | 2013-12-20 | 2018-06-12 | Intel Corporation | Cobalt based interconnects and methods of fabrication thereof |
US20150255331A1 (en) * | 2014-03-04 | 2015-09-10 | GlobalFoundries, Inc. | Integrated circuits with a copper and manganese component and methods for producing such integrated circuits |
US9728502B2 (en) | 2014-11-10 | 2017-08-08 | Samsung Electronics Co., Ltd. | Metal oxysilicate diffusion barriers for damascene metallization with low RC delays and methods for forming the same |
US10446496B2 (en) | 2016-02-17 | 2019-10-15 | International Business Machines Corporation | Self-forming barrier for cobalt interconnects |
US10319629B1 (en) * | 2018-05-08 | 2019-06-11 | International Business Machines Corporation | Skip via for metal interconnects |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6461225B1 (en) * | 2000-04-11 | 2002-10-08 | Agere Systems Guardian Corp. | Local area alloying for preventing dishing of copper during chemical-mechanical polishing (CMP) |
JP4478038B2 (ja) * | 2004-02-27 | 2010-06-09 | 株式会社半導体理工学研究センター | 半導体装置及びその製造方法 |
JP4679270B2 (ja) * | 2005-06-30 | 2011-04-27 | 株式会社東芝 | 半導体装置およびその製造方法 |
JP2007012996A (ja) * | 2005-07-01 | 2007-01-18 | Toshiba Corp | 半導体装置 |
-
2005
- 2005-11-21 JP JP2005335309A patent/JP4529880B2/ja active Active
-
2006
- 2006-11-09 TW TW095141557A patent/TW200737407A/zh unknown
- 2006-11-20 US US11/561,590 patent/US8035230B2/en active Active
- 2006-11-21 CN CN2006101457791A patent/CN1971901B/zh active Active
- 2006-11-21 KR KR1020060115005A patent/KR20070053636A/ko not_active Application Discontinuation
Also Published As
Publication number | Publication date |
---|---|
CN1971901B (zh) | 2010-10-27 |
TWI371083B (zh) | 2012-08-21 |
CN1971901A (zh) | 2007-05-30 |
JP4529880B2 (ja) | 2010-08-25 |
US20080142974A1 (en) | 2008-06-19 |
KR20070053636A (ko) | 2007-05-25 |
US8035230B2 (en) | 2011-10-11 |
JP2007142236A (ja) | 2007-06-07 |
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