TW200731432A - Semiconductor device and manufacturing method for the same - Google Patents
Semiconductor device and manufacturing method for the sameInfo
- Publication number
- TW200731432A TW200731432A TW095118777A TW95118777A TW200731432A TW 200731432 A TW200731432 A TW 200731432A TW 095118777 A TW095118777 A TW 095118777A TW 95118777 A TW95118777 A TW 95118777A TW 200731432 A TW200731432 A TW 200731432A
- Authority
- TW
- Taiwan
- Prior art keywords
- semiconductor device
- conductive layer
- manufacturing
- insulating film
- interconnection
- Prior art date
Links
- 239000004065 semiconductor Substances 0.000 title abstract 6
- 238000004519 manufacturing process Methods 0.000 title abstract 2
- 239000011347 resin Substances 0.000 abstract 3
- 229920005989 resin Polymers 0.000 abstract 3
- 239000000758 substrate Substances 0.000 abstract 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 abstract 1
- 238000000034 method Methods 0.000 abstract 1
- 229910052710 silicon Inorganic materials 0.000 abstract 1
- 239000010703 silicon Substances 0.000 abstract 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
- H01L23/3114—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed the device being a chip scale package, e.g. CSP
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/12—Mountings, e.g. non-detachable insulating substrates
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L24/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/023—Redistribution layers [RDL] for bonding areas
- H01L2224/0231—Manufacturing methods of the redistribution layers
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/0401—Bonding areas specifically adapted for bump connectors, e.g. under bump metallisation [UBM]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0555—Shape
- H01L2224/05556—Shape in side view
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/13099—Material
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01004—Beryllium [Be]
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- H—ELECTRICITY
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01005—Boron [B]
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- H—ELECTRICITY
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01006—Carbon [C]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01013—Aluminum [Al]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01023—Vanadium [V]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01029—Copper [Cu]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01033—Arsenic [As]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01078—Platinum [Pt]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01082—Lead [Pb]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/013—Alloys
- H01L2924/014—Solder alloys
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/156—Material
- H01L2924/15786—Material with a principal constituent of the material being a non metallic, non metalloid inorganic material
- H01L2924/15787—Ceramics, e.g. crystalline carbides, nitrides or oxides
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2006028850A JP5017872B2 (ja) | 2006-02-06 | 2006-02-06 | 半導体装置及びその製造方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
TW200731432A true TW200731432A (en) | 2007-08-16 |
TWI305393B TWI305393B (en) | 2009-01-11 |
Family
ID=38427359
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW095118777A TWI305393B (en) | 2006-02-06 | 2006-05-26 | Semiconductor device and manufacturing method for the same |
Country Status (5)
Country | Link |
---|---|
US (1) | US7365434B2 (zh) |
JP (1) | JP5017872B2 (zh) |
KR (1) | KR100735074B1 (zh) |
CN (1) | CN100477192C (zh) |
TW (1) | TWI305393B (zh) |
Families Citing this family (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2008047732A (ja) * | 2006-08-17 | 2008-02-28 | Sony Corp | 半導体装置及びその製造方法 |
JP2009135345A (ja) * | 2007-11-30 | 2009-06-18 | Fujikura Ltd | 半導体装置及びその製造方法 |
JP5627097B2 (ja) * | 2009-10-07 | 2014-11-19 | ルネサスエレクトロニクス株式会社 | 配線基板 |
US8647974B2 (en) | 2011-03-25 | 2014-02-11 | Ati Technologies Ulc | Method of fabricating a semiconductor chip with supportive terminal pad |
CN102522342A (zh) * | 2011-12-27 | 2012-06-27 | 日月光半导体制造股份有限公司 | 半导体结构及其制造方法 |
JP6211855B2 (ja) * | 2013-09-03 | 2017-10-11 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
JP6635328B2 (ja) * | 2014-11-10 | 2020-01-22 | ローム株式会社 | 半導体装置およびその製造方法 |
US10665559B2 (en) * | 2018-04-11 | 2020-05-26 | Taiwan Semiconductor Manufacturing Co., Ltd. | Device, semiconductor package and method of manufacturing semiconductor package |
JP7226472B2 (ja) | 2020-05-26 | 2023-02-21 | 株式会社村田製作所 | 部品相互接続要素を備えた電子部品 |
Family Cites Families (15)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS63141330A (ja) * | 1986-12-03 | 1988-06-13 | Nec Corp | 半導体集積回路装置 |
US5215863A (en) * | 1987-12-18 | 1993-06-01 | Nippon Kayaku Kabushiki Kaisha | Resin composition and solder resist composition |
JPH05226339A (ja) * | 1992-01-28 | 1993-09-03 | Nec Corp | 樹脂封止半導体装置 |
JP2674567B2 (ja) * | 1995-05-31 | 1997-11-12 | 日本電気株式会社 | 半導体装置 |
JPH11330121A (ja) * | 1998-05-14 | 1999-11-30 | Sanyo Electric Co Ltd | 半導体装置とその製造方法 |
JP3750468B2 (ja) | 2000-03-01 | 2006-03-01 | セイコーエプソン株式会社 | 半導体ウエハーの製造方法及び半導体装置 |
KR20010105769A (ko) * | 2000-05-18 | 2001-11-29 | 윤종용 | 웨이퍼 레벨 칩 스케일 패키지와 그 제조 방법 |
JP4361223B2 (ja) | 2001-03-19 | 2009-11-11 | 株式会社フジクラ | 半導体パッケージ |
JP4248761B2 (ja) * | 2001-04-27 | 2009-04-02 | 新光電気工業株式会社 | 半導体パッケージ及びその製造方法並びに半導体装置 |
KR100447968B1 (ko) | 2001-08-07 | 2004-09-10 | 주식회사 하이닉스반도체 | 웨이퍼 레벨 패키지의 제조방법 |
JP2003100744A (ja) | 2001-09-21 | 2003-04-04 | Ricoh Co Ltd | 半導体装置及びその製造方法 |
JP2004022653A (ja) * | 2002-06-13 | 2004-01-22 | Denso Corp | 半導体装置 |
US20030218246A1 (en) * | 2002-05-22 | 2003-11-27 | Hirofumi Abe | Semiconductor device passing large electric current |
JP2004071679A (ja) * | 2002-08-02 | 2004-03-04 | Matsushita Electric Ind Co Ltd | 半導体素子の電極およびその製造方法 |
JP2005150578A (ja) * | 2003-11-19 | 2005-06-09 | Renesas Technology Corp | 半導体装置及びその製造方法 |
-
2006
- 2006-02-06 JP JP2006028850A patent/JP5017872B2/ja not_active Expired - Fee Related
- 2006-05-26 TW TW095118777A patent/TWI305393B/zh not_active IP Right Cessation
- 2006-05-26 US US11/441,067 patent/US7365434B2/en not_active Expired - Fee Related
- 2006-05-30 KR KR1020060048946A patent/KR100735074B1/ko active IP Right Grant
- 2006-06-22 CN CNB2006100940718A patent/CN100477192C/zh not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
CN101017804A (zh) | 2007-08-15 |
JP5017872B2 (ja) | 2012-09-05 |
US20070194445A1 (en) | 2007-08-23 |
JP2007208209A (ja) | 2007-08-16 |
KR100735074B1 (ko) | 2007-07-06 |
TWI305393B (en) | 2009-01-11 |
CN100477192C (zh) | 2009-04-08 |
US7365434B2 (en) | 2008-04-29 |
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Legal Events
Date | Code | Title | Description |
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MM4A | Annulment or lapse of patent due to non-payment of fees |