TW200729399A - A structure for a semiconductor device and a method of manufacturing the same - Google Patents
A structure for a semiconductor device and a method of manufacturing the sameInfo
- Publication number
- TW200729399A TW200729399A TW095133697A TW95133697A TW200729399A TW 200729399 A TW200729399 A TW 200729399A TW 095133697 A TW095133697 A TW 095133697A TW 95133697 A TW95133697 A TW 95133697A TW 200729399 A TW200729399 A TW 200729399A
- Authority
- TW
- Taiwan
- Prior art keywords
- conductive
- passage
- copper region
- semiconductor device
- manufacturing
- Prior art date
Links
- 238000004519 manufacturing process Methods 0.000 title abstract 2
- 239000004065 semiconductor Substances 0.000 title abstract 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical group [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 abstract 3
- 230000004888 barrier function Effects 0.000 abstract 3
- 229910052802 copper Inorganic materials 0.000 abstract 3
- 239000010949 copper Substances 0.000 abstract 3
- 239000002305 electric material Substances 0.000 abstract 2
- 238000009792 diffusion process Methods 0.000 abstract 1
- 239000000463 material Substances 0.000 abstract 1
- 239000011148 porous material Substances 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76822—Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc.
- H01L21/76823—Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc. transforming an insulating layer into a conductive layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76822—Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc.
- H01L21/76826—Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc. by contacting the layer with gases, liquids or plasmas
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76829—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
- H01L21/76831—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers in via holes or trenches, e.g. non-conductive sidewall liners
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76843—Barrier, adhesion or liner layers formed in openings in a dielectric
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76867—Barrier, adhesion or liner layers characterized by methods of formation other than PVD, CVD or deposition from a liquids
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
- H01L21/76807—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics for dual damascene structures
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Plasma & Fusion (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Electrodes Of Semiconductors (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP05300749 | 2005-09-15 |
Publications (1)
Publication Number | Publication Date |
---|---|
TW200729399A true TW200729399A (en) | 2007-08-01 |
Family
ID=37865334
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW095133697A TW200729399A (en) | 2005-09-15 | 2006-09-12 | A structure for a semiconductor device and a method of manufacturing the same |
Country Status (7)
Country | Link |
---|---|
US (1) | US7928006B2 (zh) |
EP (1) | EP1927134A2 (zh) |
JP (1) | JP2009509322A (zh) |
KR (1) | KR20080047456A (zh) |
CN (1) | CN101263591A (zh) |
TW (1) | TW200729399A (zh) |
WO (1) | WO2007031922A2 (zh) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US11521916B2 (en) | 2020-11-02 | 2022-12-06 | Nanya Technology Corporation | Method for fabricating semiconductor device with etch stop layer having greater thickness |
Families Citing this family (15)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8202798B2 (en) * | 2007-09-20 | 2012-06-19 | Freescale Semiconductor, Inc. | Improvements for reducing electromigration effect in an integrated circuit |
KR102096109B1 (ko) * | 2009-07-03 | 2020-04-01 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | 반도체 장치의 제작 방법 |
JP2012059958A (ja) * | 2010-09-09 | 2012-03-22 | Rohm Co Ltd | 半導体装置およびその製造方法 |
US8754527B2 (en) * | 2012-07-31 | 2014-06-17 | International Business Machines Corporation | Self aligned borderless contact |
CN103779267B (zh) * | 2012-10-25 | 2017-03-01 | 中芯国际集成电路制造(上海)有限公司 | 一种半导体结构的形成方法 |
JP6013901B2 (ja) * | 2012-12-20 | 2016-10-25 | 東京エレクトロン株式会社 | Cu配線の形成方法 |
US8916469B2 (en) * | 2013-03-12 | 2014-12-23 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method of fabricating copper damascene |
US20150111373A1 (en) * | 2013-10-18 | 2015-04-23 | GlobalFoundries, Inc. | Reducing gate height variation in rmg process |
US9859157B1 (en) | 2016-07-14 | 2018-01-02 | International Business Machines Corporation | Method for forming improved liner layer and semiconductor device including the same |
US9972672B1 (en) * | 2017-01-11 | 2018-05-15 | International Business Machines Corporation | Tunable resistor with curved resistor elements |
US9991330B1 (en) | 2017-01-11 | 2018-06-05 | International Business Machines Corporation | Resistors with controlled resistivity |
US10283583B2 (en) | 2017-01-11 | 2019-05-07 | International Business Machines Corporation | 3D resistor structure with controlled resistivity |
US10381315B2 (en) | 2017-11-16 | 2019-08-13 | Samsung Electronics Co., Ltd. | Method and system for providing a reverse-engineering resistant hardware embedded security module |
US11532698B2 (en) * | 2019-09-11 | 2022-12-20 | Taiwan Semiconductor Manufacturing Company, Ltd. | Diffusion barrier layer in top electrode to increase break down voltage |
CN113206035A (zh) * | 2020-02-03 | 2021-08-03 | 广东汉岂工业技术研发有限公司 | 基于beol工艺的集成电路结构及其形成方法 |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2748601B1 (fr) * | 1996-05-07 | 1998-07-24 | Sgs Thomson Microelectronics | Procede de formation d'interconnexions dans un circuit integre |
US6268288B1 (en) * | 1999-04-27 | 2001-07-31 | Tokyo Electron Limited | Plasma treated thermal CVD of TaN films from tantalum halide precursors |
US6482733B2 (en) * | 2000-05-15 | 2002-11-19 | Asm Microchemistry Oy | Protective layers prior to alternating layer deposition |
US6951804B2 (en) | 2001-02-02 | 2005-10-04 | Applied Materials, Inc. | Formation of a tantalum-nitride layer |
-
2006
- 2006-09-08 WO PCT/IB2006/053184 patent/WO2007031922A2/en active Application Filing
- 2006-09-08 US US12/066,704 patent/US7928006B2/en not_active Expired - Fee Related
- 2006-09-08 JP JP2008530688A patent/JP2009509322A/ja not_active Withdrawn
- 2006-09-08 EP EP06795973A patent/EP1927134A2/en not_active Withdrawn
- 2006-09-08 KR KR1020087008851A patent/KR20080047456A/ko not_active Application Discontinuation
- 2006-09-08 CN CNA2006800338261A patent/CN101263591A/zh active Pending
- 2006-09-12 TW TW095133697A patent/TW200729399A/zh unknown
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US11521916B2 (en) | 2020-11-02 | 2022-12-06 | Nanya Technology Corporation | Method for fabricating semiconductor device with etch stop layer having greater thickness |
TWI793712B (zh) * | 2020-11-02 | 2023-02-21 | 南亞科技股份有限公司 | 半導體元件 |
Also Published As
Publication number | Publication date |
---|---|
WO2007031922A2 (en) | 2007-03-22 |
EP1927134A2 (en) | 2008-06-04 |
US7928006B2 (en) | 2011-04-19 |
KR20080047456A (ko) | 2008-05-28 |
US20080251921A1 (en) | 2008-10-16 |
JP2009509322A (ja) | 2009-03-05 |
WO2007031922A3 (en) | 2007-08-30 |
CN101263591A (zh) | 2008-09-10 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
TW200729399A (en) | A structure for a semiconductor device and a method of manufacturing the same | |
JP2010258215A5 (ja) | 半導体装置 | |
TW200636849A (en) | Reliable BEOL integration process with direct CMP of porous SiCOH dielectric | |
TW200711038A (en) | Method of forming a semiconductor device having a diffusion barrier stack and structure thereof | |
TWI248163B (en) | Method for forming a dielectric barrier in an integrated circuit structure, interconnect structure and semiconductor device and methods for making the same | |
TWI268595B (en) | Damascene structure and process at semiconductor substrate level | |
TW200603331A (en) | Method of manufacturing a semiconductor device | |
TW200729394A (en) | A method of forming a layer over a surface of a first material embedded in a second material in a structure for a semiconductor device | |
TW200741829A (en) | Methods of forming through-wafer interconnects and structures resulting therefrom | |
TW200614518A (en) | Semiconductor device and method of manufacturing the same | |
SG157351A1 (en) | Hybrid conductive vias including small dimension active surface ends and larger dimension back side ends, semiconductor devices including the same, and associated methods | |
JP2010258213A5 (ja) | 半導体装置 | |
TW200629467A (en) | Semiconductor device and method for manufacturing the same | |
TW200739811A (en) | Interconnect structure of an integrated circuit, damascene structure, semiconductor structure and fabrication methods thereof | |
WO2007087406A3 (en) | Porous silicon dielectric | |
TW200301541A (en) | Process for formation of a wiring network using a porous interlevel dielectric and related structures | |
SG137744A1 (en) | Protruded contact and insertion of inter-layer-dielectric material to match damascene hardmask to improve undercut for low-k interconnects | |
TW200743178A (en) | Semiconductor device | |
TW200631059A (en) | Semiconducor device and manufacturing method thereof | |
TW201130100A (en) | Semiconductor device having a copper plug | |
TW200715470A (en) | Semiconductor structure and integrated circuit | |
TW200707706A (en) | MIM capacitor in a semiconductor device and method therefor | |
TW200725802A (en) | Improved interconnect structure and method of fabricating same | |
TW200515534A (en) | Improved chemical planarization performance for copper/low-k interconnect structures | |
TW200731464A (en) | Method for forming metal interconnection in image sensor |