TW200721381A - Substrate processing method, control program and computer-readable storage medium - Google Patents

Substrate processing method, control program and computer-readable storage medium

Info

Publication number
TW200721381A
TW200721381A TW095136418A TW95136418A TW200721381A TW 200721381 A TW200721381 A TW 200721381A TW 095136418 A TW095136418 A TW 095136418A TW 95136418 A TW95136418 A TW 95136418A TW 200721381 A TW200721381 A TW 200721381A
Authority
TW
Taiwan
Prior art keywords
processing method
substrate processing
computer
storage medium
readable storage
Prior art date
Application number
TW095136418A
Other languages
English (en)
Chinese (zh)
Other versions
TWI317160B (https=
Inventor
Yasushi Fujii
Takayuki Toshima
Takehiko Orii
Original Assignee
Tokyo Electron Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Electron Ltd filed Critical Tokyo Electron Ltd
Publication of TW200721381A publication Critical patent/TW200721381A/zh
Application granted granted Critical
Publication of TWI317160B publication Critical patent/TWI317160B/zh

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
    • H10P95/08—Planarisation of organic insulating materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/20—Dry etching; Plasma etching; Reactive-ion etching
    • H10P50/28—Dry etching; Plasma etching; Reactive-ion etching of insulating materials
    • H10P50/282—Dry etching; Plasma etching; Reactive-ion etching of insulating materials of inorganic materials
    • H10P50/283—Dry etching; Plasma etching; Reactive-ion etching of insulating materials of inorganic materials by chemical means
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/20—Dry etching; Plasma etching; Reactive-ion etching
    • H10P50/28—Dry etching; Plasma etching; Reactive-ion etching of insulating materials
    • H10P50/286—Dry etching; Plasma etching; Reactive-ion etching of insulating materials of organic materials
    • H10P50/287—Dry etching; Plasma etching; Reactive-ion etching of insulating materials of organic materials by chemical means
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/60—Wet etching
    • H10P50/61—Electrolytic etching
    • H10P50/613—Electrolytic etching of Group IV materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P70/00—Cleaning of wafers, substrates or parts of devices
    • H10P70/20—Cleaning during device manufacture
    • H10P70/23—Cleaning during device manufacture during, before or after processing of insulating materials
    • H10P70/234—Cleaning during device manufacture during, before or after processing of insulating materials the processing being the formation of vias or contact holes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/04—Apparatus for manufacture or treatment
    • H10P72/0402—Apparatus for fluid treatment
    • H10P72/0406—Apparatus for fluid treatment for cleaning followed by drying, rinsing, stripping, blasting or the like
    • H10P72/0411—Apparatus for fluid treatment for cleaning followed by drying, rinsing, stripping, blasting or the like for wet cleaning or washing
    • H10P72/0414—Apparatus for fluid treatment for cleaning followed by drying, rinsing, stripping, blasting or the like for wet cleaning or washing using mainly spraying means, e.g. nozzles
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/04—Apparatus for manufacture or treatment
    • H10P72/0451—Apparatus for manufacturing or treating in a plurality of work-stations
    • H10P72/0452—Apparatus for manufacturing or treating in a plurality of work-stations characterised by the layout of the process chambers
    • H10P72/0458—Apparatus for manufacturing or treating in a plurality of work-stations characterised by the layout of the process chambers vertical arrangement
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/04—Apparatus for manufacture or treatment
    • H10P72/0451—Apparatus for manufacturing or treating in a plurality of work-stations
    • H10P72/0468—Apparatus for manufacturing or treating in a plurality of work-stations comprising a chamber adapted to a particular process
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/071—Manufacture or treatment of dielectric parts thereof
    • H10W20/074—Manufacture or treatment of dielectric parts thereof of dielectric parts comprising thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
    • H10W20/076—Manufacture or treatment of dielectric parts thereof of dielectric parts comprising thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers in via holes or trenches
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/071—Manufacture or treatment of dielectric parts thereof
    • H10W20/081—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/071—Manufacture or treatment of dielectric parts thereof
    • H10W20/081—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts
    • H10W20/084—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts for dual-damascene structures
    • H10W20/085—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts for dual-damascene structures involving intermediate temporary filling with material
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/071—Manufacture or treatment of dielectric parts thereof
    • H10W20/093—Manufacture or treatment of dielectric parts thereof by modifying materials of the dielectric parts
    • H10W20/096—Manufacture or treatment of dielectric parts thereof by modifying materials of the dielectric parts by contacting with gases, liquids or plasmas
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/69—Inorganic materials
    • H10P14/692—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses
    • H10P14/6921—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses containing silicon
    • H10P14/6922—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses containing silicon the material containing Si, O and at least one of H, N, C, F or other non-metal elements, e.g. SiOC, SiOC:H or SiONC

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Cleaning Or Drying Semiconductors (AREA)
  • Weting (AREA)
  • Photosensitive Polymer And Photoresist Processing (AREA)
TW095136418A 2005-09-29 2006-09-29 Substrate processing method, control program and computer-readable storage medium TW200721381A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2005285432 2005-09-29

Publications (2)

Publication Number Publication Date
TW200721381A true TW200721381A (en) 2007-06-01
TWI317160B TWI317160B (https=) 2009-11-11

Family

ID=37678444

Family Applications (1)

Application Number Title Priority Date Filing Date
TW095136418A TW200721381A (en) 2005-09-29 2006-09-29 Substrate processing method, control program and computer-readable storage medium

Country Status (6)

Country Link
US (1) US7482281B2 (https=)
EP (1) EP1770765B1 (https=)
KR (1) KR101049491B1 (https=)
CN (1) CN100517603C (https=)
SG (1) SG131052A1 (https=)
TW (1) TW200721381A (https=)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI447811B (zh) * 2008-11-19 2014-08-01 美光科技公司 形成導電材料之方法、選擇性形成導電材料之方法、形成鉑之方法及形成導電結構之方法

Families Citing this family (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5019741B2 (ja) * 2005-11-30 2012-09-05 東京エレクトロン株式会社 半導体装置の製造方法および基板処理システム
KR100723889B1 (ko) 2006-06-30 2007-05-31 주식회사 하이닉스반도체 직렬 입/출력 인터페이스를 가진 멀티 포트 메모리 소자
JP2009065000A (ja) 2007-09-07 2009-03-26 Tokyo Electron Ltd 基板の処理方法、プログラム、コンピュータ記憶媒体及び基板処理システム
US8282984B2 (en) * 2007-12-03 2012-10-09 Tokyo Electron Limited Processing condition inspection and optimization method of damage recovery process, damage recovering system and storage medium
JP5342811B2 (ja) * 2008-06-09 2013-11-13 東京エレクトロン株式会社 半導体装置の製造方法
US8999734B2 (en) 2009-03-10 2015-04-07 American Air Liquide, Inc. Cyclic amino compounds for low-k silylation
JP5381388B2 (ja) * 2009-06-23 2014-01-08 東京エレクトロン株式会社 液処理装置
US20110076623A1 (en) * 2009-09-29 2011-03-31 Tokyo Electron Limited Method for reworking silicon-containing arc layers on a substrate
US7981699B2 (en) * 2009-10-22 2011-07-19 Lam Research Corporation Method for tunably repairing low-k dielectric damage
JP5424848B2 (ja) * 2009-12-15 2014-02-26 株式会社東芝 半導体基板の表面処理装置及び方法
JP5782279B2 (ja) * 2011-01-20 2015-09-24 株式会社Ｓｃｒｅｅｎホールディングス 基板処理方法および基板処理装置
US10043651B2 (en) 2011-06-23 2018-08-07 Brooks Automation (Germany) Gmbh Semiconductor cleaner systems and methods
JP5917861B2 (ja) 2011-08-30 2016-05-18 株式会社Ｓｃｒｅｅｎホールディングス 基板処理方法
US8859430B2 (en) * 2012-06-22 2014-10-14 Tokyo Electron Limited Sidewall protection of low-K material during etching and ashing
TWI581331B (zh) * 2012-07-13 2017-05-01 應用材料股份有限公司 降低多孔低ｋ膜的介電常數之方法
JP6754257B2 (ja) * 2016-09-26 2020-09-09 株式会社Ｓｃｒｅｅｎホールディングス 基板処理方法
KR102093152B1 (ko) 2017-10-17 2020-03-25 삼성전기주식회사 엔벨로프 트래킹 전류 바이어스 회로 및 파워 증폭 장치
US12410523B1 (en) * 2024-03-29 2025-09-09 Applied Materials, Inc. Integrated low k recovery and ALD metal deposition process for advanced technology node

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05205989A (ja) * 1992-01-28 1993-08-13 Hitachi Ltd リソグラフィ法及び半導体装置の製造方法
US6270948B1 (en) * 1996-08-22 2001-08-07 Kabushiki Kaisha Toshiba Method of forming pattern
JP3403373B2 (ja) * 2000-05-26 2003-05-06 松下電器産業株式会社 有機膜のエッチング方法、半導体装置の製造方法及びパターンの形成方法
CN101108783B (zh) * 2001-08-09 2012-04-04 旭化成株式会社 有机半导体元件
JP4678665B2 (ja) * 2001-11-15 2011-04-27 東京エレクトロン株式会社 基板処理方法および基板処理装置
US7169540B2 (en) * 2002-04-12 2007-01-30 Tokyo Electron Limited Method of treatment of porous dielectric films to reduce damage during cleaning
JP4334844B2 (ja) * 2002-06-26 2009-09-30 東京エレクトロン株式会社 デバイス用溝構造体の製造方法
KR100564565B1 (ko) * 2002-11-14 2006-03-28 삼성전자주식회사 실리콘을 함유하는 폴리머 및 이를 포함하는 네가티브형레지스트 조성물과 이들을 이용한 반도체 소자의 패턴형성 방법
JP2004214388A (ja) 2002-12-27 2004-07-29 Tokyo Electron Ltd 基板処理方法
US7709371B2 (en) * 2003-01-25 2010-05-04 Honeywell International Inc. Repairing damage to low-k dielectric materials using silylating agents
US7179758B2 (en) 2003-09-03 2007-02-20 International Business Machines Corporation Recovery of hydrophobicity of low-k and ultra low-k organosilicate films used as inter metal dielectrics
CN100568457C (zh) * 2003-10-02 2009-12-09 株式会社半导体能源研究所 半导体装置的制造方法

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI447811B (zh) * 2008-11-19 2014-08-01 美光科技公司 形成導電材料之方法、選擇性形成導電材料之方法、形成鉑之方法及形成導電結構之方法
US9023711B2 (en) 2008-11-19 2015-05-05 Micron Technology, Inc. Methods for forming a conductive material and methods for forming a conductive structure

Also Published As

Publication number Publication date
SG131052A1 (en) 2007-04-26
TWI317160B (https=) 2009-11-11
US7482281B2 (en) 2009-01-27
EP1770765B1 (en) 2013-03-27
US20070077768A1 (en) 2007-04-05
KR101049491B1 (ko) 2011-07-15
EP1770765A3 (en) 2010-11-10
CN1953145A (zh) 2007-04-25
EP1770765A2 (en) 2007-04-04
CN100517603C (zh) 2009-07-22
KR20070036670A (ko) 2007-04-03

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