TW200632909A - Method and system for minimizing impact of refresh operations on volatile memory performance - Google Patents
Method and system for minimizing impact of refresh operations on volatile memory performanceInfo
- Publication number
- TW200632909A TW200632909A TW094140719A TW94140719A TW200632909A TW 200632909 A TW200632909 A TW 200632909A TW 094140719 A TW094140719 A TW 094140719A TW 94140719 A TW94140719 A TW 94140719A TW 200632909 A TW200632909 A TW 200632909A
- Authority
- TW
- Taiwan
- Prior art keywords
- volatile memory
- refresh operations
- memory performance
- minimizing impact
- refresh
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/16—Handling requests for interconnection or transfer for access to memory bus
- G06F13/1605—Handling requests for interconnection or transfer for access to memory bus based on arbitration
- G06F13/161—Handling requests for interconnection or transfer for access to memory bus based on arbitration with latency improvement
- G06F13/1636—Handling requests for interconnection or transfer for access to memory bus based on arbitration with latency improvement using refresh
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/406—Management or control of the refreshing or charge-regeneration cycles
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/406—Management or control of the refreshing or charge-regeneration cycles
- G11C11/40611—External triggering or timing of internal or partially internal refresh operations, e.g. auto-refresh or CAS-before-RAS triggered refresh
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C2211/00—Indexing scheme relating to digital stores characterized by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C2211/401—Indexing scheme relating to cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C2211/406—Refreshing of dynamic cells
- G11C2211/4061—Calibration or ate or cycle tuning
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Dram (AREA)
- Memory System (AREA)
- Stored Programmes (AREA)
- Techniques For Improving Reliability Of Storages (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US10/997,138 US7930471B2 (en) | 2004-11-24 | 2004-11-24 | Method and system for minimizing impact of refresh operations on volatile memory performance |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| TW200632909A true TW200632909A (en) | 2006-09-16 |
| TWI402841B TWI402841B (zh) | 2013-07-21 |
Family
ID=36123458
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| TW094140719A TWI402841B (zh) | 2004-11-24 | 2005-11-18 | 用於最小化揮發性記憶體效能上更新操作之影響之方法及系統 |
Country Status (14)
| Country | Link |
|---|---|
| US (2) | US7930471B2 (zh) |
| EP (1) | EP1815479B1 (zh) |
| JP (2) | JP5001165B2 (zh) |
| KR (2) | KR101049312B1 (zh) |
| CN (2) | CN101103415B (zh) |
| AT (1) | ATE491209T1 (zh) |
| BR (1) | BRPI0518259B1 (zh) |
| DE (1) | DE602005025243D1 (zh) |
| ES (1) | ES2355737T3 (zh) |
| HK (2) | HK1179046A1 (zh) |
| IL (1) | IL183416A (zh) |
| PL (1) | PL1815479T3 (zh) |
| TW (1) | TWI402841B (zh) |
| WO (1) | WO2006058118A1 (zh) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI396978B (zh) * | 2007-08-28 | 2013-05-21 | Micron Technology Inc | 具分割器單元且效能強化之記憶體系統及操作方法 |
Families Citing this family (19)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7930471B2 (en) * | 2004-11-24 | 2011-04-19 | Qualcomm Incorporated | Method and system for minimizing impact of refresh operations on volatile memory performance |
| US7590021B2 (en) * | 2007-07-26 | 2009-09-15 | Qualcomm Incorporated | System and method to reduce dynamic RAM power consumption via the use of valid data indicators |
| US8347027B2 (en) * | 2009-11-05 | 2013-01-01 | Honeywell International Inc. | Reducing power consumption for dynamic memories using distributed refresh control |
| US8392650B2 (en) * | 2010-04-01 | 2013-03-05 | Intel Corporation | Fast exit from self-refresh state of a memory device |
| JP2013157047A (ja) * | 2012-01-27 | 2013-08-15 | Toshiba Corp | 磁気ディスク装置及び同装置におけるデータリフレッシュ方法 |
| KR20130129786A (ko) | 2012-05-21 | 2013-11-29 | 에스케이하이닉스 주식회사 | 리프래쉬 방법과 이를 이용한 반도체 메모리 장치 |
| JP5917307B2 (ja) | 2012-06-11 | 2016-05-11 | ルネサスエレクトロニクス株式会社 | メモリコントローラ、揮発性メモリの制御方法及びメモリ制御システム |
| KR102023487B1 (ko) | 2012-09-17 | 2019-09-20 | 삼성전자주식회사 | 오토 리프레쉬 커맨드를 사용하지 않고 리프레쉬를 수행할 수 있는 반도체 메모리 장치 및 이를 포함하는 메모리 시스템 |
| WO2014065775A1 (en) * | 2012-10-22 | 2014-05-01 | Hewlett-Packard Development Company, L.P. | Performing refresh of a memory device in response to access of data |
| KR102107470B1 (ko) * | 2013-02-07 | 2020-05-07 | 삼성전자주식회사 | 메모리 장치 및 메모리 장치의 리프레시 방법 |
| US20160239442A1 (en) * | 2015-02-13 | 2016-08-18 | Qualcomm Incorporated | Scheduling volatile memory maintenance events in a multi-processor system |
| KR102304928B1 (ko) * | 2015-05-13 | 2021-09-27 | 삼성전자 주식회사 | 리프레시 명령을 분산시키는 메모리 장치 및 상기 장치를 포함하는 메모리 시스템 |
| KR102326018B1 (ko) | 2015-08-24 | 2021-11-12 | 삼성전자주식회사 | 메모리 시스템 |
| KR102373544B1 (ko) | 2015-11-06 | 2022-03-11 | 삼성전자주식회사 | 요청 기반의 리프레쉬를 수행하는 메모리 장치, 메모리 시스템 및 메모리 장치의 동작방법 |
| CN106601286A (zh) * | 2016-12-20 | 2017-04-26 | 湖南国科微电子股份有限公司 | DDRx SDRAM存储器刷新方法及存储器控制器 |
| CN107527648A (zh) * | 2017-09-04 | 2017-12-29 | 珠海市杰理科技股份有限公司 | 存储器的刷新方法和系统 |
| CN110556139B (zh) * | 2018-05-31 | 2021-06-18 | 联发科技股份有限公司 | 用以控制存储器的电路及相关的方法 |
| US10777252B2 (en) | 2018-08-22 | 2020-09-15 | Apple Inc. | System and method for performing per-bank memory refresh |
| CN110299164B (zh) * | 2019-06-28 | 2021-10-26 | 西安紫光国芯半导体有限公司 | 一种自适应dram刷新控制方法和dram刷新控制器 |
Family Cites Families (17)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0164735A3 (en) * | 1984-06-11 | 1988-11-09 | Nec Corporation | A microprocessor having a dynamic memory refresh circuit |
| JPS61160897A (ja) * | 1984-12-31 | 1986-07-21 | Fujitsu Ltd | ダイナミツク形ｒａｍのリフレツシユ方式 |
| US4984209A (en) | 1987-10-30 | 1991-01-08 | Zenith Data Systems Corporation | Burst refresh of dynamic random access memory for personal computers |
| JPH01267896A (ja) | 1988-04-19 | 1989-10-25 | Toshiba Corp | 半導体メモリ |
| JPH01307997A (ja) | 1988-06-06 | 1989-12-12 | Toshiba Corp | メモリ装置 |
| JPH0349094A (ja) * | 1989-07-18 | 1991-03-01 | Toshiba Corp | メモリ制御装置 |
| JPH0434792A (ja) | 1990-05-30 | 1992-02-05 | Ricoh Co Ltd | Ｄｒａｍ制御方式 |
| DE69228233T2 (de) * | 1991-12-18 | 1999-09-16 | Sun Microsystems Inc | Wahlfreie Auffrischung |
| JPH06236683A (ja) | 1993-02-09 | 1994-08-23 | Oki Electric Ind Co Ltd | メモリリフレッシュ制御回路 |
| US5873114A (en) * | 1995-08-18 | 1999-02-16 | Advanced Micro Devices, Inc. | Integrated processor and memory control unit including refresh queue logic for refreshing DRAM during idle cycles |
| JPH10106259A (ja) | 1996-09-26 | 1998-04-24 | Nec Gumma Ltd | メモリ制御装置 |
| JPH10199236A (ja) * | 1997-01-16 | 1998-07-31 | Matsushita Electric Ind Co Ltd | Ｄｒａｍコントローラ |
| US5907857A (en) | 1997-04-07 | 1999-05-25 | Opti, Inc. | Refresh-ahead and burst refresh preemption technique for managing DRAM in computer system |
| US6272588B1 (en) * | 1997-05-30 | 2001-08-07 | Motorola Inc. | Method and apparatus for verifying and characterizing data retention time in a DRAM using built-in test circuitry |
| US20020069319A1 (en) * | 2000-12-01 | 2002-06-06 | Ming-Hsien Lee | Method and apparatus of event-driven based refresh for high performance memory controller |
| JP2005310245A (ja) * | 2004-04-20 | 2005-11-04 | Seiko Epson Corp | メモリコントローラ、半導体集積回路装置、マイクロコンピュータ及び電子機器 |
| US7930471B2 (en) * | 2004-11-24 | 2011-04-19 | Qualcomm Incorporated | Method and system for minimizing impact of refresh operations on volatile memory performance |
-
2004
- 2004-11-24 US US10/997,138 patent/US7930471B2/en active Active
-
2005
- 2005-11-18 TW TW094140719A patent/TWI402841B/zh active
- 2005-11-22 CN CN2005800468913A patent/CN101103415B/zh active Active
- 2005-11-22 KR KR1020097011265A patent/KR101049312B1/ko active IP Right Grant
- 2005-11-22 BR BRPI0518259-0A patent/BRPI0518259B1/pt active IP Right Grant
- 2005-11-22 ES ES05824687T patent/ES2355737T3/es active Active
- 2005-11-22 JP JP2007543467A patent/JP5001165B2/ja active Active
- 2005-11-22 DE DE602005025243T patent/DE602005025243D1/de active Active
- 2005-11-22 PL PL05824687T patent/PL1815479T3/pl unknown
- 2005-11-22 AT AT05824687T patent/ATE491209T1/de not_active IP Right Cessation
- 2005-11-22 CN CN201210402904.8A patent/CN102969017B/zh active Active
- 2005-11-22 EP EP05824687A patent/EP1815479B1/en active Active
- 2005-11-22 WO PCT/US2005/042535 patent/WO2006058118A1/en active Application Filing
- 2005-11-22 KR KR1020077014102A patent/KR20070086505A/ko not_active Application Discontinuation
-
2007
- 2007-05-24 IL IL183416A patent/IL183416A/en active IP Right Grant
-
2008
- 2008-05-22 HK HK13105835.3A patent/HK1179046A1/zh unknown
- 2008-05-22 HK HK08105671.7A patent/HK1110987A1/xx unknown
-
2010
- 2010-08-17 JP JP2010181991A patent/JP5627953B2/ja active Active
-
2011
- 2011-03-09 US US13/043,647 patent/US8171211B2/en active Active
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI396978B (zh) * | 2007-08-28 | 2013-05-21 | Micron Technology Inc | 具分割器單元且效能強化之記憶體系統及操作方法 |
Also Published As
| Publication number | Publication date |
|---|---|
| HK1110987A1 (en) | 2008-07-25 |
| ATE491209T1 (de) | 2010-12-15 |
| IL183416A (en) | 2012-10-31 |
| CN102969017B (zh) | 2016-01-06 |
| JP5627953B2 (ja) | 2014-11-19 |
| BRPI0518259B1 (pt) | 2017-12-26 |
| HK1179046A1 (zh) | 2013-09-19 |
| IL183416A0 (en) | 2007-09-20 |
| JP5001165B2 (ja) | 2012-08-15 |
| TWI402841B (zh) | 2013-07-21 |
| US20060112217A1 (en) | 2006-05-25 |
| JP2008522339A (ja) | 2008-06-26 |
| US20110161579A1 (en) | 2011-06-30 |
| US7930471B2 (en) | 2011-04-19 |
| CN101103415B (zh) | 2012-12-12 |
| KR101049312B1 (ko) | 2011-07-13 |
| ES2355737T3 (es) | 2011-03-30 |
| BRPI0518259A2 (pt) | 2008-11-11 |
| KR20070086505A (ko) | 2007-08-27 |
| EP1815479B1 (en) | 2010-12-08 |
| DE602005025243D1 (de) | 2011-01-20 |
| WO2006058118A1 (en) | 2006-06-01 |
| JP2011018435A (ja) | 2011-01-27 |
| PL1815479T3 (pl) | 2011-05-31 |
| CN101103415A (zh) | 2008-01-09 |
| CN102969017A (zh) | 2013-03-13 |
| KR20090071672A (ko) | 2009-07-01 |
| EP1815479A1 (en) | 2007-08-08 |
| US8171211B2 (en) | 2012-05-01 |
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