TW200632595A - Pattern forming method and semiconductor device manufacturing method - Google Patents

Pattern forming method and semiconductor device manufacturing method

Info

Publication number
TW200632595A
TW200632595A TW095100919A TW95100919A TW200632595A TW 200632595 A TW200632595 A TW 200632595A TW 095100919 A TW095100919 A TW 095100919A TW 95100919 A TW95100919 A TW 95100919A TW 200632595 A TW200632595 A TW 200632595A
Authority
TW
Taiwan
Prior art keywords
pattern forming
semiconductor device
device manufacturing
forming method
pattern
Prior art date
Application number
TW095100919A
Other languages
English (en)
Other versions
TWI320877B (zh
Inventor
Eishi Shiobara
Takehiro Kondoh
Yuji Kobayashi
Koutarou Sho
Original Assignee
Toshiba Kk
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Kk filed Critical Toshiba Kk
Publication of TW200632595A publication Critical patent/TW200632595A/zh
Application granted granted Critical
Publication of TWI320877B publication Critical patent/TWI320877B/zh

Links

Classifications

    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/26—Processing photosensitive materials; Apparatus therefor
    • G03F7/40—Treatment after imagewise removal, e.g. baking
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/0271—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
    • H01L21/0273—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers characterised by the treatment of photoresist layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/0271—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
    • H01L21/0273—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers characterised by the treatment of photoresist layers
    • H01L21/0274—Photolithographic processes
    • H01L21/0276—Photolithographic processes using an anti-reflective coating
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/308—Chemical or electrical treatment, e.g. electrolytic etching using masks
    • H01L21/3083—Chemical or electrical treatment, e.g. electrolytic etching using masks characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane
    • H01L21/3088—Process specially adapted to improve the resolution of the mask
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S430/00—Radiation imagery chemistry: process, composition, or product thereof
    • Y10S430/151—Matting or other surface reflectivity altering material

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Photosensitive Polymer And Photoresist Processing (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
TW095100919A 2005-01-31 2006-01-10 Pattern forming method and semiconductor device manufacturing method TW200632595A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2005023923A JP4302065B2 (ja) 2005-01-31 2005-01-31 パターン形成方法

Publications (2)

Publication Number Publication Date
TW200632595A true TW200632595A (en) 2006-09-16
TWI320877B TWI320877B (zh) 2010-02-21

Family

ID=36913323

Family Applications (1)

Application Number Title Priority Date Filing Date
TW095100919A TW200632595A (en) 2005-01-31 2006-01-10 Pattern forming method and semiconductor device manufacturing method

Country Status (3)

Country Link
US (1) US7662542B2 (zh)
JP (1) JP4302065B2 (zh)
TW (1) TW200632595A (zh)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3774713B2 (ja) * 2003-10-15 2006-05-17 株式会社東芝 コンタクトホールの形成方法
US8642474B2 (en) * 2007-07-10 2014-02-04 Advanced Micro Devices, Inc. Spacer lithography
JP2009295745A (ja) * 2008-06-04 2009-12-17 Toshiba Corp 半導体装置の製造方法
JP2011066164A (ja) * 2009-09-16 2011-03-31 Tokyo Electron Ltd マスクパターンの形成方法及び半導体装置の製造方法
WO2012057967A2 (en) 2010-10-27 2012-05-03 Applied Materials, Inc. Methods and apparatus for controlling photoresist line width roughness
US8962224B2 (en) 2012-08-13 2015-02-24 Applied Materials, Inc. Methods for controlling defects for extreme ultraviolet lithography (EUVL) photomask substrate
US9240321B2 (en) * 2013-08-05 2016-01-19 Kabushiki Kaisha Toshiba Mask having separated line patterns connected by a connecting pattern
US10935889B2 (en) * 2015-05-13 2021-03-02 Tokyo Electron Limited Extreme ultra-violet sensitivity reduction using shrink and growth method

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3705896A1 (de) * 1986-02-24 1987-08-27 Tokyo Ohka Kogyo Co Ltd Verfahren zur herstellung eines fotoresistmusters auf einer substratflaeche und ein dafuer geeignetes schaumentfernungsmittel
JP3057879B2 (ja) 1992-02-28 2000-07-04 株式会社日立製作所 半導体装置の製造方法
JP3382028B2 (ja) 1993-09-10 2003-03-04 株式会社東芝 薄膜形成方法
US5906911A (en) * 1997-03-28 1999-05-25 International Business Machines Corporation Process of forming a dual damascene structure in a single photoresist film
JP3406302B2 (ja) 2001-01-16 2003-05-12 株式会社半導体先端テクノロジーズ 微細パターンの形成方法、半導体装置の製造方法および半導体装置
JP4178360B2 (ja) * 2001-06-14 2008-11-12 信越化学工業株式会社 脂環構造を有する新規エポキシ化合物、高分子化合物、レジスト材料、及びパターン形成方法
JP2003140361A (ja) 2001-10-31 2003-05-14 Matsushita Electric Ind Co Ltd パターン形成方法
US20040029047A1 (en) * 2002-08-07 2004-02-12 Renesas Technology Corp. Micropattern forming material, micropattern forming method and method for manufacturing semiconductor device
JP3850772B2 (ja) 2002-08-21 2006-11-29 富士通株式会社 レジストパターン厚肉化材料、レジストパターンの製造方法、及び半導体装置の製造方法
JP2004093832A (ja) * 2002-08-30 2004-03-25 Renesas Technology Corp 微細パターン形成材料、微細パターン形成方法および半導体装置の製造方法
JP2004103926A (ja) * 2002-09-11 2004-04-02 Renesas Technology Corp レジストパターン形成方法とそれを用いた半導体装置の製造方法およびレジスト表層処理剤

Also Published As

Publication number Publication date
US7662542B2 (en) 2010-02-16
JP2006210825A (ja) 2006-08-10
TWI320877B (zh) 2010-02-21
JP4302065B2 (ja) 2009-07-22
US20060189147A1 (en) 2006-08-24

Similar Documents

Publication Publication Date Title
TW200632595A (en) Pattern forming method and semiconductor device manufacturing method
TW200707083A (en) Method for forming a lithograohy pattern
TW200802536A (en) Method of manufacturing semiconductor device
WO2002071150A3 (en) Lithographic template
WO2008059440A3 (en) Double patterning for lithography to increase feature spatial density
SG125933A1 (en) Mask and its manufacturing method, exposure, and device fabrication method
TW200632542A (en) Mask, mask forming method, pattern forming method, and wiring pattern forming method
WO2002079876A3 (en) Lithographic template
TW200611062A (en) Apparatus, system and method to vary dimensions of a substrate during nano-scale manufacturing
TWI266373B (en) Pattern forming method and method of manufacturing semiconductor device
TW200725695A (en) Method for manufacturing semiconductor device
TW200629377A (en) Use of Cl2 and/or HCl during silicon epitaxial film formation
TW200501199A (en) Methods of forming semiconductor mesa structures including self-aligned contact layers and related devices
WO2003052513A3 (en) Lithographic template
TW200710992A (en) Method for forming an anti-etching shielding layer of resist patterns in semiconductor fabrication
TWI329360B (en) Semiconductor device production method and semiconductor device
TW200637051A (en) Mask, mask manufacturing method, pattern forming apparatus, and pattern formation method
TW200603272A (en) Semiconductor device and method for fabricating the same
NL1025056A1 (nl) Vervaardigingswerkwijze voor een fotomasker voor een geïntegreerde schakeling en overeenkomstig fotomasker.
TW200629374A (en) Patterning substrates employing multi-film layers defining etch-differential interfaces
TW200616144A (en) Method of forming narrowly spaced flash memory contact openings and lithography masks
TW200700932A (en) Lithography process with an enhanced depth-of-depth
TW200729333A (en) Etching method and etching device
TWI264619B (en) A lithographic projection mask, a device manufacturing method using a lithographic projection mask and a device manufactured thereby
TW200708886A (en) Method of forming high etch resistant resist patterns

Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees