TW200611118A - Testing simulator, testing simulation program and record medium - Google Patents

Testing simulator, testing simulation program and record medium

Info

Publication number
TW200611118A
TW200611118A TW094133063A TW94133063A TW200611118A TW 200611118 A TW200611118 A TW 200611118A TW 094133063 A TW094133063 A TW 094133063A TW 94133063 A TW94133063 A TW 94133063A TW 200611118 A TW200611118 A TW 200611118A
Authority
TW
Taiwan
Prior art keywords
testing
testing pattern
semiconductor device
output
simulator
Prior art date
Application number
TW094133063A
Other languages
English (en)
Other versions
TWI353515B (en
Inventor
Hideki Tada
Mitsuo Hori
Takahiro Kataoka
Original Assignee
Advantest Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advantest Corp filed Critical Advantest Corp
Publication of TW200611118A publication Critical patent/TW200611118A/zh
Application granted granted Critical
Publication of TWI353515B publication Critical patent/TWI353515B/zh

Links

Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/3183—Generation of test inputs, e.g. test vectors, patterns or sequences
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/3183—Generation of test inputs, e.g. test vectors, patterns or sequences
    • G01R31/318342—Generation of test inputs, e.g. test vectors, patterns or sequences by preliminary fault modelling, e.g. analysis, simulation
    • G01R31/318357—Simulation
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/26—Functional testing
    • G06F11/263—Generation of test inputs, e.g. test vectors, patterns or sequences ; with adaptation of the tested hardware for testability with external testers
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00—Computer-aided design [CAD]
    • G06F30/30—Circuit design
    • G06F30/32—Circuit design at the digital level
    • G06F30/33—Design verification, e.g. functional simulation or model checking
TW094133063A 2004-09-24 2005-09-23 Testing simulator, testing simulatin program and r TWI353515B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2004278582A JP4580722B2 (ja) 2004-09-24 2004-09-24 試験シミュレータ及び試験シミュレーションプログラム

Publications (2)

Publication Number Publication Date
TW200611118A true TW200611118A (en) 2006-04-01
TWI353515B TWI353515B (en) 2011-12-01

Family

ID=36090114

Family Applications (1)

Application Number Title Priority Date Filing Date
TW094133063A TWI353515B (en) 2004-09-24 2005-09-23 Testing simulator, testing simulatin program and r

Country Status (8)

Country Link
US (1) US7502724B2 (zh)
EP (1) EP1801603B1 (zh)
JP (1) JP4580722B2 (zh)
KR (1) KR20070065884A (zh)
CN (1) CN101027566B (zh)
DE (1) DE602005020168D1 (zh)
TW (1) TWI353515B (zh)
WO (1) WO2006033357A1 (zh)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI396075B (zh) * 2006-08-09 2013-05-11 Hitachi High Tech Engineering Service Corp 半導體測試裝置的測試程式生成方法

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8037357B2 (en) * 2009-03-24 2011-10-11 Visa U.S.A. Inc. System and method for generating test job control language files
KR20110003182A (ko) 2009-07-03 2011-01-11 삼성전자주식회사 인쇄 회로 기판 설계 방법 및 인쇄 회로 기판을 포함하는 패키지 테스트 디바이스
US9404743B2 (en) * 2012-11-01 2016-08-02 Taiwan Semiconductor Manufacturing Company, Ltd. Method for validating measurement data
US10539609B2 (en) 2014-12-08 2020-01-21 Nxp Usa, Inc. Method of converting high-level test specification language to low-level test implementation language
US10755014B2 (en) * 2018-03-14 2020-08-25 Montana Systems Inc. Event-driven design simulation
TWI700584B (zh) * 2018-07-06 2020-08-01 華邦電子股份有限公司 測試系統及適應性測試程式產生方法
CN112069015B (zh) * 2020-11-10 2021-02-23 鹏城实验室 指令模拟器指令执行方法、装置、终端设备以及存储介质

Family Cites Families (15)

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Publication number Priority date Publication date Assignee Title
JPH0769392B2 (ja) * 1987-03-20 1995-07-31 富士通株式会社 論理回路の故障箇所推定方法
JPH0361871A (ja) * 1989-07-31 1991-03-18 Hitachi Ltd シミュレーシヨン処理装置
DE69114183T2 (de) * 1990-06-07 1996-05-30 Ibm System zur Reduzierung von Prüfdatenspeichern.
JP3247937B2 (ja) * 1992-09-24 2002-01-21 株式会社日立製作所 論理集積回路
US5913022A (en) * 1995-08-31 1999-06-15 Schlumberger Technologies, Inc. Loading hardware pattern memory in automatic test equipment for testing circuits
US6167545A (en) * 1998-03-19 2000-12-26 Xilinx, Inc. Self-adaptive test program
US6249891B1 (en) * 1998-07-02 2001-06-19 Advantest Corp. High speed test pattern evaluation apparatus
US6308292B1 (en) * 1998-12-08 2001-10-23 Lsi Logic Corporation File driven mask insertion for automatic test equipment test pattern generation
US6321363B1 (en) * 1999-01-11 2001-11-20 Novas Software Inc. Incremental simulation using previous simulation results and knowledge of changes to simulation model to achieve fast simulation time
US7089517B2 (en) 2000-09-29 2006-08-08 Advantest Corp. Method for design validation of complex IC
JP3795822B2 (ja) * 2002-04-03 2006-07-12 Ｎｅｃエレクトロニクス株式会社 組込み自己テスト回路及び設計検証方法
JP2003315419A (ja) * 2002-04-24 2003-11-06 Ando Electric Co Ltd シミュレート領域範囲設定機能を有するマイクロプログラムシミュレータ
US6973633B2 (en) * 2002-07-24 2005-12-06 George Lippincott Caching of lithography and etch simulation results
CN1318965C (zh) * 2002-09-10 2007-05-30 华邦电子股份有限公司 测试式样产生方法与其装置
JP3833982B2 (ja) * 2002-10-03 2006-10-18 株式会社東芝 テストパターン選択装置、テストパターン選択方法、及びテストパターン選択プログラム

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI396075B (zh) * 2006-08-09 2013-05-11 Hitachi High Tech Engineering Service Corp 半導體測試裝置的測試程式生成方法

Also Published As

Publication number Publication date
TWI353515B (en) 2011-12-01
CN101027566B (zh) 2010-10-27
EP1801603A4 (en) 2008-07-23
EP1801603B1 (en) 2010-03-24
US7502724B2 (en) 2009-03-10
DE602005020168D1 (de) 2010-05-06
WO2006033357A1 (ja) 2006-03-30
JP2006090905A (ja) 2006-04-06
US20060085682A1 (en) 2006-04-20
EP1801603A1 (en) 2007-06-27
CN101027566A (zh) 2007-08-29
JP4580722B2 (ja) 2010-11-17
KR20070065884A (ko) 2007-06-25

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Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees