TW200541422A - Fabrication method of a printed circuit board - Google Patents

Abstract

A fabrication method of a printed circuit board. A ground/power line in a printed circuit board electrically connects to a transmission line of wiring of the PCB, such that only one plating line is required to electrically connect a plating bus and the ground/power line. Thus, in an electroplating step, current can flow to a terminal in the transmission line to plate a Ni/Au layer thereon. The electrical connection between the transmission line and power/ground line is then cut by an etch step. Accordingly, a minimum of one plating line is remained, avoiding its negative impact on the electrical performance of an electronic device that uses the printed circuit board.

Description

200541422 V. Description of the invention (1) The technical field to which the invention belongs is particularly related. Regarding a method for manufacturing a printed circuit board, the prior art ... When the circuit board is brushed, the method of electroplating / gold layer. ^ Printed circuit boards such as ball gate arrays (ball g) rid to connect with an external component. Dry and / 汊 V electrical fingers, use \ BGA " * conductive fingers 14◦ system; Yu. Crystal, Ann = ^ Circle , V electrical traces 150 from the conductive wire 170 on the back of the conductive finger 14o, electrically applied to the through-hole 1660, distributed through the glow pad 13 of the printed circuit; electrical conductive line i50 The conductive fingers 140 and 4 / area are electrically connected to the above-mentioned solder pad 130 and the lightning conductor 14n 1 by the recording wire 181 on the two sides of the above-mentioned solder pad 130. 180, and the branch electrode 22: electric trace 150, electroplating The bus line is # 1 4 0 '1 ^ π. The shell is usually copper, and the bonding pad 130 and the conductive buckle 4 0 are usually exposed to the outside and are connected with ^). Therefore, in order to prevent Γ: 2 and different external components (not oxidized, dry-sealed pads 13 and 10 are connected to the conductive finger 140, 甬 I, = fresh 塾 130 and conductive finger 140 In connection with the above external elements, usually in a plating process 180 and the branch electric shovel 皇 皇, ，, 々 々 々 & 宜 宜 宜 经由 电镀 电镀 电镀 电镀 经由 经由 上 上 经由 经由 上 塾 塾 塾 塾 塾 〇 〇 〇 and conductive fingers " ο, and a nickel / gold layer (not shown) is electroplated on, on, and after the Shicheng m semiconductor packaging process, there will be a -forming step, the package into the package from the other parts of the printed circuit board: Off] 0646-A20407TWF (N1); ASEK865; dwwang. P td Page 5 200541422 V. Description of the invention (2) Simultaneously cut off the lightning conductors and leave the connection between Ba Shiquan and the electric forging bus line 180. There will still be a knife-plated plating line 181. ϋ ί: Brush 5 耆 The electronic products on the market must be light, thin, short, and small and require high-density circuits. ^: :: f must be placed in a limited area and placed in a more The production also follows the distribution of the residual branch plating lines 18i with = λ = two f Θ / 17, and w causes between adjacent branch plating lines 181 Will produce "inductive mutual inductance" and induction capacitor (rautual capacitor) and produce a worm effect, and the cross-theta effect (crosstalk effect), will not only affect circuit signal f and system stability, but also affect conductive traces The characteristic impedance of 150 has an adverse effect on the electrical properties of electronic products using the printed circuit board. SUMMARY OF THE INVENTION In view of this, the main object of the present invention is to provide a method for manufacturing a printed circuit board to reduce residuals. The density and length of the plating lines are used to improve the electrical performance of the electronic products using the printed circuit board. In order to achieve the above object of the present invention, the present invention provides a method for manufacturing a printed circuit board, which includes providing a substrate. A surface of the substrate is divided into a peripheral area and a circuit layout area; a circuit layer is formed on the upper surface, which includes a plating bus in the above-mentioned peripheral area, and a ground / power line (grund / p〇weF 1 i ne) in the above-mentioned circuit area; a plating line electrically connecting the above-mentioned plating bus line with the above-mentioned ground / electricity source line, and a connection 'Extending from the ground / power supply line, having - a junction point =' positioned between two of said contacts the ground / power line and the terminal; forming a patterned solder resist layer covers the substrate and the line

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200541422 V. Description of the invention (3) Layer 'sub-exposed the above-mentioned connection between the above-mentioned ground / power line and the above-mentioned contact', spring and above-mentioned contact; form a cover layer covering the exposed above-mentioned connection line, The above contacts are not covered; a metal layer is formed by electroplating; the above-mentioned contacts are 'removed' from the cover layer; and the exposed connection lines are removed. The feature of the present invention is that the ground / power line is used to electrically connect the connection line. At least one electroplated line is required to be connected to the line, and the line is connected to the electroplated bus line. * When electroplating, the connection can be reached through the power line. The contact point on the line, and the above mentioned layer is a layer such as nickel / gold layer. Then, the least amount of residue is etched. ΪThe above is the electrical connection of the ground / power line. Finally, the board's I sub-product The electrical properties of the brush circuit are adversely affected. The brush circuit 浐 st; I,.. The above contacts may be conductive fingers or pads, and the μ + 钿 points may be vias or pads. The invention of μ as eg & the palate and other purposes, features, and excellent milk are obviously easier. The following special examples are given below. The advantages can be explained in more detail as follows: For the implementation, please refer to FIGS. 2A to 21, and A to ^ ^ ^ ^, ρ ^ t ^ Please refer to FIG. 2A, the flow of the first method. When the printed circuit board of the circuit, the US /, a substrate 200. To manufacture Monolayer (P0l_de), etc .; To manufacture 2 °° :: Dielectrics such as Polytonia When printing the printed circuit board of Xi arm circuit, scroll page 7 0646-A20407TWF (N1); ASEK865; dwwang. Ptd The following diagrams 200541422 V. Description of the invention (4) 2 0 0 can be a core (c. re) The substrate may be made of, for example, ceramic material, organic material, fiber-reinforced organic material (Fiber-reinf rced), or particle-reinforced organic material (Part i cl e-reinforced), such as epoxy resin, epoxy resin, Polyimide (polyimide), cis-butanedioic acid imide / triazine resin (Bismaleimide triazine ~ based βΌ, Cyanate ester), etc., the surface can also be coated with a layer of dielectric Layer of the core substrate that has completed the core circuit layout. A surface of the shell substrate 2000, especially a surface for adhering an external component, has a peripheral area 201 and a circuit layout area 203; When printed circuit boards of BGA package substrates, the circuit layout area 203 can be used as a wafer adhesion area 202. Dagger & —— "-/ 工-. Uu 口, j — section P representative Area to illustrate the steps of the present invention , Are simplified diagrams, and ^ schematically show the structural units related to the present invention, and ^ two units are not necessarily drawn based on the actual number of actual implementation, two examples. ~ Shape and size respectively; basis : Medium 2. ° formed on the above surface-circuit layer is shown in Fig. 2B, which is used to form-single layer is a flexible printed circuit board or a thin / strong BGA circuit board The substrate 2 0 0 (wound is shown in Figure 2 A); the dielectric material. As shown in Figure 2B | ’俜 is used to open a two-way crane for the PolyU“ The Formation of the Line Side, System ™ (Green

200541422

After laying a metal layer such as a copper layer, the above copper layer is patterned into a circuit layer 210; or a physical vapor deposition such as sputtering or metal chemical vapor deposition is directly performed on the substrate 2000 according to a predetermined pattern directly By the way, the wiring layer 210 is formed. In the wiring layer 21〇, a plaUng bus 21 1 is located on the peripheral area 21 1 of the substrate 200 (please refer to FIG. 28 together) 'ground / power line (ground / p0wer nne) 212 It is located on the line layout area 203; the plating line 213 forms an electrical connection between the plating bus line 2n and the ground / power line 2 1 2; the connection line 2 丨 4 has a first end 214a and a second end Point 214b and contact 214c, the first terminal 214a is electrically connected to the ground / power line 212, so that the connection line 2 14 extends from the ground / power line 2 12 to the second terminal 214b, and the contact 2 14c is located at the ground / Power line 212 and the first terminal 2 1 4 b. The ground / power line 21 2 is usually disposed immediately outside the wafer adhesion area 202, and may completely or only partially surround the wafer adhesion area 202. The second end point 2 14b shown in FIG. 2β is a solder pad. In a later process, the substrate 200 is patterned on another surface not shown in the plan view before the metal layer is plated. In order to expose the other surface of the second terminal 2 on the other surface of the second terminal, in the subsequent plating process, the other surface of the second terminal 2 4b and the contact 2 14c are plated. Metal layer. The contact 2 Ik shown in the second figure is a conductive finger. In Fig. 2C ', it is used to form a multilayer printed circuit board, which is used as a package base for a BGA package / package. The formation of the circuit layer 21 (), the components and their connections can be referred to the description in FIG. 2B, and will not be repeated here. However, the second terminal 21 4b here is a via and the contact 214c is a conductive finger, so that

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The connection line 214 is electrically connected to the substrate 200 (the connection line 2 6 0 shown in the second is 9 a 1, ^ the invented ^ symbol on the surface, but the connection line 2 60 is not the same as the pad 261 The drawings related to this book and the future performance of the enemy are omitted and are not shown. Item: ~ 2 The steps shown in Figure 1 are continued from Figure 2 C. None, the same artist can also use the same The steps are followed by those shown in Figure 2β. Therefore, it will be omitted and will not be described repeatedly. ', Please refer to Figure 2D to form a patterned solder resist layer (s◦ 丨 factory masj〇23 0 cover substrate 2 0 0 ( Please refer to the "figure" and the circuit layer 2i0 (please refer to the 2D Slj. The solder mask 23o preferably has a first opening 231 and a second opening 2 3 2 and the first opening 231 is exposed on the ground / power line 212. (Please refer to the connection line 214 between the second (: picture) and the contact 21 杬, and the second opening 2 32 exposes the contact 214c. In addition, those skilled in the art can also form another patterned solder mask if necessary. The layer covers the connection line 26 and the pad 261 shown in FIG. 2C. Next, referring to FIG. 2E, a mask layer 240 is formed on the first opening 231, and the cover layer 240 is covered. The exposed connecting wires 2i4 (please refer to the figure π). The cover layer 240 is preferably a substance that is insoluble in water or water, in order to prevent the plating solution from contacting the first opening 231 in the subsequent 9-plating process. Connection line 214. If the connection line 214 in the first opening 231 is plated with a metal layer such as a nickel / gold layer due to contact with the plating solution, because in particular the gold in the nickel / gold layer is a chemically inert element , Will hinder the subsequent step of etching the connection line 2 1 4 in the first opening 23 1. Next, please refer to FIG. 2 F, in the plating solution, make the current flow from the plating bus line 2 1 1 through the electric mine line 2 1 3. Ground / power cord 2 1 2 to reach the exposed

0646-A20407TWF (N1); ASEK865; dwwang.p td page 10 200541422 V. Description of the invention (7) The contact 214c is plated with a metal layer 2 50 such as a nickel / gold layer. Furthermore, the metal layer 250 may be plated on the pads 2 61 shown in FIG. 2C at the same time or separately. Next, please refer to Figure 2 G to remove the mask layer 240 in the first opening 2 3 1 Finally, please refer to Figure 2 Η to remove the exposed layer in the first opening 2 3 1 by, for example, etching. Connection line 2 1 4. In Fig. 2I, the solder resist layer 2 30 is regarded as transparent, and the wiring layer 2 10 below it is shown. Since the connection line 2 1 4 in the first opening 2 3 1 has been removed, the electrical connection between the connection line 2 1 4 and the ground / power line 2 1 2 is cut off. For the electrical connection between the ground / power line 2 1 2 and the plating bus line 2 11, the peripheral area 2 1 1 of the substrate 200 can be cut off in the subsequent forming process, and the plating bus line 2 丨 1 can be cut off at the same time. And was cut off. As described above, the present invention uses the ground / power line 2 1 2 to be electrically connected to the connection line 21 4, and at least one electroplated line 2 1 3 is required to connect the ground / power line 2 1 2 to the electric forging wire k line 2 1 1 ′ During power mining, the current can reach the contact 214c on the connection line 214 through the electric line 2 1 3 and the ground / power line 212, and the nickel / gold layer 2 50 on the contact 2 1 4 c key. After that, the electrical connection between the connection line 214 and the ground / power line 212 is cut in the manner of the last name. Finally, at least one plating line 2 1 3 remains, without adversely affecting the electrical properties of the electronic product using the printed circuit board manufactured, which achieves the above-mentioned main object of the present invention. Although the present invention has been disclosed as above with preferred embodiments, it is not intended to limit the present invention. Any person skilled in the art will not depart from the present invention.

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0646-A20407TWF (Nl); ASEK865; dwwang.ptd Page 12 200541422 Brief Description of Drawings Figure 1 is a top view showing a conventional printed circuit board. Figures 2A to 2I are a series of top views showing the flow of a method for manufacturing a printed circuit board according to a preferred embodiment of the present invention. Explanation of symbols »120 ~ Wafer mounting area 1 3 0 ~ Solder pad 1 4 0 ~ Conductive finger 15 0 ~ Conductive trace 1 6 0 ~ Via hole 1 7 0 ~ Wire 1 8 0 ~ Plating bus line 1 8 1 ~ Branch Plating line 2 0 0 to substrate 201 to peripheral area # 2 0 2 to wafer adhesion area 2 0 3 to circuit layout area 2 1 0 to line layer 2 1 1 to plated bus line 2 12 to ground / power line 2 1 3 to Electric forged wire 2 1 4 ~ connecting wire 2 1 4 a ~ first terminal 214b ~ second terminal 2 1 4 c ~ contact

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Claims (1)

200541422 a. Scope of patent application1. A method for manufacturing printed circuit boards. Provide a substrate with one surface of the substrate = 3. Layout area; Yes. Peripheral area and a circuit form a circuit layer on the surface. It includes: · electroplating bus line (P 1 a ΐ ingbus) in the clinic, area one ground / power line (ground / powe ° side area); the line layout line; and: the electric mining line is connected to the electroplating bus line A connection line between the wire and the ground / power supply extends from the ground / power contact, the contact is located on the ground / power line and =, has an end point and a patterned solder resist layer, and 4 ends Between the points; do not expose the earth / power line and the contact between the earth shuttle and the circuit layer, and divide the points; the connection line, and the connection form a cover layer, covering the 4 connections of the point connection + circuit Line, but does not cover the method. The cover layer is removed by electroplating to form a metal layer and the contact; and the exposed connecting line is removed. 2 · If the patent application section (where the line layer is ^ item) Manufacture of said printed circuit board 3 · The manufacturer of the printed circuit board as described in the patent application, where the contact is; 4 · The manufacturer of the printed circuit board as described in the patent application, picture 1 on page 15 0646-A20407TWF (Nl ); ASEK865; dwwang.ptd 200541422 6. The patent application method, in which the end point is a welding grate. 5 · The printed circuit board method as described in item 丨 of the patent application scope, wherein the end point is a via. σ 6 · The method for manufacturing a printed circuit board according to item 5 of the scope of patent application, wherein the substrate further includes a solder pad on the other surface thereof, and the connection wire is electrically connected to the solder pad through the endpoint. . 7. The method for manufacturing a printed circuit board according to item 6 of the patent application scope, wherein the metal layer is further formed on the bonding pad. 8. The method for manufacturing a printed circuit board according to item i of the patent application, wherein the metal layer is a nickel / gold layer. 9. The method for manufacturing a printed circuit board as described in item 丨 of the patent application scope further includes removing the exposed connection line by etching. 1 0 · A method for manufacturing a printed circuit board, comprising: providing a substrate, a surface of the substrate having a peripheral region and a circuit forming a circuit layer on the surface, comprising: a plated bus In the peripheral area · a chip adhesion area in the circuit layout area; ' A ground / power line outside the adhesive area of the chip; a plating line electrically connecting the plating bus line and the ground / power line; and a connection line 'extending from the ground / power line, A conductive hole is provided with a conductive finger, and the conductive finger is located between the ground / power line and the through hole. 200541422 Between patent applications; $ a patterned solder mask covering the substrate and the circuit layer, and exposing the connection line between the ground / power line and the conductive finger, and the conductive finger respectively; ~ forming a cover The curtain layer covers the exposed conductive lines but does not cover the conductive fingers; a metal layer is formed on the conductive fingers by means of electroplating; the cover curtain layer is removed; and the connection lines that are ruptured are removed. , N • The method for manufacturing a printed circuit board according to item 10 of the scope of patent application, wherein 4 wiring layers are copper. 1 2 · The method for manufacturing a printed circuit board as described in item 10 of the scope of patent application, wherein the substrate further includes a solder pad on the other surface, and the connection line is " via the knowledge; It is electrically connected to the fresh meat. 13. The method for manufacturing a printed circuit board according to item 12 of the scope of patent application, wherein the metal layer is further formed on the bonding pad. 14. The printed electrical method according to item 10 of the scope of patent application, wherein the metal layer is a nickel / gold layer. 15. The printed circuit method as described in item 10 of the scope of patent application, further includes removing the exposed garment wenzen line by means of money engraving. mm 1¾ 1 il round IS III I national round country Νι 0646-A20407TWF (N1); ASEK865; dwwang.p t d Page 17