TWI246380B - Fabrication method of a printed circuit board - Google Patents

Abstract

A fabrication method of a printed circuit board. A ground/power line in a printed circuit board electrically connects to a transmission line of wiring of the PCB, such that only one plating line is required to electrically connect a plating bus and the ground/power line. Thus, in an electroplating step, current can flow to a terminal in the transmission line to plate a Ni/Au layer thereon. The electrical connection between the transmission line and power/ground line is then cut by an etch step. Accordingly, a minimum of one plating line is remained, avoiding its negative impact on the electrical performance of an electronic device that uses the printed circuit board.

Description

1246380 V. Description of the invention (1) The technology to which the invention belongs, domain 7. The present invention relates to a manufacturing method for manufacturing printed circuit boards, especially 俜 the prior art ~ the method of electroplating nickel / gold layer in the circuit board. The printed circuit board is mounted on a package substrate such as a baU grid array (BGA) package, which is connected to an external component. It has exposed pads and / or conductive fingers. Please refer to Figure 1 for an example of a substrate. The printed electric post ', and f views are shown on the front side of a conventional brushed circuit board as a BGA package = part of the representative area. Among them, around the above-mentioned marks; conductive traces 15 {1 '白 导 # electrically finger 140 is a wire 170 distributed on the back of the chip mounting area 120, and the Thai electric finger 14 extends to the via 160 and is distributed through the 180 series. Imprint two: pads 13 on the two sides; conductive traces of the plating bus line 150, flattening ^ / n, and the edge, through the branch plating line 1 8 1 and the above pads no, guide;: m The bonding pads 130 on the top surface are electrically connected. 180, plate branch ^ = 140, conductive trace 150, electroplated bus line electrical finger line 181 are usually made of copper, and fresh 塾 130 and guide are shown; used outside 'to distinguish from different external components (not oxidized) In order to prevent the exposed pad 13G from being connected to the conductive finger 140, the exposed pad 130 and the conductive finger 140 are connected to the above-mentioned external element 180. In a plating process, a current is passed through the plating. The bus line / and knife-plating line 181 are transferred to each pad 130 and the conductive finger 14 and a nickel / gold layer (not shown) is plated on /. 々 Generally, there will be a forming process in the back-end process of the semiconductor package. Step, separating the packaged body I from the other parts of the printed circuit board, and

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ί 46380 V. Description of the invention (2) Tong Shou listens to the connection between each electric track line 150 and the plating bus line 180. However, branch plating lines 1 8 1 remain. 、,: ,,; and the need for electronic products on the market to be light, thin, short, and small · f ^ In the design of printed circuit boards, you must put more = density circuits in a limited area Line, so that the distribution density of the residual branch plating lines 181 also increases, which will cause mutual inductance and mutual capacitor between adjacent branch plating lines 1 8 1 and cause crosstalk effects. (Cr〇sstalk effect), will not only affect the quality of ## Λ and system stability, but also affect the characteristic impedance of the conductive trace 150, and cause the electrical properties of the electronic products using the above-mentioned brushed circuit boards. Adverse effects. SUMMARY OF THE INVENTION In view of this, the main object of the present invention is to provide a method for manufacturing a printed circuit, which reduces the density and length of the residual plating lines, so as to improve the electrical performance of the electronic products of the printed circuit board. In order to achieve the above object of the present invention, the present invention provides a method for manufacturing a board & comprising: providing a substrate, the substrate is separated into a peripheral area and a circuit layout area; and a circuit layer is formed on the substrate, including: ·· A plating bus (pUtlng bus) in the above-mentioned districts and districts; · A ground / power line (ground / power une) in the above-mentioned circuit definition area, a plating line, electrically connecting the plating bus and the above Connect to the source line; and a connecting line extending from the ground / power line with 1 point and a contact, the contact is located between the ground / power line and 俨 =; forming a patterned solder mask Cover the above substrate and the above lines: 0646-A20407TWF (N1); ASEK865; dwwang. Pt ci Page 6 12461a — V. Description of the invention (3) layer, and separately expose the connection line, and grounding / power supply The above-mentioned connection between the wire and the above-mentioned contact, but without covering the point, forms a cover layer, covering the exposed above-mentioned contact connected to the above-mentioned contact; a metal layer · connection is formed by electroplating. In addition to the above-mentioned cover layer; and remove the above-mentioned features of the present invention ».

Une) and the connection without V, is to use the ground / power line (ground, power, ground; electricity); II students need only one electric mine line to connect the above plating line and ground / 5 J :: line, when plating , The current can be plated through the upper contact-all belong to Λ, the contacts that reach the connection line, and the above-mentioned gold layer is cut off. Then, only one piece of electroplating is left in the following way: ground / power The electrical connection of the wires. Finally, the electricity of the sub-products of the board. The printed electricity manufactured is used, and the endpoints can be: conductive fingers or pads; and in order to make the μ of the present invention significantly easier Understood, the following are enumerated-° other goals, characteristics, and advantages can be explained in detail as follows: more consistent examples, and in conjunction with the accompanying drawings, f

Eyes on McCaw 2A

The printed embodiment of the preferred embodiment is illustrated as a top view of a row. Please refer to FIG. 2A; + AA e no k for a substrate 2 0 0. When you want to make and produce printed circuit boards, ^ slave clothes made ,, .., λ ^ substrate 2000 is a dielectric such as jealousy (PO1 y 1 m 1 de), etc .; Private shells such as 5 face Yiyi layer circuit when printed circuit board,

0 can be a core ~ (c ore) substrate, for example, can be composed of ceramic materials, organic materials ^ fiber-reinforced organic materials (Fiber-reinforced) or particle-reinforced shellfish (Particle ~ reinfrced), etc. Oxygen tree. Epoxy resin, polyimide, bis-succinic acid, 5 fe-fe / diazine-based resin, Cyanate ester, etc. It can also be a core substrate whose surface has been covered with a layer of "electrical layer" to complete the core circuit layout. A surface of the substrate 200, especially a surface for adhering an external component, has a peripheral region 201 and a Circuit layout area 2 03; When a printed circuit board for a GA-sealed I substrate is to be manufactured, the circuit layout area 2 03 may further include a wafer adhesion area 2 02. The following diagrams 2B to 21 only show A representative area of the substrate 2000 is taken to illustrate the implementation steps of the present invention, which are simplified diagrams, which only show the structural units related to the present invention in an unintended manner, and the above structure may not necessarily be early. Is the actual number and shape of the specific implementation , Foot and plotted embodiment. Next circuit layer 210 'are formed are shown in FIG 2B~2C on the surface of the substrate 2〇〇.

In Figure 2B, it is a printed circuit board used to form a single layer, such as a flexible printed circuit board or a packaging substrate for a thin BGA package. This is: :: Used substrate 2 0 0 (shown in The material of 2aei) is usually polymethylene. The one shown in FIG. 2B is used to form a coating substrate for a thin bga body spoon, and its circuit layout area 203 further includes a wafer adhesion area 200, and the formation of the circuit layer 210 is on the substrate 200. (Shown in Figure 28)

1246380 V. Description of the invention (5) After laying a metal layer such as a copper layer, the above copper layer is patterned into a circuit layer 2 10; or directly on the substrate 2000 in a physical vapor phase in accordance with a predetermined pattern Deposition, such as sputtering or metal chemical vapor deposition, forms the spring layer 2 1 0. In the circuit layer 2 1 〇, the plating bus (p 1 aung bus) 21 1 is located on the peripheral area 2i 1 of the substrate 2 0 (please refer to FIG. 28 together) 'ground / power line (gr und / p 0 wer π ne) 2 1 2 is located on the line layout area 2 0 3; the plating line 213 forms an electrical connection between the plating bus line 211 and the ground / power line 2 1 2; the connecting line 2 丨 4 has A first terminal 214a, a second terminal 214b, and a contact 214c. The first terminal 214a is electrically connected to the ground / power line 212, and the connecting line 214 extends from the ground / power line 2 12 to the second end. The point 214b, the contact 2 14c is located between the ground / power line 212 and the second terminal 2 14b. The ground / power line 212 is usually disposed immediately outside the wafer adhesion area 202, and may completely or only partially surround the wafer adhesion area 202. The second end point 214b shown in FIG. 2B is a solder pad. In a later process, the substrate 2000 is patterned on the uranium plating metal layer on another surface not shown in the plan view. The other surface of the second end point 214 | 3 is exposed on the other surface, so that in the subsequent electroplating process, a metal layer is plated on the other surface of the second end point 2b and the contact point 214c. The contact shown in FIG. 2B is “a finger”. In FIG. 2C, it is used to form a multi-layer printed circuit board and a packaging substrate for a BGA package. Circuit layer 2 The formation of 10, the components and their connection can be referred to the description in Figure 2B, and will not be repeated here. However, the first end point 2 1 4 b here is a via, and the contact point 2 1 4 c As a conductive finger

0646-A20407TWF (N1); ASEK86 5; dwwang.p t d p.9 S Ϊ is connected to the substrate 2 °. (Shown in Figure 2A) another-on the surface a " 〇 coaster 261. However, the connecting wire 2 60 is not related to the characteristics of the invention of the solder pad 261, so the subsequent drawings omit the non-relationship of the second pad 261, and the steps shown in the figure from i2D to 21 are continuations. In Figure 2c. = 心 = The artist can also continue the same steps to the 26th person, which is omitted here and will not be repeated. The 2D picture of the next clear tea test 'formation-patterned solder mask 230 overlays the main position on the soil plate 2 0 0 (India Cordia 2A picture) and the circuit layer 210 ( Please refer to D, figure ...), the solder resist 23 preferably has a first opening 231 and a second opening 1 231 exposed on the ground / power line 212 (please refer to Figure ZC) and the contact 2 1 4 C's Psl's i-Car Travel Green 9 1/1 Bubu (the connection line 214, the second opening 2 3 2 is exposed Ϊ: 二 ', those who are familiar with this skill can also form another-as required. The connection line 2 60 shown in the figure, and the exposed surface " 塾 "b 1 〇94n, then please refer to the first redundant figure, forming a cover layer i 盍 on the first port 231, the exposed inside Connection line 21 4 (please refer to Figure 2d). The cover 屌 ΙΓΛ is preferably insoluble in water or water-proof material f, in order to prevent the plating solution from contacting the connection within the first opening 2 in the subsequent plating g. Wire 2U .: J-P-The connecting wire 214 in the shoulder 231 is plated with a metal layer such as a nickel / gold layer due to contact with the plating solution, because in particular, the gold in the above nickel / gold layer is a chemically inert element Will hinder Continue the steps of etching the connection line 2 1 4 in the opening 231. Please refer to FIG. 2F next. In the plating solution, make the current flow from the plating bus line 2 11 through the plating line 2 1 3. Ground / power line 2 丨 2, reach the exposed

1246380 ___... V. Description of the invention (7) The contact 214c is plated with a metal layer 2 50 such as a nickel / gold layer. Furthermore, the metal layer 2 50 may be plated on the pads 261 shown in FIG. 2C at the same time or separately. · · Please refer to Figure 2G next, remove the mask layer in the first opening 231-240 〇 Finally, please refer to Figure 2 Η, and remove the exposed part of the first opening 2 3 1 by, for example, etching. Connection line 2 1 4. In Fig. 2I, the solder resist layer 2 30 is regarded as transparent, and the wiring layer 2 10 below it is shown. Since the connection line 214 in the first opening 2 31 has been removed, the electrical connection between the connection line 214 and the ground / power line 212 is cut off. The electrical connection between the ground / power line 2 1 2 and the plating bus line 2 1 1 'can be used to cut off the substrate 2 in the subsequent forming process. 0 0 peripheral area 2 1 1' simultaneously cut off the plating bus line 2 11 and was cut off. As mentioned above, the present invention uses the ground / power line 2 1 2 and the connection line 2 to be electrically connected. At least one electroplated line 2 1 3 is required to connect the ground / power line 2 1 2 to the electroplated bus line 2 1 1. During electroplating, the current can reach the contact 214c on the connection line 214 through the plating line 2 丄 3 and the ground / power line 212, and the contact 2 1 4 c is plated with a nickel / gold layer 2 50. Then, the electrical connection between the connection line 2 1 4 and the ground / power line 2 1 2 is cut by etching. Finally, at least one plating line 2 1 3 remains, without adversely affecting the electrical properties of the electronic product using the printed circuit ^ manufactured, which achieves the above-mentioned main object of the present invention. However, the present invention has been disclosed in the preferred embodiment as above, and the present invention is limited. Anyone skilled in this art can make some changes and retouch without departing from the scope and scope of the present invention. Therefore, the present invention =

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1246380

0646-A20407TWF (N1); ASEK865; dwwang.p td 1246380_— A brief description of the drawing Figure 1 is a top view showing a conventional printed circuit board. Figures 2A to 2I are a series of top views showing the flow of a method for manufacturing a printed circuit board according to a preferred embodiment of the present invention. ^ Explanation of symbols 1 2 0 ~ Wafer mounting area 1 3 0 ~ Solder pad 1 4 0 ~ Conductive finger 1 5 0 ~ Conductive trace 1 6 0 ~ Via hole 1 7 0 ~ Conductor 1 8 0 ~ Plating bus line 1 8 1 ~ Branch plating line 2 0 0 ~ Substrate 201 ~ Peripheral area 2 0 2 ~ Wafer adhesion area 2 0 3 ~ Line layout area 2 1 0 ~ Line layer 2 1 1 ~ Plating bus line 2 1 2 ~ Ground / power line 2 1 3 ~ plated wire 2 1 4 ~ connecting wire 2 1 4 a ~ first terminal 2 1 4 b ~ second terminal 2 1 4 c ~ contact

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Claims (1)

Patent application scope 1 · A method for manufacturing a printed circuit board, comprising: a circuit providing a substrate, the substrate / surface has a peripheral area and a circuit layer is formed on the surface, and includes: 1 atingbus) in the surrounding area; ground / power line (grund / power 1 ine) in the Xi area a; y Jiubian line layout a plating line, electrically connect the plating bus line and the line; and X ground /power supply A connection line extends from the ground / power line and has a connection. The contact is located between the ground / power line and the end point; a patterned solder mask is formed to cover the substrate and the circuit layer. The connection " knife point " between the ground / power line and the contact is exposed; ^ The wiring and the connection form a cover layer to cover the exposed connection line. The point · Renhe covers the connection with electroplating Method, forming a metal layer at the contact; removing the cover layer; and removing the exposed connecting line. Method 2. Printing as described in item 1 of Shenyan's patent scope where the circuit layer is copper. Manufacturer of circuit boards Manufacturer of circuit board 3. The printing method as described in item 1 of the scope of patent application, wherein the contact is a conductive finger. 4 _Manufacturer of printed circuit board as described in item 1 of the scope of patent application J246380 ▽, patent application method, where the endpoint is a pad.印刷 The printed circuit described in item 1 of the scope of patent application, wherein the terminal is a via. The manufacturer of the circuit board 6. The printing tape as described in item 5 of the scope of the patent application. The substrate further includes a soldering pad at the other of the manufacturing points of the circuit board to electrically connect the connecting wire to the soldering pad. . , Surface, and pass through the end 7. The print as described in item 6 of the patent application range wherein the metal layer is further formed on the pad. The manufacturer of the reverse 8. The printing life as described in item 丨 of the patent application, wherein the metal layer is a nickel / gold layer. The manufacturer of the package 9 · If the scope of patent application is the first! The printing described in the item further includes removing the exposed connection line by etching. A method for manufacturing a printed circuit board includes a substrate, and a surface of the substrate has a peripheral area and a layout area provided by a circuit method. A circuit layer is formed on the surface. Including: a plat ing bus in the peripheral area; a chip adhesion area in the circuit layout area; a ground / power line (grund / power line) on the outside of the chip; An electric forging wire in the area is electrically connected to the electroplated bus line and the grounding power line; and / N a connecting line extending from the grounding / power line, having a through hole and a conductive finger, the conductive finger Located on one of the ground / power line and the via Forming a patterned do not expose the ground / power solder mask layer covering the substrate and the circuit layer, and divide the conductive fingers; "7, the connection line between the conductive fingers, and the. Forming a cover layer, And the electrical finger; the connecting wire exposed by the rear ridge, the value does not cover the conductor in a galvanic manner, W > remove the cover: forming a metal layer on the conductive finger; The connection line ^ ^ " £ P ^ ^ ^ ^ ·: Manufacture of printed circuit board described in item 10 of the patent scope ^ ^ ~ The soil board further includes a solder pad on the other surface and passes through The end point electrically connects the connecting wire to the bonding pad. 1. The method for manufacturing a printed circuit board according to item 2 of the patent application scope, wherein the metal layer is further formed on the bonding pad. 14. The method for manufacturing a printed circuit board as described in the scope of the patent application, wherein the metal layer is a nickel / gold layer. 15. The method for manufacturing a printed circuit board as described in item 10 of the scope of patent application, further comprising removing the exposed connection lines by etching. 0646-A20407TWF (N1); ASEK86 5; dwwang.p t d p. 17