TW200509371A - Power voltage line layout of semiconductor cells using active area - Google Patents

Power voltage line layout of semiconductor cells using active area

Info

Publication number
TW200509371A
TW200509371A TW093125459A TW93125459A TW200509371A TW 200509371 A TW200509371 A TW 200509371A TW 093125459 A TW093125459 A TW 093125459A TW 93125459 A TW93125459 A TW 93125459A TW 200509371 A TW200509371 A TW 200509371A
Authority
TW
Taiwan
Prior art keywords
active area
voltage line
power voltage
line layout
semiconductor cells
Prior art date
Application number
TW093125459A
Other languages
English (en)
Inventor
Yong-Sub Kim
Original Assignee
Samsung Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Publication of TW200509371A publication Critical patent/TW200509371A/zh

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/0203—Particular design considerations for integrated circuits
    • H01L27/0207—Geometrical layout of the components, e.g. computer aided design; custom LSI, semi-custom LSI, standard cell technique
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/10—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
    • H01L27/118—Masterslice integrated circuits
    • H01L27/11803—Masterslice integrated circuits using field effect technology
    • H01L27/11807—CMOS gate arrays

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Engineering & Computer Science (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Semiconductor Integrated Circuits (AREA)
TW093125459A 2003-08-28 2004-08-26 Power voltage line layout of semiconductor cells using active area TW200509371A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR10-2003-0059826A KR100532464B1 (ko) 2003-08-28 2003-08-28 액티브를 이용한 반도체 셀의 전원선 레이아웃

Publications (1)

Publication Number Publication Date
TW200509371A true TW200509371A (en) 2005-03-01

Family

ID=34214725

Family Applications (1)

Application Number Title Priority Date Filing Date
TW093125459A TW200509371A (en) 2003-08-28 2004-08-26 Power voltage line layout of semiconductor cells using active area

Country Status (4)

Country Link
US (1) US20050045916A1 (zh)
JP (1) JP2005079594A (zh)
KR (1) KR100532464B1 (zh)
TW (1) TW200509371A (zh)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103035639A (zh) * 2011-10-06 2013-04-10 台湾积体电路制造股份有限公司 集成电路及其设计方法

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5638760B2 (ja) 2008-08-19 2014-12-10 ルネサスエレクトロニクス株式会社 半導体装置
US10424574B2 (en) 2017-01-23 2019-09-24 International Business Machines Corporation Standard cell architecture with at least one gate contact over an active area
US11211330B2 (en) 2017-05-01 2021-12-28 Advanced Micro Devices, Inc. Standard cell layout architectures and drawing styles for 5nm and beyond
US11347925B2 (en) * 2017-05-01 2022-05-31 Advanced Micro Devices, Inc. Power grid architecture and optimization with EUV lithography

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62119936A (ja) * 1985-11-19 1987-06-01 Fujitsu Ltd コンプリメンタリ−ｌｓｉチツプ
US5923060A (en) * 1996-09-27 1999-07-13 In-Chip Systems, Inc. Reduced area gate array cell design based on shifted placement of alternate rows of cells
JP3819186B2 (ja) * 1999-09-22 2006-09-06 株式会社東芝 スタンダードセル、半導体集積回路およびそのレイアウト方法
JP2003282880A (ja) * 2002-03-22 2003-10-03 Hitachi Displays Ltd 表示装置
US6803610B2 (en) * 2002-09-30 2004-10-12 Mosaid Technologies Incorporated Optimized memory cell physical arrangement

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103035639A (zh) * 2011-10-06 2013-04-10 台湾积体电路制造股份有限公司 集成电路及其设计方法
CN103035639B (zh) * 2011-10-06 2016-06-08 台湾积体电路制造股份有限公司 集成电路及其设计方法

Also Published As

Publication number Publication date
JP2005079594A (ja) 2005-03-24
KR100532464B1 (ko) 2005-12-01
KR20050023530A (ko) 2005-03-10
US20050045916A1 (en) 2005-03-03

Similar Documents

Publication Publication Date Title
TWI240488B (en) Semiconductor integrated circuit
TW200518317A (en) Memory cell structure
EP1265254A3 (en) Semiconductor device
TW200606943A (en) SRAM employing virtual rail scheme stable against various process-voltage-temperature variations
TW200737664A (en) Charge pump circuit and semiconductor device having the same
SG135930A1 (en) Cmos inverters configured using multiple-gate transistors
TW200503179A (en) Integration method of a semiconductor device having a recessed gate electrode
WO2002071612A3 (en) Sub-micron high input voltage tolerant input output (i/o) circuit which accommodates large power supply variations
TW200511062A (en) Standard cell back bias architecture
TW328641B (en) Semiconductor integrated circuit device and process for producing the same
WO2007022491A3 (en) Integrated circuits with reduced leakage current
TW200518350A (en) Integrated circuit device, semiconductor device and fabrication method thereof
TW200614489A (en) Separately strained n-channel and p-channel transistors
TW200636991A (en) Integrated circuit including power diode
TW200718012A (en) Semiconductor integrated circuit having current leakage reduction scheme
TW200520199A (en) Electrostatic breakdown protection device
TW200710865A (en) Semiconductor memory device
TW200609716A (en) Power-on reset circuit
TW200720877A (en) Regulator circuit
WO2005057628A3 (en) A method and apparatus for reducing leakage in integrated circuits
WO2004044916A3 (en) Low standby power sram
TW200627449A (en) Memory device
TW200623632A (en) Adiabatic cmos design
ATE405990T1 (de) Mos-schaltnetzwerk
TWI264732B (en) Input/output circuit