TW200518317A - Memory cell structure - Google Patents

Memory cell structure

Info

Publication number
TW200518317A
TW200518317A TW093121715A TW93121715A TW200518317A TW 200518317 A TW200518317 A TW 200518317A TW 093121715 A TW093121715 A TW 093121715A TW 93121715 A TW93121715 A TW 93121715A TW 200518317 A TW200518317 A TW 200518317A
Authority
TW
Taiwan
Prior art keywords
memory cell
shorter
reduces
errors
cell structure
Prior art date
Application number
TW093121715A
Other languages
Chinese (zh)
Other versions
TWI242284B (en
Inventor
Jhon-Jhy Liaw
Original Assignee
Taiwan Semiconductor Mfg Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Taiwan Semiconductor Mfg Co Ltd filed Critical Taiwan Semiconductor Mfg Co Ltd
Publication of TW200518317A publication Critical patent/TW200518317A/en
Application granted granted Critical
Publication of TWI242284B publication Critical patent/TWI242284B/en

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/412—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using field-effect transistors only
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B10/00—Static random access memory [SRAM] devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B10/00—Static random access memory [SRAM] devices
    • H10B10/12—Static random access memory [SRAM] devices comprising a MOSFET load element
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S257/00—Active solid-state devices, e.g. transistors, solid-state diodes
    • Y10S257/903—FET configuration adapted for use as static memory cell

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Semiconductor Memories (AREA)

Abstract

A memory structure that reduces soft-errors for us in CMOS devices is provided. The memory cell layout utilizes transistors oriented such that the source-to-drain axis is parallel a shorted side of the memory cell. The dimensions of the memory cell are such that is has a longer side and a shorter side, wherein the longer side is preferably about twice as long as the shorter side. Such an arrangement uses a shorter well path to reduce the resistance between transistors and the well strap. The shorter well strap reduces the voltage during operation and soft errors.
TW093121715A 2003-11-26 2004-07-21 Memory cell structure TWI242284B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US10/723,331 US7023056B2 (en) 2003-11-26 2003-11-26 Memory cell structure

Publications (2)

Publication Number Publication Date
TW200518317A true TW200518317A (en) 2005-06-01
TWI242284B TWI242284B (en) 2005-10-21

Family

ID=34592238

Family Applications (1)

Application Number Title Priority Date Filing Date
TW093121715A TWI242284B (en) 2003-11-26 2004-07-21 Memory cell structure

Country Status (4)

Country Link
US (2) US7023056B2 (en)
CN (2) CN1319174C (en)
SG (1) SG121879A1 (en)
TW (1) TWI242284B (en)

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US7023056B2 (en) * 2003-11-26 2006-04-04 Taiwan Semiconductor Manufacturing Company, Ltd. Memory cell structure
EP1730777B1 (en) * 2004-04-01 2007-09-19 Soisic Improved layout of a sram memory cell
US7372720B1 (en) * 2005-02-16 2008-05-13 Altera Corporation Methods and apparatus for decreasing soft errors and cell leakage in integrated circuit structures
EP1899877A4 (en) * 2005-06-27 2011-12-28 Arithmosys Inc Method for specifying stateful, transaction-oriented systems and apparatus for flexible mapping to structurally configurable in-memory processing semiconductor device
CN1893084A (en) * 2005-07-07 2007-01-10 松下电器产业株式会社 Semiconductor device
US7405994B2 (en) * 2005-07-29 2008-07-29 Taiwan Semiconductor Manufacturing Company, Ltd. Dual port cell structure
US7547947B2 (en) * 2005-11-15 2009-06-16 International Business Machines Corporation SRAM cell
US7800184B2 (en) * 2006-01-09 2010-09-21 International Business Machines Corporation Integrated circuit structures with silicon germanium film incorporated as local interconnect and/or contact
US7477541B2 (en) * 2006-02-14 2009-01-13 International Business Machines Corporation Memory elements and methods of using the same
US7269056B1 (en) * 2006-04-27 2007-09-11 Taiwan Semiconductor Manufacturing Company, Ltd. Power grid design for split-word line style memory cell
JP4949734B2 (en) * 2006-05-17 2012-06-13 ルネサスエレクトロニクス株式会社 Semiconductor device and design method thereof
US7359272B2 (en) * 2006-08-18 2008-04-15 Taiwan Semiconductor Manufacturing Company, Ltd. Circuit and method for an SRAM with reduced power consumption
US7869262B2 (en) * 2007-01-29 2011-01-11 Taiwan Semiconductor Manufacturing Co., Ltd. Memory device with an asymmetric layout structure
US7671422B2 (en) * 2007-05-04 2010-03-02 Taiwan Semiconductor Manufacturing Company, Ltd. Pseudo 6T SRAM cell
US7944033B2 (en) * 2007-10-18 2011-05-17 Infineon Technologies Ag Power semiconductor module
US7851267B2 (en) * 2007-10-18 2010-12-14 Infineon Technologies Ag Power semiconductor module method
US7957178B2 (en) * 2008-01-04 2011-06-07 Texas Instruments Incorporated Storage cell having buffer circuit for driving the bitline
KR100971552B1 (en) * 2008-07-17 2010-07-21 삼성전자주식회사 Flash memory device and the method of operating the same
US8004042B2 (en) * 2009-03-20 2011-08-23 Taiwan Semiconductor Manufacturing Company, Ltd. Static random access memory (SRAM) cell and method for forming same
US8824226B2 (en) * 2009-04-02 2014-09-02 Taiwan Semiconductor Manufacturing Company, Ltd. Providing capacitors to improve radiation hardening in memory elements
US8441829B2 (en) 2009-06-12 2013-05-14 Taiwan Semiconductor Manufacturing Company, Ltd. Stable SRAM cell
US8399931B2 (en) 2010-06-30 2013-03-19 Taiwan Semiconductor Manufacturing Company, Ltd. Layout for multiple-fin SRAM cell
US8675397B2 (en) 2010-06-25 2014-03-18 Taiwan Semiconductor Manufacturing Company, Ltd. Cell structure for dual-port SRAM
WO2012012538A2 (en) * 2010-07-20 2012-01-26 University Of Virginia Patent Foundation Memory cell
KR20120101911A (en) * 2011-03-07 2012-09-17 삼성전자주식회사 Sram cell
US8816403B2 (en) * 2011-09-21 2014-08-26 Taiwan Semiconductor Manufacturing Co., Ltd. Efficient semiconductor device cell layout utilizing underlying local connective features
US8717798B2 (en) * 2011-09-23 2014-05-06 Taiwan Semiconductor Manufacturing Co., Ltd. Layout for semiconductor memories
US8406028B1 (en) 2011-10-31 2013-03-26 Taiwan Semiconductor Manufacturing Co., Ltd. Word line layout for semiconductor memory
US8582352B2 (en) * 2011-12-06 2013-11-12 Taiwan Semiconductor Manufacturing Company, Ltd. Methods and apparatus for FinFET SRAM cells
US8693235B2 (en) 2011-12-06 2014-04-08 Taiwan Semiconductor Manufacturing Company, Ltd. Methods and apparatus for finFET SRAM arrays in integrated circuits
US8625334B2 (en) * 2011-12-16 2014-01-07 Taiwan Semiconductor Manufacturing Company, Ltd. Memory cell
US9041117B2 (en) 2012-07-31 2015-05-26 Taiwan Semiconductor Manufacturing Company, Ltd. SRAM cell connection structure
US9165642B2 (en) * 2013-01-22 2015-10-20 Stmicroelectronics International N.V. Low voltage dual supply memory cell with two word lines and activation circuitry
US9400711B2 (en) 2014-04-14 2016-07-26 Freescale Semiconductor, Inc. Content addressable memory with error detection
US9646973B2 (en) * 2015-03-27 2017-05-09 Taiwan Semiconductor Manufacturing Company, Ltd. Dual-port SRAM cell structure with vertical devices
US10411019B2 (en) 2015-10-20 2019-09-10 Taiwan Semiconductor Manufacturing Co., Ltd. SRAM cell word line structure with reduced RC effects
US10134737B2 (en) 2015-12-29 2018-11-20 Taiwan Semiconductor Manufacturing Co., Ltd. Memory device with reduced-resistance interconnect
US10290640B1 (en) * 2017-10-22 2019-05-14 United Microelectronics Corp. Static random access memory cell and static memory circuit
CN109904159A (en) * 2017-12-08 2019-06-18 联华电子股份有限公司 Semiconductor element
CN110310689A (en) * 2018-03-20 2019-10-08 中芯国际集成电路制造(上海)有限公司 Dual-port static random access memory unit and electronic equipment including it
US11404423B2 (en) 2018-04-19 2022-08-02 Taiwan Semiconductor Manufacturing Co., Ltd Fin-based strap cell structure for improving memory performance
US11488967B2 (en) * 2021-03-25 2022-11-01 Globalfoundries U.S. Inc. Eight-transistor static random access memory cell

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JP4357101B2 (en) * 2000-08-23 2009-11-04 株式会社ルネサステクノロジ Semiconductor memory device
TW522546B (en) 2000-12-06 2003-03-01 Mitsubishi Electric Corp Semiconductor memory
KR100390905B1 (en) * 2001-05-10 2003-07-12 주식회사 하이닉스반도체 Structure of layout for sense amplifier in semiconductor memory
US6624526B2 (en) * 2001-06-01 2003-09-23 International Business Machines Corporation Compact SRAM cell incorporating refractory metal-silicon-nitrogen resistive elements and method for fabricating
JP2003218238A (en) * 2001-11-14 2003-07-31 Mitsubishi Electric Corp Semiconductor memory device
JP2004022809A (en) * 2002-06-17 2004-01-22 Renesas Technology Corp Semiconductor memory device
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US6649456B1 (en) * 2002-10-16 2003-11-18 Taiwan Semiconductor Manufacturing Company SRAM cell design for soft error rate immunity
US6924560B2 (en) * 2003-08-08 2005-08-02 Taiwan Semiconductor Manufacturing Co., Ltd. Compact SRAM cell with FinFET
US7023056B2 (en) * 2003-11-26 2006-04-04 Taiwan Semiconductor Manufacturing Company, Ltd. Memory cell structure
US7002258B2 (en) * 2003-12-03 2006-02-21 Arm Physical Ip, Inc. Dual port memory core cell architecture with matched bit line capacitances

Also Published As

Publication number Publication date
US20050111251A1 (en) 2005-05-26
US20060131614A1 (en) 2006-06-22
US7023056B2 (en) 2006-04-04
CN2751445Y (en) 2006-01-11
SG121879A1 (en) 2006-05-26
CN1319174C (en) 2007-05-30
CN1622333A (en) 2005-06-01
TWI242284B (en) 2005-10-21
US7271451B2 (en) 2007-09-18

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