TW200509244A - A selective etch process for making a semiconductor device having a high-k gate dielectric - Google Patents

A selective etch process for making a semiconductor device having a high-k gate dielectric

Info

Publication number
TW200509244A
TW200509244A TW093125596A TW93125596A TW200509244A TW 200509244 A TW200509244 A TW 200509244A TW 093125596 A TW093125596 A TW 093125596A TW 93125596 A TW93125596 A TW 93125596A TW 200509244 A TW200509244 A TW 200509244A
Authority
TW
Taiwan
Prior art keywords
gate dielectric
making
semiconductor device
etch process
selective etch
Prior art date
Application number
TW093125596A
Other languages
English (en)
Other versions
TWI239563B (en
Inventor
Justin Brask
Uday Shah
Mark Doczy
Jack Kavalieros
Robert Chau
Turkot, Jr
Matthew Metz
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Publication of TW200509244A publication Critical patent/TW200509244A/zh
Application granted granted Critical
Publication of TWI239563B publication Critical patent/TWI239563B/zh

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/311—Etching the insulating layers by chemical or physical means
    • H01L21/31105—Etching inorganic layers
    • H01L21/31111—Etching inorganic layers by chemical means
TW093125596A 2003-08-28 2004-08-26 A selective etch process for making a semiconductor device having a high-k gate dielectric TWI239563B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US10/652,546 US7037845B2 (en) 2003-08-28 2003-08-28 Selective etch process for making a semiconductor device having a high-k gate dielectric

Publications (2)

Publication Number Publication Date
TW200509244A true TW200509244A (en) 2005-03-01
TWI239563B TWI239563B (en) 2005-09-11

Family

ID=34104750

Family Applications (1)

Application Number Title Priority Date Filing Date
TW093125596A TWI239563B (en) 2003-08-28 2004-08-26 A selective etch process for making a semiconductor device having a high-k gate dielectric

Country Status (6)

Country Link
US (1) US7037845B2 (zh)
EP (1) EP1511073A1 (zh)
KR (1) KR100716689B1 (zh)
CN (1) CN1591786B (zh)
TW (1) TWI239563B (zh)
WO (1) WO2005024929A1 (zh)

Families Citing this family (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7037863B2 (en) * 2002-09-10 2006-05-02 Samsung Electronics Co., Ltd. Post thermal treatment methods of forming high dielectric layers over interfacial layers in integrated circuit devices
US7413996B2 (en) * 2003-04-14 2008-08-19 Lsi Corporation High k gate insulator removal
US20050064716A1 (en) * 2003-04-14 2005-03-24 Hong Lin Plasma removal of high k metal oxide
JP2005038897A (ja) * 2003-07-15 2005-02-10 Dainippon Screen Mfg Co Ltd 基板処理方法及びその装置
JPWO2005013374A1 (ja) * 2003-08-05 2006-09-28 富士通株式会社 半導体装置および半導体装置の製造方法
US7037845B2 (en) 2003-08-28 2006-05-02 Intel Corporation Selective etch process for making a semiconductor device having a high-k gate dielectric
US7153734B2 (en) 2003-12-29 2006-12-26 Intel Corporation CMOS device with metal and silicide gate electrodes and a method for making it
US7144783B2 (en) * 2004-04-30 2006-12-05 Intel Corporation Reducing gate dielectric material to form a metal gate electrode extension
US7564108B2 (en) * 2004-12-20 2009-07-21 Taiwan Semiconductor Manufacturing Company, Ltd. Nitrogen treatment to improve high-k gate dielectrics
US20080001237A1 (en) * 2006-06-29 2008-01-03 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor device having nitrided high-k gate dielectric and metal gate electrode and methods of forming same
US20080315310A1 (en) * 2007-06-19 2008-12-25 Willy Rachmady High k dielectric materials integrated into multi-gate transistor structures
US7645663B2 (en) 2007-07-18 2010-01-12 Infineon Technologies Ag Method of producing non volatile memory device
US8247861B2 (en) 2007-07-18 2012-08-21 Infineon Technologies Ag Semiconductor device and method of making same
US7998820B2 (en) * 2007-08-07 2011-08-16 Taiwan Semiconductor Manufacturing Company, Ltd. High-k gate dielectric and method of manufacture
US8030163B2 (en) * 2007-12-26 2011-10-04 Intel Corporation Reducing external resistance of a multi-gate device using spacer processing techniques
US7763943B2 (en) * 2007-12-26 2010-07-27 Intel Corporation Reducing external resistance of a multi-gate device by incorporation of a partial metallic fin
US20090206404A1 (en) * 2008-02-15 2009-08-20 Ravi Pillarisetty Reducing external resistance of a multi-gate device by silicidation
US8264048B2 (en) * 2008-02-15 2012-09-11 Intel Corporation Multi-gate device having a T-shaped gate structure
US8101495B2 (en) 2008-03-13 2012-01-24 Infineon Technologies Ag MIM capacitors in semiconductor components
KR101634748B1 (ko) 2009-12-08 2016-07-11 삼성전자주식회사 트랜지스터의 제조방법 및 그를 이용한 집적 회로의 형성방법
US9570573B1 (en) 2015-08-10 2017-02-14 Globalfoundries Inc. Self-aligned gate tie-down contacts with selective etch stop liner
US9905671B2 (en) 2015-08-19 2018-02-27 International Business Machines Corporation Forming a gate contact in the active area

Family Cites Families (37)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL188432C (nl) * 1980-12-26 1992-06-16 Nippon Telegraph & Telephone Werkwijze voor het vervaardigen van een mosfet.
JPH05175174A (ja) * 1991-12-20 1993-07-13 Nec Corp 誘電体膜の反応性ドライエッチング方法
AU5669794A (en) * 1992-12-11 1994-07-04 Intel Corporation A mos transistor having a composite gate electrode and method of fabrication
US5368687A (en) * 1993-03-15 1994-11-29 Micron Technology, Inc. Semiconductor processing method of etching insulating inorganic metal oxide materials and method of cleaning metals from the surface of semiconductor wafers
US5516399A (en) * 1994-06-30 1996-05-14 International Business Machines Corporation Contactless real-time in-situ monitoring of a chemical etching
US5753560A (en) * 1996-10-31 1998-05-19 Motorola, Inc. Method for fabricating a semiconductor device using lateral gettering
US5891798A (en) * 1996-12-20 1999-04-06 Intel Corporation Method for forming a High dielectric constant insulator in the fabrication of an integrated circuit
US6063698A (en) * 1997-06-30 2000-05-16 Motorola, Inc. Method for manufacturing a high dielectric constant gate oxide for use in semiconductor integrated circuits
US6087261A (en) * 1997-09-30 2000-07-11 Fujitsu Limited Method for production of semiconductor device
US20020197790A1 (en) * 1997-12-22 2002-12-26 Kizilyalli Isik C. Method of making a compound, high-K, gate and capacitor insulator layer
US6121094A (en) * 1998-07-21 2000-09-19 Advanced Micro Devices, Inc. Method of making a semiconductor device with a multi-level gate structure
US6320244B1 (en) * 1999-01-12 2001-11-20 Agere Systems Guardian Corp. Integrated circuit device having dual damascene capacitor
JP2000216142A (ja) * 1999-01-22 2000-08-04 Tokyo Electron Ltd エッチング方法
FR2797999B1 (fr) * 1999-08-31 2003-08-08 St Microelectronics Sa Procede de fabrication d'une capacite integree sur un substrat de silicium
US6184072B1 (en) * 2000-05-17 2001-02-06 Motorola, Inc. Process for forming a high-K gate dielectric
US6432779B1 (en) * 2000-05-18 2002-08-13 Motorola, Inc. Selective removal of a metal oxide dielectric
US6475974B1 (en) * 2000-09-01 2002-11-05 Dow Corning Corporation Mechanical microemulsions of blended silicones
US6660660B2 (en) * 2000-10-10 2003-12-09 Asm International, Nv. Methods for making a dielectric stack in an integrated circuit
JP2002134739A (ja) * 2000-10-19 2002-05-10 Mitsubishi Electric Corp 半導体装置及びその製造方法
US6475874B2 (en) * 2000-12-07 2002-11-05 Advanced Micro Devices, Inc. Damascene NiSi metal gate high-k transistor
US6544906B2 (en) * 2000-12-21 2003-04-08 Texas Instruments Incorporated Annealing of high-k dielectric materials
US6514828B2 (en) * 2001-04-20 2003-02-04 Micron Technology, Inc. Method of fabricating a highly reliable gate oxide
US6420279B1 (en) * 2001-06-28 2002-07-16 Sharp Laboratories Of America, Inc. Methods of using atomic layer deposition to deposit a high dielectric constant material on a substrate
US6677254B2 (en) * 2001-07-23 2004-01-13 Applied Materials, Inc. Processes for making a barrier between a dielectric and a conductor and products produced therefrom
US6573193B2 (en) 2001-08-13 2003-06-03 Taiwan Semiconductor Manufacturing Co., Ltd Ozone-enhanced oxidation for high-k dielectric semiconductor devices
US6797599B2 (en) * 2001-08-31 2004-09-28 Texas Instruments Incorporated Gate structure and method
US6667246B2 (en) * 2001-12-04 2003-12-23 Matsushita Electric Industrial Co., Ltd. Wet-etching method and method for manufacturing semiconductor device
US6455330B1 (en) * 2002-01-28 2002-09-24 Taiwan Semiconductor Manufacturing Company Methods to create high-k dielectric gate electrodes with backside cleaning
US6617209B1 (en) * 2002-02-22 2003-09-09 Intel Corporation Method for making a semiconductor device having a high-k gate dielectric
US6764898B1 (en) * 2002-05-16 2004-07-20 Advanced Micro Devices, Inc. Implantation into high-K dielectric material after gate etch to facilitate removal
US6617210B1 (en) * 2002-05-31 2003-09-09 Intel Corporation Method for making a semiconductor device having a high-k gate dielectric
US20040129674A1 (en) * 2002-08-27 2004-07-08 Tokyo Electron Limited Method and system to enhance the removal of high-k dielectric materials
JP2006501651A (ja) * 2002-09-27 2006-01-12 東京エレクトロン株式会社 Ｈｉｇｈ−ｋ誘電材料をエッチングするための方法及びシステム
US6696327B1 (en) * 2003-03-18 2004-02-24 Intel Corporation Method for making a semiconductor device having a high-k gate dielectric
US7413996B2 (en) * 2003-04-14 2008-08-19 Lsi Corporation High k gate insulator removal
US6855639B1 (en) * 2003-08-01 2005-02-15 Intel Corporation Precise patterning of high-K films
US7037845B2 (en) 2003-08-28 2006-05-02 Intel Corporation Selective etch process for making a semiconductor device having a high-k gate dielectric

Also Published As

Publication number Publication date
US20050048791A1 (en) 2005-03-03
TWI239563B (en) 2005-09-11
EP1511073A1 (en) 2005-03-02
WO2005024929A1 (en) 2005-03-17
CN1591786B (zh) 2010-06-16
CN1591786A (zh) 2005-03-09
US7037845B2 (en) 2006-05-02
KR100716689B1 (ko) 2007-05-09
KR20050021943A (ko) 2005-03-07

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