SU999148A1 - Single pulse shaper - Google Patents

Description

(54) SPRAYER OF SINGLE PULSES

The invention relates to a pulse technique, in particular to devices of digital automatics, and can be used in the design of automatic control devices and computer technology.

A device containing two synchronous UKGtkzhggera and a logical element AND-IE. This device solves the problem of forming a single pulse with a duration equal to the period following the input clock frequency when it is not critical to the duration of the control action (1.

However, the known device has a complex circuit implementation.

The closest technical solution to the present invention is a single pulse shaper, containing two synchronous Dt triggers, each of which consists of three RS asynchronous triggers, and element AND C 2. The famous shaper in the Formation of a single pulse with a duration of pulses clock frequency, but it gives more complex circuit repair, because it contains six Е8-т1жггеров based on which Dt-triggers are made.

The purpose of the invention is to simplify the circuit implementation of a single pulse shaper when a pulse is formed with a duration equal to the following period.

IQ sync pulses. .

The goal is achieved by the fact that in a single pulse shaper containing a synchronous Dt trigger, the D input of which is connected to the zero output of the first asynchronous RS flip-flop, the zero input of which is connected to the unit 1 output of the second asynchronous K8-: trigger, the single input of the first asynchronous The RS flip-flop is connected to the control bus, and the C input of the synchronous Dt-trigger is connected to the sync pulse bus; the single output of the first asynchronous RS flip-flop is connected to the single input of the second

25 asynchronous RS-flip-flop, the zero input of which is connected to the single output of the synchronous Dt-flip-flop.

The drawing shows the functional scheme of the proposed formirog

30 single pulse pulses. A single pulse shaper contains asynchronous triggers (type RS) I and 2, a synchronous trigger (type Dt) 3, a control bus 4, a bus 5 sync pulses, and a bus b. output pulses, Let us accept the state of triggers, in which there is a high potential at the zero (inverse) output, zero-zero, and a condition in which there is a high potential at the unit (direct) output, beyond the unit one. Shaper single pulse works as follows. After turning on the power supply and the arrival of the clock pulses through the bus 5 of the circuits, it is reset to the initial state. In this case, the trigger I is in the zero state, and the triggers 2 and 3 are in the single state. When the control signal of the negative field is received via bus 4, trigger 1 is set to one. . The first voltage drop from low to high, which occurred on bus 5 (the leading edge of the positive clock pulse) /, sets trigger 3 to the zero state. Low potential from the single output of trigger 3 sets three germs 2 to the zero state . Low potential from single output of trigger 2 sets a zero output of a trigger, 1 high voltage level Veli the control signal continues present at a single input of trigger 1, then a high level, present at that time both single and zero trigger outputs 1. The next differential voltage from low to high level received on bus 5 transfers trigger 3 to its initial state and at the zero output of trigger 3 ends the formation of the trailing edge of the output impulse. The subsequent sync pulses coming through bus 5 only confirm the initial state of the trigger, 3 before the end of the control signal. . ,

tl

Claims (2)

At the end of the control signal on bus 4, a low level of power from a single output of trigger 2 trigger 1 returns to its original state and, in turn, a low voltage from a single output returns to its original state trigger 2. At the end of the formation of the output the pulse and the end of the control signal. The former returns to its initial state and is ready to form a new pulse. Thus, a single pulse is generated at the output of the device along the leading edge of the control signal with a duration equal to the clock signal period, regardless of the duration of the control signal. Invention A single pulse shaper comprising a synchronous Dt trigger, the D input of which is connected to the zero output of the first asynchronous RS flip-flop, the zero input of which is connected to the single output of the second asynchronous RS flip-flop, a single input of the nepBot-asynchronous RS trigger connected The control action bus and the C-input of the synchronous Dt-trigger are connected to the clock pulse, which is characterized by the fact that, in order to simplify the circuit implementation during the formation of a pulse with a duration equal to the trace period No sync pulses, the single output of the first asynchronous RS flip-flop is connected to the single input of the second asynchronous RS flip-flop, the zero input of which is Connected to the single output of the synchronous Dt-flip-flop. Sources of information taken into account in the examination 1. The author's certificate of the USSR 580633, cl. H 03 K 5/153, 04.01.76. 2. Gutnikov B.C. Integral electronics, in measuring devices. L., Energie, 1974, p. 114, rice, 61, and (prototype).