SU868825A1 - Device for displaying graphtic information on crt screen - Google Patents

Description

home control unit, the third entrance from the first. the output of the arithmetic unit, the second output of which is connected to the input of the code converter, two shift registers, the first and second inputs of which are connected to the second and third outputs of the synchronization unit, respectively, and the outputs are connected to the inputs of the OR element, the output of which is connected to the first input of the video monitoring unit whose second input is connected to the fourth output of the synchronization unit, the fifth output of which is connected to the second input of the control unit, the second and third memory blocks are entered, and the address generator, the first the input of which is connected to the third output of the arithmetic unit, the second input is connected to the poles by the output of the synchronization unit, the first and second outputs are connected to the first inputs of the second and third memory blocks, and the third and fourth outputs of the address generator are connected to the second and third inputs of the second and the third memory blocks, respectively, the fourth inputs of which are connected to the output of the code converter, the outputs of the second and third memory blocks are connected with the third and fourth inputs of the shift registers, respectively. FIG. 1 shows the structural scheme of the proposed device; in fig. 2 is a functional diagram of the raster memory address formatter; The graphic information display device comprises a block 1-tam, a block 2 of RAM, a block 3 of control, an arithmetic unit 4, a converter 5 of codes, an address generator 6, a second and third blocks 7 and 8 of memory ti, registers 9 and 10, shift, element OR 11, synchronization block 12, video control unit 1 Synchronization unit 12 via bus 14 controls a booth of address address generator 6, and control of operation mode of blocks 7 and 8 performs trigger 1 which is junior home counters ka, its constituent. The address shaper 6 (FIG. 2) holds a read address counter 16, a write address counter 17, a compare block 18 (Register 19 of the last write address, switch 20 of the address, And 21 E-elements. Series 1 connected in memory, block 2 operational Memory arithmetic unit 4, converter 5 codes are connected to the information inputs of blocks 7 and 8. Memories of write, read and most inputs of blocks 7 and 8 are connected to the output of the address maker 6. The second output of the arithmetic unit 4 is connected to the driver b, and the outputs of blocks 7 and 8 are connected to the inputs shift registers 9 and 10, outputs-through the OR element 11 are connected to the first input of the video monitoring unit 13. The input of the control unit 3 is connected to the memory unit 1, and the output is connected to the main memory unit 2. The synchronization unit 12 is connected to the unit 1 memory, control unit 3, address generator 6, synchronization and control inputs of registers 9 and 10, offset, second input of video monitoring unit 13. The device works as follows. In block 1 of the memory, information of one television frame of an image received in exchange mode with the information system is contained. The information is encoded in the form of commands, display. Each command contains a coordinate part and information about the slope and length of the line. The instructions in the cells of the memory block are recorded in the order in which they are displayed on the screen in rows. On each line of the raster, sequential polling of the memory block of the memory I occurs. The code of the line number of the starting point of the line YH from the output of block 1 is fed to the input of the control block, the second input of which receives the code from the output of the bits of the line counter of the synchronization block. If the code of the line number of the initial point of the line Y coincides with the number of the current scan line, increased by two (Y-r + 2), the control unit generates a signal that ensures the command is recorded in the operational memory 2. The next command coming from block 1 is also analyzed and, if the YT- + 2 line of the TV raster complies, is recorded in block 2. Thus, all the commands of the lines starting on line Yr + 2 are written to the RAM memory block. by writing commands to block 2, during the horizontal scanning period, in one of blocks 7 or 8 of the raster memory, a video code is formed corresponding to the image decomposition line following the current one (Yj + 1). To do this, the commands that were written to block 2 on the previous line are read from the RAM block. Code x; the horizontal coordinate of the intersection point of the line with the formed decomposition line, the cotangent code of the angle of inclination and the code of the length of the line L are transferred from the operational memory block to the arithmetic unit 4. The x code of the horizontal coordinate of the intersection point of the line with the generated line is summed in tangent angle. The result is a code x .., the end of the line segments on the line being formed and the code of the horizontal coordinate of the point of intersection of the line with the line following

over molded. In the arithmetic unit 4, the line length code is also modified. Then, the line length code L is subtracted 1. If the result is not zero, this means that the line does not end in the generated string and the command returns - to the operational memory block 4 . If the result of subtracting L.J -1 is zero, then the command in block 4 is not returned.

Codes x and. Are fed to a 5 code converter. The principle of forming the displayed information is that the raster line is divided into groups of decomposition elements, called raster words. A television image of one line is formed in an ordered sequence of raster images. Therefore, each of the codes x and x is broken down into two components. The first component of the code (most significant bits) carries information about the number of the raster word, counted from the beginning of the television line in which lies, the beginning of the formed segment on the given line.

The second component of the code x (least significant bits) is the number of the element counted within the raster word from which the segment begins. The first component of the code x (most significant bits) is the number of the raster word in which the formed segment ends.

The second component (lower order) is the number of the element within the raster word at which the formed segment ends.

A code converter 5 generates a video signal code having a logical value of 1 in bits corresponding to points located on a segment (x,.) Of a television decomposition line. The generated video code is recorded in one of blocks 7 or 8 of raster memory. The record is kept in raster words at the address coming from the imager 6. Memory blocks 7 and 8 work for writing and reading information alternately.

If the trigger 15 is in the single state, then the raster memory block 7 receives the address from the counter 17 and the write pulse from the block 12. At the same time, the block 8 passes the address from the counter 16 and the read pulse from the block 12. The trigger 15 controls the operation of the switch 20 address and elements And 21 (figure 2). When the trigger 15 goes to the zero state, the operation mode of the blocks 7 and 8 changes. In the counter 17, the address of the record and the register 19 of the last address of the record from the arithmetic unit 4 records the highest bits of the codes x., -, and x. , respectively. If the beginning and end

the formed segment lies in one raster word, then the generated video signal code is recorded at one address in the raster memory block. The address is determined by the value of the higher bits of the code m, recorded in 5 counter 17. If the beginning and end of the formed segment is in different raster words, then writing to the raster-memory block occurs as many times as raster words take 0 segment. After each writing, the value of the counter 17 is increased by 1. The recording takes place until the coincidence of the values of the counter 17 of the recording address and the register 19 of the last

15 write address. At the moment of coincidence 1 at the output of the comparison unit 18, a signal is generated that prohibits the passage of pulses to the counting input of the counter 17. This completes the generation of the video signal code of one command. Next, the next instruction is read from block 2 of the RAM and its execution. The process is repeated until all commands are given.

25 lines will not be selected and executed.

Thus, the formation of the video code of the image decomposition line following the current one occurs.

The formation of the video signal is performed with the use of two identical shift registers 9 and 10, connected via the element OR 11 to the first input of the video control unit 13, the second input of which is connected to 5 synchronization unit 12. The number of bits in each register is equal to the number of decomposition elements in a raster word. When a raster word from block 0 of a raster memory with a parallel code occurs in register 9, then at this time from register 10 there occurs a sequential shift of information through the OR element to the video control unit. After a complete shift., Ha of information from register 10, the functions of the registers change. Register management is carried out from block 12 synchronously with the formation of the raster.

The synchronization unit 12 generates pulses, the follow-up period of which is determined by the degree of horizontal sampling necessary for the formation of the image. These pulses are fed to the inputs of register synchronization, as well as to the divider in which the line frequency is formed. The pulses of the frequency of the rows from the divider are fed to the row counter, and which forms the frequency of the cache. Thus, the proposed device provides for the accumulation

information asynchronously arriving in raster blocks, and reading it line by line, synchronously with the scanning of the video monitoring unit. Since the entry in the raster memory blocks and

reading is raster words, then using the device, for example, in a television system with a decomposition standard of 1125 lines with the number of expansion elements in line 1024, allows the device to be significantly simplified by reducing the number of bits of the shift registers. If the video code is formed using 32-bit raster words, the shift registers respectively have 32 bits and their volume is significantly reduced compared to the prototype, and we have 1024 bits.

Claims (2)

1. US patent number 3792464, cl. G About F 3/14, Publ. 1974. 2. USSR author's certificate No. 566400, cl. G 06 F 3/14, 1977 (prototype).