SU857970A1 - Device for displaying information on crt screen - Google Patents

Description

one

The invention relates to computing and, in particular, to a display of information.

A device for displaying information on an electron-beam tube (CRT) is composed of an indication unit on a CRT, a synchronization unit, a video amplifier, an alphanumeric display unit, and a graphic information display unit l.

A disadvantage of this device is the inability to adjust the regeneration frequency and control the size of the raster, which is necessary for the rational use of memory and performance associated with a computer device.

Closest to the proposed invention is a device containing a display unit, made on a CRT, the first input of which. connected to the first output of the synchronization unit, the second output of which is connected to the input of the point counter, and the third to the synchronization input of the storage unit of alphanumeric information, the output of which is connected to the first input of the video amplifier, connected by NG1 with its thermal to the second input of the display unit on the CRT and the second input - to the output of the OR element, the first input of which is connected to the output of the first element AND, connected by one input to the first input of the first shift register and the output of the second element AND, and the other input to the output of the first shift register, the second input of which is connected

10 with the output of the third And elements connected by one input to the output of the fourth And element, and the other to the information buses connected to the first inputs of the fifth And elements,

15 second inputs of which are soy; innes with the output of the sixth element I, and the output of the first input of the second shift register, the second input of which is connected to the output of the seventh element Nick to the first input of the eighth element I, the second input of which is connected to the output of the second shift register and output cd the second input of the element OR, the ninth element of AND, the write bus, the start and the resolution of the record 2.

The drawback of the device is a waste of machine time for transmitting images that occupy the ES only a part of the screen, and images allow for sparse representation in the vertical.

The invention of this invention is to simplify the device by reducing hardware costs.

To achieve this goal, a device containing a synchronization unit, the first output of which is connected to the CRT, the second output to the input of the memory unit, the third output to the counter input, the first output of which is connected to the first impulse generator, the second output to the first inputs of the first and fourth And elements, and the third output to the first inputs of the second and third elements And, the second inputs of the first and second elements And are the inputs of the device, and the third inputs of the first and second elements And and the second inputs of the third and fourth elements And Connected to the input of the fifth element And, the outputs of the first and second elements And connected to the first inputs of the sixth and seventh elements And, respectively, the output of the third element And is connected to the first inputs of the first shift register and the eighth element And, and the output of the fourth element and connected to the first inputs the second shift register and the ninth element And, the second inputs of the sixth and seventh elements And are the inputs of the device, and the outputs of these elements are connected to the second inputs of the first and second shift registers, respectively, the second input The eighth and ninth elements of the AND are connected to the outputs of the neo and second shift registers, respectively, and the outputs of these elements are connected to the inputs of the OR element, the output of which is connected to the second input of the video amplifier whose output is connected to a CRT, the trigger of the frames is entered , trigger of blocking of lines, trigger of blocking of frames, trigger of control, element I-HB and second pulse shaper, the first input of which is connected to the output of the first pulse shaper, the SECOND input - with the first inputs of the trigger of blocking of rows and the frame blocking trigger, and the third input of the second pulse generator, the second input of the row lock trigger and the frame blocking trigger, and the inputs of the ROW trigger and frame trigger are connected to the output of the synchronization unit, the first output of the second pulse generator is the device output, and the second output is connected to the first the control trigger input, the second input of which is the device input, and the output is connected to the first input of the fifth element I, the second input of which is connected to the output of the frame trigger, the second input KOTOROG communication with am output trigger lock cal

A third input of i ixieMOHTa il is connected to the output of an I-NC element, the first input of which is connected to the output of a row trigger, and the second to the output of a row lock trigger, the third input of which is the third input of the frame blocking trigger.

The drawing shows a functional diagram of the device.

The device contains a block of 1 indication on a CRT, a block 2 of synchronization, a video amplifier 3, a block 4 of storing alphanumeric information, a counter of 5 points, elements And 6, 7, 8 and 9, driver 10, elements And 11, shift register 12, elements And 13, shift register 14, I1 element OR element 16, AND element 1, row lock trigger 18, 19 line trigger, I-NE element 20, frame lock trigger 21, 22 frame trigger, AND element 23, recording resolution generation unit 24 control trigger 25, write bus 26, information buses 27, start bus 28, write resolution bus 29.

The device works as follows.

The initial state of the device is the period of retraction along the beam of the display unit 1 on the CRT. In this case, the signal from the third output of the synchronization unit 2 sets the trigger of 19 lines to the zero state of the line lock trigger 18, the frame lock trigger 21 and the frame trigger 22, and also causes the recording resolution generation unit 24 to zero. The signal from the second output of the synchronization unit 2, arriving at the input of the counter of 5 points, brings it to the zero state.

If there is a request to the device from the computer side, a signal is transmitted on the start 28 of the signal that sets the control trigger 25 to one state. At the same time, the control word is transmitted over the information buses 27, followed by a signal on the recording bus 26. The signal from the bus 26 is supplied to the third inputs of the row blocking trigger 18 and the frame blocking trigger 21, and the signals from the two bits of the information busses 27, which correspond to the control of the display modes of the raster lines and the regeneration frequency adjustment, are fed to the second inputs of the specified triggers. The presence of single signals on information buses 27 leads to the installation of corresponding triggers in a single state.

In addition to the described process, during the period of the return stroke, the device is prepared for indication.

After installing rpHrrc-j-vi g e, h HILMOM CONDITIONS on ГГ-ОХ SlXvUllX LOmentov 23, single signals are present. In this case, a single signal from the output of this element, arriving at the second inputs of the elements And 6-9 times solve the formation of control pulses. From the second output of the synchronization unit 2, the signal arrives at the input of the counter 5 points. In this case, the signal from the first output of the counter, passing through the imaging unit 10, is fed to the second input of the recording resolution generation unit 24, as a result of which the first output of this unit produces a recording permission signal, which is received via the non-recording resolution directly into the computer, By this signal, the computer issues the first information word to information buses 27, accompanied by its signal on record bus 26, to which a single signal from the output of element I 23 arrives, and to the third input from the second output of the counter 5 points. The second signal is fed to the first inputs of the elements 11, the second inputs of which receive a signal from the information bus 27, From the outputs of the element 11 and information signals are fed to the second inputs of the shift register 12, as a result of which the first information word is written in the parallel code into the first shift register 12. Simultaneously, the signal from the write bus 26 is fed to the input of the recording resolution shaping unit 24, transferring it to the zero state. The procedure is then repeated with the only difference that the enabling signal appears at the third output of the point counter. The signals from the information bus 27, passing through the elements AND 13, go to the first inputs of the register 14. Thus, the second information word is recorded in the second shift register. All of the above processes occur during the reverse cycle of the beam frame in the block. CRT indications. From the beginning of the forward path of the beam, a signal with a frequency of following points on the CRT screen is inputted to the counter input of 5 points, the signal from the second output of counter 5 is fed to the first input of element And 9 to the second input of which the signal comes from the output of element And 23, from the output of which to the first input of the shift register 12. When this occurs, information is shifted in the Vl register, From the output of the shift register 12, the information signal arrives at the first input of the element 15, the second input of which receives the strobe signal from the first input of the register of the shift 12, C out (; to the first input of the OR element, from the output of which - to the second input of video amplifier 3, From the output of video amplifier 3, the signal goes to the first input of the element OR, from the output of WHICH - to the second input of video amplifier 3. From the output of video amplifier 3, the signal goes to the second input of unit 1 ind on the CRT, where it modulates the electron beam.At the first input to the video amplifier post, signals of the alphanumeric tract are received.Over the number of shift cycles equal to the shift register information, t, e, is reached, when the shift register 12 is shifted, counter 5 points exposes a single signal at the second output, and zero at the third. From the output of the AND element 8, a control signal is fed to the first input of the shift register 14, in which the second information word is located. Thus, information is shifted in the second shift register, from the output of which the info signal through elements AND 17 and OR 16 is fed to the second input of video amplifier 3, Simultaneously with the switching of a single signal from the third to the second output of counter 5, from its first output signal through the driver 10 is fed to the second input of the block 24, which sets it to the single state, as a result of which a single signal arriving on the computer appears on the recording resolution bus 29, In response, the computer signal gives the following information One word on the information bus 27, accompanied by a signal on the write bus 26, which enters the input input of the element 6, the second input of which receives a signal from the output of the element 23, and the third the signal present at that time the BTODOM output of the point counter . Thus, the single signal generated at the output of the AND 6 element goes to the first inputs of the AND 11 elements, the second inputs of which are given signals from the information bus 27. As a result, the information word about the first shift register is written. This occurs at the time when information is shifted in the second shift register. The signal from the recording bus 26 arriving at the input of the recording resolution generation unit 24 transfers it to the zero state. Upon reaching the number of clock ticks of information equal to the size of the shift register 14, similarly to the described one, switching of signals at the output of the counter 5 points to the shift of information in the left register occurs

the shift and the writing of the next information word to the released second shift register is made. Thus, the first line of the image is recorded, after which the signal from the second output of the synchronization unit 2, which enters the counter of 5 points, is blocked and the last line is blocked for the return period along the line of the CRT beam. From the fourth output of the synchronization unit 2, a signal is fed to the trigger's counting input of 19 lines. From the output of its signal is fed to the first input element AND-NOT 20, the second input of which is connected to the output of the trigger 18 blocking lines. If a single signal is present at the output of the row lock trigger, i.e. the interlaced raster mode is set, then at the output of the AND-HE element 20 there is no single signal, therefore there is no signal at the output of the AND 23 element, which, in turn, prohibits the appearance of signals at the AND 6-9 element outputs. As a result, for the period of the next line, the device will be in the locked state. If the interlaced raster mode is not set, as well as in the case when the trigger of lines 19 is in the zero state, a signal is present at the output of the AND-NOT element 20 and the device operates according to the described algorithm until the computer produces communication buffer.

If the computer exhausts the entire buffer, and the raster scan is not finished, the device automatically locks.

The recording resolution generation unit consists of a trigger and an element I. The signals on the first and third inputs of the block reset the trigger to the zero state, and on the second input set it to the single state. The inputs of the element And are connected to the second input cm of the block and the single output of the trigger. Therefore, if the trigger is set to one with a signal at the second input of the block, and there is no signal that sets it to zero at the third input of the block, the next signal at the second input of the block confirms the trigger state and passes through the AND element to the second output of the block shaping the recording resolution.

The blocking is carried out by applying to the first input of the control trigger 25 a signal from the second output of the recording resolution generation unit 24, which sets the control trigger to the zero state. This signal is generated by the arrival of a second pulse from the output of the imaging unit 10, which initiates the reception of a new word from the computer, to which the computer did not respond as a signal on the bus 26

records The absence of a signal at the first input of the element And 23 leads to blocking the device for the time remaining until the end of the raster sweep.

After the end of the direct beam, the J frame from the fourth output of the synchronization unit receives a signal at the second trigger input of 22 frames. If the regeneration frequency reduction mode is set, i.e. If the signal at the output of the frame blocking flip-flop 21 is present, then the signal at the first input of the flip-flop 22 frames goes into the opposite state.

As a result, at the second input of the AND element 23, there is no signal during the whole subsequent frame, i.e. device is locked.

If the specified mode is not set, then the entire device returns to the initial state; Further operation occurs according to the described algorithm.

The application of the invention allows to extend the function 1 | The initial capabilities of the device due to the 5 introduced control modes for personnel and urgent scanning and due to the possibility of forming a part of the raster, which in turn reduces the time spent on the computer to regenerate the image.

Claims (2)

1. Author's certificate of the USSR 585511, cl. G 06 K 15/20, 1977. 2. USSR author's certificate No. 483689, cl. .G 06 K 15/20, 1976 (prototype).