SU1495780A1 - Device for display of data on video monitor unit - Google Patents

Abstract

The invention relates to automation and computing and can be used to display information on a computer. The purpose of the invention is to expand the field of application of the device by programmatically controlling the display modes of information that is achieved by introducing the address counter 13, the line start register 21, the line end register 22, the first 23 and second 24 comparison blocks, the trigger 25, the control word register 26, the first 27 and the second 28 elements And, the writing and reading control unit 29 and the corresponding functional connections. The invention allows software to control the size of the displayed frame. 1 il.

Description

The invention relates to automation and computing and can be used to display information from a computer.

The purpose of the invention is to expand the field of application of the device by programmatically controlling information display modes.

The drawing shows a block diagram of the device.

The device contains a control unit 1 comprising a microprocessor 2, a block of permanent memory 3, a parallel interface 4, a serial interface 5, a keyboard 6, a data buffer 7 and a memory block 8, a character generator 9, a shift register 10, a video signal generator 11, a video monitor block 12, address counter 13, address switch 14, 15 clock pulse generator, 16 point counter, 17 character counter, memory block 18, shaper 19 horizontal sync pulses, shaper 20 frame sync pulses, register 21 beginning of line, end register 22 with Rocky, the first 23 and second comparing units 24, a trigger 25, a register 26, a control word, the first 27 and second 28 elements AND, recording control unit 29 and the read ,.

The device works as follows.

The recording and reading control unit 29 implements the direct memory access mode of the control unit 1 and can be implemented on integrated circuits K58QBT57, K1810BT37,

The main unit of the device is a microprocessor 2 that implements all keyboard commands, exchanges with external devices and computers, and an information display program for the intellectual display. The communication of the microprocessor 2 with memory blocks 3 and 8, interfaces 4 and 5, the keyboard 6, and through the data buffer 7 with the circuit realizing the regeneration of the image on the screen is carried out through the data bus, the address bus, and the control bus,

In block 3 of the permanent memory, programs are stored defining typical operations of the operation of the device. RAM 8 is used to store plug-in programs for the operation of the device, including programs that provide emu-

lection of various types of display devices, as well as service information to control image regeneration,

In order to ensure the recording and reading of information, the memory unit 18 is connected to the microprocessor buses 2 via the address switch 14 and the data buffer 7. Block 18 stores information displayed on the screen in coded form, which is cyclically read into character generator 9, from which the converted to display is entered into shift register 10.

For the television method of image formation, a cyclic scan in the memory block 18 of the regeneration of a group of characters included in one information line is characteristic. The clock generator 15 generates pulses, the period of which is equal to the time of formation. One point of the matrix of the character in the image, the Sternik 16 points serves to control the shift of information in the register 10. At the output of the shift register 10, a sequence of signals of a CRT beam is displayed, which, through the second element 28, (if there is a potential at the second output of the register 26 control) is supplied to the shaper 11 of video signals, where, together with the shaper signals, 19 horizontal sync pulses and the shaper 20 frame sync pulses are converted into a full television signal applied to the video monitor Aulnay unit 12,

 The character counter 17 counts the familiarity positions during the scanning of the television line, generates a pulse to start the former 19 lower-case pulses and the direct memory access node 29,

 The launch at the end of the sweep of the television line of the direct memory access node 29 causes the control information that contains the starting address for regeneration of the image in the next line of the television raster, the familiarity line number, the video display resolution bit and the resolution bit to be read from the special area of the operating memory 8. staffing clock sync. The starting address is recorded in the address counter 13, and the familiarity row number and the enable bits are recorded in the control word register 26.

The starting address of the raster line is the address from which it will be implemented. reading information from memory block 18

regeneration in the current line of the television raster with the subsequent escalation (increment) of this address in the counter 13 of the address after displaying each character. When generating symbolic information, a multiple is made (according to the number of rows of the matrix of the decomposition of the sign j, the data of the information line from block 18 is read, so the starting address for all the text lines of one information line will be the same

The line number of the familiarization is recorded in the control register 26 (output 3) t indicates the row number of the character decomposition matrix and goes to the second address input of the character generator 9. As a rule, the row number of the familiarity increases with each new television line of the information line and zeroes at go to the next info line.

The value of the display resolution bit (2nd output of register 26 connected to the input of the second element 28) gates the output of data from the shift register 10 to the video signal generator 11, this allows you to programmatically create non-displayable fragments on the screen.

The unit value of the resolution of the formation of a frame sync pulse (output 1 of the register 26) is started by the imaging unit 20 of the frame sync pulse. Software control of this clock makes it possible to avoid the presence of an information line counter and easily adjust the display device to any number of television scan lines.

The values of the line start register 21 and the line end register 22 are set by microprocessor 2 during initial initialization at the moment the device is turned on (although they can be changed if necessary by software). These registers determine the start and end times for displaying each line of a television raster, i.e. specify the number of characters per line. A 17-character counter is set to zero when a signal is issued to start the 19 horizontal sync pulse generator and inclusive function using the 16-point counter signals synchronously with the scanning of a CRT beam. When this counter I7 reaches the value stored in the register 21 of the beginning of the line, the first comparison circuit 23 generates a signal for setting the regeneration trigger 25, which permits the passage of the address 13 through the first element 27 of the pulse. If the value of the counter I7 characters coincides with the value of the register 22 end of the row in the topfa comparison circuit 24 generates a reset signal of the regeneration trigger 25 and thereby terminates the increment of the counter 13 of the address. The zero value of the trigger 25 regeneration also blocks the passage of video information from the shift register through the second element And 28.

The accumulation of the counter 17 characters by the signals of the counter 16 points continues until the counter 17 overflows, the signal to the input of the former 19 sync pulses and the start of the direct memory access node 29 are received. The regeneration of the television line is completed.

In the direct memory access mode of RAM 2, the control information for the next row of the television raster is reread. The steps described above are repeated.

In the last line of the television raster, the bits for creating a frame clock are set to 1 and. shaper 20 is started.

Claims (1)

Thus, the proposed technical solution allows one to programmatically set the size of the displayed frame. Invention Formula A device for displaying information on the screen of a video monitor unit containing a control unit, an address switch, a memory block, character generator, character counter, point counter, shift register, horizontal sync pulse generator, frame sync driver, video signal generator, clock generator, the output of which is connected to the clock input of the point counter, the first output of which is connected to the clock input of the shift register, the information input of which is connected to the output of the character generator, the first hell The main input is connected to the output of the memory unit connected to the information input of the control unit, the information output of which is connected to the information input of the memory unit, whose address input is connected to the output of the address switch, the first information input of which is connected to the address output of the control unit, information inputs The outputs of which are informational. the device's input-output, the output of the video signal maker is connected to the video input of the video monitoring unit, and its first and second sync output, respectively, to the outputs of the frame sync pulse generator and the horizontal sync pulse maker; the information input of which is connected to the first output of the character counter, which is connected to the second output of the point counter, characterized in that, in order to expand the device’s application area by software control of the display modes, it contains the first and second elements AND, the control word register, the trigger, the first and second comparison blocks, the address counter, the line start register, the line end register, the write and read control block, the first and second outputs of which are connected to the address and control inputs of the block control accordingly 0 0 five 0 five the input of the recording and reading control unit is connected to the first output of the character counter, the second output of which is connected to the first inputs of the first and second comparison blocks, the outputs of which are connected respectively to the inputs of the Unit setting and the Setting zero of the trigger, the output of which is connected to the first inputs of the first and second elements And, the information output of the control unit is connected to the information inputs of the line start register, the line end register, the address counter and the control word register, the first output of which is connected with the information input of the HR sync pulse generator, the second output of the control word register is connected to the second input of the second element, the output of which is connected to the information input of the video signal generator, h; retium input of the second element AND is connected to the output of the shift register, the third output of the control register the words are connected to the second address input of the character generator, the input of the address counter is connected to the second information input of the address switch; the clock input of the address counter is connected to the output of the first element And, the second input of which is connected to the second output points of the counter, the outputs of registers beginning of line and end of line soediyeny respectively to second inputs of the first and second comparing units.