SU857974A1 - Device for decoding two-frequency signals - Google Patents

Description

one

The invention relates to computing, in particular to devices for processing the reproduced signal, and can be used in equipment with a digital dual-frequency recording method, including in equipment with floppy magnetic disks.

A device for decoding two-frequency digital signals is known, which contains a trigger circuit and delay elements, which are used to analyze the amplified logical signals l arriving at their input. The disadvantages of this device are a large amount of equipment and unstable operation in the presence of an EOS input signal of phase distortion, as well as low noise immunity due to the lack of valve elements in the input circuits.

The closest technical solution to the present invention is a device containing a single vibrator, a register and two triggers, the inverse output of the single vibrator connected to the recording inputs of two triggers, and the output of the second trigger connected to the information input of the register 2.

The disadvantages of this device are low noise immunity caused by the lack of valve elements in the input circuits, and unstable operation when there is a phase distortion in the input signal, due to the unstable time threshold of the single-vibrator operation when the frequency of the input signals fluctuates.

These circumstances reduce the reliability of the device.

The purpose of the invention is to increase the reliability of the device.

The goal is achieved by

15 that a device for decoding two-frequency digital signals containing a sampler, first and second triggers, a register, the recording inputs of the triggers are combined, and the direct output of the second trigger is connected to the information input of the register, a counter, decoders, an OR element and a waiting multivibrator are entered, which trigger input

Claims (2)

25 is connected to the recording inputs of the triggers and the inverse output of the one-vibrator, the direct output of which is connected to the valve input of the meter, the counting input of which is connected to the output of the waiting multivibrator, the input of the parallel recording — to the forward output of the first trigger, the information inputs are connected to the zero bus potential, and the outputs with the inputs of the first decoder, the outputs of which are connected respectively to the input of the OR element, potential inputs of flip-flops, the output of the OR element is connected to the recording input of the register Which one is connected to the inputs of the decoder, the output of which is one of the outputs of the device. The drawing shows a block diagram of a device for decoding dual-frequency digital signals. The device contains a single vibrator 1, the first 2 and second 3 triggers whose recording inputs are interconnected and connected to the inverse output of the single vibrator 1 and the recording input of the waiting multivibrator 4 whose output is connected to the count input of counter 5 , while the valve input of the counter 5 is connected to the direct output of the one-shot 1, the input of the parallel recording of the counter 5 - to the direct output of the trigger 2. The outputs of the counter 5 are connected To the inputs of the decoder 6, which has eight outputs, the first and seventh outputs are connected to the inputs of the OR element 7, the sixth output is connected to the potential input of trigger 3, the eighth output - to the potential input of trigger 2, the other outputs of the decoder are not used). The output of the element OR 7 is connected to the recording input of the register 8, whose information input is connected to the direct output of the trigger 3, and the outputs are connected to the information inputs of the decoder 9. The information inputs of the counter 5 are connected to the zero potential bus 10. The output of the register 8 is one from the output of the device. The device works as follows. Pulses from a reproduction amplifier (not shown) are applied to the trigger input of the one-shot 1. First the incoming pulse triggers the one-shot 1. The duration of the output pulse of the one-shot 1 is set to T / 4, where T is the nominal period of the clock sync pulse. During this interval, no device responds to random fluctuations of the input signals, while counter 5 is normalized. On the falling edge of the output pulse of the one-shot 1, a stand-by multivibrator 4 is triggered, triggers 2 and 3 are activated, the ban is removed from the c-meter 5. The period of impulses generated by the standby multivibrator is T / 16. At the information input of register 8, level 1 is set, and counter 5 does not count the impulses supplied to it. The first impulse, made by decoder B, passes through the element OR 7 and writes the state of trigger 3, i.e. 1. If the next data pulse arrives after the time period Ti T / 2 + T / 8, then one-shot 1 is restarted, counter 3 is normalized, the waiting Multivibrator 4 stops the generation of pulses and the cycle repeats. If the period between pulses is TiT / 4, then the counter 5 continues counting the pulses generated by the pending multivibrator 4. The sixth impulse allocated by the decoder 6 suppresses the trigger 3, while at the information input of the register 8 the level O is set, the third pulse passed through the element OR 7, writes the state O to the register 8, the eighth pulse suppresses the trigger 2, and the state O is recorded in the counter 5 along the parallel recording data. With the arrival of the next pulse to the input of the one-vibrator, 1 cycle repeats. The analysis of the bytes recorded in this way in register 8 is carried out in the decoder 9. Each byte corresponds to its sixteen bits of the code combination, the even bits of which correspond to clock sync transitions, the odd bits correspond to information ones. When a marker byte with missing sync transitions is detected, the decoder 9 transmits a signal. A marker, the code corresponding to the register in the 8 byte register, is output to the device. The advantage of the proposed device is high stability of operation in the presence of phase distortions in the input signal, as well as high noise immunity. Claims An apparatus for decoding dual frequency digital signals comprising a one-shot, first and second flip-flops, a register, the recording of the flip-flops being combined, and the direct output of the second flip-flop connected to an information input of the register, characterized in that, in order to improve the reliability of the device, it contains counter, decoders, an OR element and a standby multivibrator, the triggering input of which is connected to the recording inputs of the triggers and the inverse output of the one-vibrator, the direct output of which is connected en with a valve input of the counter, the counting input of which is connected to the output of the waiting multivibrator, the input parallel records - to the direct output of the first trigger, information inputs connected to the zero potential bus, and outputs to the inputs of the first decoder, the outputs of which are connected respectively to the inputs of the OR element, to potential inputs of the trigger, the OR element is connected to the recording input of the register. the outputs of which are connected to the inputs of the decoder, the output of which was one of the outputs of the device. Information sources; taken into account in the examination 1, Pg1tent UK 1536) 30, cl. Q 4 C T, 1978. 2. Forward Germany No. 2064255, cl. 42 T 15/02, 1975 (prototype).