RU1800593C - Pulse burst generator - Google Patents

Abstract

The pulse train generator belongs to the pulse technique and can be used to form a pulse train with a stable period, the first pulse of which is connected to the MOMenfy of the asynchronous signal. The device comprises a reference frequency generator 1, triggers 2,3,4, AND 5, 6.7, 8 elements, OR 9, 10, 11 elements, pulse counters 12, 13, input bus 14, write bus 15, output bus 16. 2 ill.

Description

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The invention relates to a pulse technique and can be used to generate a series of pulses with a stable period, the first pulse of which is associated with the moment of arrival of an asynchronous start signal. The time interval between the pulses of the series must be regulated within wide limits.

The purpose of the invention is to increase the accuracy of linking the first pulse of the generated series of pulses to the moment of arrival of the asynchronous signal while increasing the reliability of operation.

Figure 1 shows the electrical functional diagram of the device; Fig. 2 is a timing chart illustrating its operation.

The pulse series generator contains a reference frequency generator 1, the first, second, third D-triggers 2, 3, 4 with a latch, the first, second, third, fourth elements AND 5, 6, 7, 8, the first, second, third elements OR 9 , 10, 11, the first, second counters 12, 13 pulses.

The direct output of the pulse generator 1 is connected to the first input of the first element And 5, the first input of the first trigger is connected to the input bus 14, the second input to the first input of the second trigger 3 and the output of the first counter 12 pulses. The recording inputs of the first and second pulse counters 12 and 13 are connected to the recording bus 15, the output of the second pulse counter 13 is connected to the first input of the first OR element 9, the output of which is connected to the counting input of the first pulse counter 12 and the output bus 16. The first input of the second element And 6 is connected to the output of the second trigger 3. The first input of the third trigger 4 is connected to the output of the first trigger 2, with the second input of the first Ibis element, the first input of the third element And 7, the second input of which is connected to the first output of the third trigger 4, B The second output of the latter is connected to the third input of the first element And 5, the second input is to the direct output of the pulse generator 1, the inverse output of which is connected to the third input of the third element And 7. The outputs of the third and first elements And 7 and 5 are connected respectively to the first and second the inputs of the second element OR 10, the output of which is connected to the counting input of the second counter 13 pulses, with the second input of the second Ibis element, the first input of the fourth element And 8. The second input of the element And 8 is connected to the second input of the second trigger, with the second input first house

OR element 9. with an input for recording control of the first counter 12 pulses and with the output of the third element OR 11. The first and second inputs of which are connected to the outputs of the second and fourth elements And 6 and 8, respectively. The output of the first element OR 9 is connected to the recording control input of the second counter 13 pulses.

The device operates as follows.

In the initial state, the output of trigger 2 is low, blocking the passage of signals through the elements And 7, 5, and the output of trigger 3 is a high level.

5 allowing the passage of the signal through

element And 6. Counters 13 and 12 pulses

while in the initial state.

When a start signal arrives

(Ui4, FIG. 2) on the bus 14, the trigger 2 changes

0 state (U2, Fig. 2), allowing the signal to pass through the And elements 7, 5 and at a high level using the D-trigger 4 with a latch fixes the moment of arrival of the start signal relative to the pulses 5 of the reference frequency generator 1. If the start signal arrived at time ti, i.e. coincided with a pulse at the direct output of the reference frequency generator 1, then at the direct output of the D-trigger 13 with a latch

0, a high level is recorded, allowing a series of pulses from the inverse output of the reference frequency generator 1 to pass through the AND 7, OR 10 elements (Uio. Fig. 2), while the first pulse of this series is generated5 in a time less than or equal to the pulse width of the reference generator 1 frequency. If the start signal arrived at time t.2, i.e. coincided with the pause between pulses at the direct output of the generator 1 of the reference frequency, then a low level is fixed at the direct output of the D-trigger 4 with a latch, while a high level from its inverse output allows a series of pulses to pass from the direct output5 of the generator 1 of the reference frequency through the elements AND 5, OR 10 (Kyu, figure 2), while the first pulse of this series is formed in a time less than or equal to the duration of the pause between pulses of the generator 1

0 reference frequency.

The first pulse from the series that entered through the AND 6, OR 11 elements, enters the input of trigger 2 and changes its state, while the low level from the output of the trigger

5-3 blocks the further passage of the pulse through the And 6. element, but from the output of the OR element 11, a high level allows the further passage of the pulse through the And 8. element. Upon the decline of the pulse generated at the output of the OR element 11, the passage of the next pulses through the And element 8 is blocked.

Thus, at the output of the OR element 11, only the first pulse of the series is generated (U and when the start signal arrives at time ti and Un at time t2, Fig. 2), which writes the number corresponding to the number of pulses in the series to the pulse counter 13 and arrives on the bus 16, the Counter 13 captures the number of pulses from the output of the OR element 10. At the time when the counter 13 fixes the specified number of pulses and is set to zero, a delayed in time relative to the first pulse of the series appears at its output pulse (Ui3 or Ui3, figure 2), which through the element OR 9 enters the bus 16, to the counting input of the counter 12 and to the recording input of the counter 13. The number corresponding to the period of pulses in the series is rewritten into the counter 13, and it again begins to record the number of pulses arriving at its counting input. The counter 12 pulses captures the number of output pulses on the bus 16 (Die or Die, figure 2). At the point in time (ti or t.2, fig. 2), when the counter 12 fixes a predetermined number of pulses, it is set to the zero state and a pulse appears on its output (Ui2 or Ui2 of fig. 2), which switches triggers 3 , 2 to the initial state, when the passage of signals through the elements AND 7, 5 is blocked. Thus, the pulse train generator returns to the initial state, which is maintained until the arrival of the next asynchronous start signal.

Claims (1)

Shadow formula A pulse series generator containing a reference frequency generator, the direct output of which is connected to the first input of the first element And, the first and second triggers, the first input of the first of which is connected to the input bus, the second input to the first input of the second, trigger-) and with the output of the first pulse counter, the recording input of which is connected to the recording bus and to the recording input of the second pulse counter. the output of which is connected to the first input of the first OR element. the output of which is connected to the counting input of the first pulse counter and to the output bus, the second element And, the first input of which is connected to the output of the second trigger, characterized in that that, in order to increase the accuracy of linking the first pulse of the generated series of pulses to the moment of arrival of the asynchronous signal with a simultaneous increase in reliability, the third and fourth elements I., the third OR element and the third trigger, the first input of which is connected to the output of the first trigger, are introduced with the second input of the first element And and with the first input of the third element And, the second input of which is connected to the first output of the third trigger, the second output of which is connected to the third input of the first element And, the second input to of which is connected to the first output of the third trigger, the second output of which is connected to the third input of the first element I. The second input is to the direct output of the pulse generator, the inverse output of which is connected to the third input of the third element And, the outputs of the third and first elements And are connected respectively to the first and the second inputs of the second OR element, the output of which is connected to the counting input of the second pulse counter, with the second input of the second element And and with the first input of the fourth element I. the second input of which is connected to the second and the inputs of the second AND element and the first OR element, with the recording control input of the first pulse counter and the output of the third OR element, the first and second inputs of which are connected to the outputs of the second and fourth AND elements, respectively, the output of the first OR element being connected to the recording control input of the second pulse counter. and MP Fm.2